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Chassis/Connector Hotspot Guard in the Charging Branch
This page explains a thermal guard that belongs to the charging upper control domain — above the cells/AFE and below the system/USB-C policies. It is not a generic battery over-temperature protection, and it is not a pack FET / eFuse cut-off. Its only job is: when the chassis or the connector gets hot because of charging, make the charger back off safely.
The vertical stack here is: charger / power-path / USB-C on top → hotspot guard logic in the middle → cells / AFE below. The question it answers is: “Can I keep charging this hard through this specific port/shell right now?” — not “Is the whole pack safe?”.
We split it out because real hotspots usually come from connector contact loss, harness / terminal resistance, or poor shell ventilation; these are not the same sensor points as the cells. If you merge this into “general thermal protection”, it will collide with your BMS master page. If you push it into “pack FET / eFuse”, the only action available becomes “disconnect”, which goes against your goal of derate but do not interrupt charging.
Conceptually it is one chain, not three features: hotspot sensed → thermal foldback → port-level derating → if the system is active, let the system win. That is why we keep it in the charging domain and let higher layers simply log or coordinate.
Typical chassis/connector hotspots are small-area, fast-rising, but the rest of the product is still cool. The response therefore should be faster than a cell NTC, but not so fast that a single noisy sample kills the charge. The granularity stays at port-level or chassis-zone level, never at pack-level.
What this chapter will not do: it will not define whole-product thermal runaway criteria; it will not handle high-voltage insulation noise suppression; it will not model an OBC enclosure. Those stay on their own pages to avoid index cannibalization.
Thermal sensing placements for chassis and connector
The hotspot guard needs three different temperature inputs, because chassis heat, connector heat, and board ambient do not rise at the same speed and do not share the same limit. We measure:
- Chassis / shell NTC — glued to the part the user can actually touch.
- Connector / port NTC — as close as practical to Type-C, automotive plug, or XT-style terminals.
- Board reference temperature — MCU internal temp or PMIC internal temp, used to correct or reject bad events.
We separate them because a shell sensor answers “is the enclosure getting too hot for the user?”, a connector sensor answers “is contact resistance or plug temperature rising too fast?”, and the board sensor answers “is the whole product in a hot environment?”. Merging them into a single curve would force the charger to derate too often or too late.
Sampling strategy is different too: connector NTC must be fast-sampled with short filtering because it can jump in seconds; chassis NTC may be slow-sampled with longer filtering because the enclosure has a thermal mass; the board reference can stay at a lower rate and be used for compensation.
Port plug-in, human fingers, or sun exposure can cause a short spike. That is why the sensing layer needs a time window + slope (dT/dt) threshold and, if possible, a cross-check with the board temperature to tell “this is a real hotspot on the connector” vs “this is just a brief contact”.
In automotive / industrial ranges the NTC B-value can differ from the one the charger IC expects. If procurement swaps the charger with a different brand, the hotspot threshold can shift. This is the place to say: design for NTC mismatch (LUT or MCU linearization), so the derating logic in the charging domain stays valid even when the part number changes.
Detection must stay close to the heat source. A hot connector must be sensed at the connector, not at the MCU. A hot shell must be sensed on the shell, not on the battery cell tab. This is how we keep the guard truly “chassis/connector” and not “somewhere on the board”.
Thermal foldback curves tailored for charging
The hotspot guard in the charging domain uses a steped/graded curve, not an on/off action. We do this because chassis/connector hotspots are usually local and fast, while the rest of the pack is still safe. So we prefer to reduce charging power first and let the system continue.
A common pattern is a three-to-four band curve: T < T1 → full charge power; T1 ≤ T < T2 → linear derating (reduce P or ICHG); T2 ≤ T < T3 → forced low-power / trickle-like charge; T ≥ T3 → stop fast charge, raise an event, keep the system powered.
The special question for charging is the CV phase. In CV the current is already tapering. If you stack a fast thermal foldback on top of it, you will create a visible oscillation. That is why we either make the foldback CV-compatible (small slope, slow reaction) or we freeze thermal actions once CV is reached, only reacting to very high temperatures.
Hotspots can come from slow thermal sources (the enclosure) or from fast sources (the connector). Slow sources like shells can follow a smooth linear reduction. Fast sources like a half-burned connector need an immediate clamp to a safe plateau and then can be handed to the slow curve. In practice: fast source clamps first, slow source shapes the rest.
When the system is under load, the safer and more user-friendly solution is to reduce charging power first and leave VSYS and active loads untouched. This prepares for the next chapter, which will arbitrate which side gets the watts.
Note that many charger ICs expect their NTC input to monitor battery or ambient. If you connect a connector/chassis NTC instead, the thresholds T1–T3 must be remapped to the connector’s safe surface temperature. Multi-port products must evaluate this per port; one overheated port must not force a global derating.
Charge-vs-Use prioritization (who gets the watts first)
When a hotspot is confirmed, we still have to decide whether to give the available thermal/power budget to the system currently running or to the battery currently charging. In most real devices, keeping the system alive is more important than charging faster. That is why this page says: “prefer to drop charging current first.”
A system is considered to be actively using power if: VSYS current goes above a threshold, the PMIC raises a high-load flag, a USB-C sink negotiated a high-power PDO, or a wireless/radio block is in its TX peak. Any of these signals can tell the arbiter that the user is doing something right now.
Decision order is simple: check if the hotspot level reached T2/T3; check if the system is high-load; if both are true, push the derating to the charging path and keep VSYS. If only the hotspot is true but the system is idle, you can derate more slowly and hide it from the user.
Dropping charging is safer than dropping the system. Reducing charge current only makes the battery reach full a little later. Reducing system power will be instantly visible (screen dim, motors stop, fans stall). So the correct ordering is: derate charge → optionally trim non-critical VSYS loads → keep active system power.
Multi-port products need a per-port override: if the overheated port is actually the one powering the system (for example an automotive connector or a USB-C PD sink feeding VSYS), then derating must be limited to that port and should not become a global charger derating. Recovery should be done with a ramp longer than the derating ramp to avoid flapping.
This page arbitrates power because of thermal constraints, not because of source priority. If the upper BMS wants to force charging, this page must be able to report “I am hot at this port”, but still stay in the charging domain and not open pack FETs by itself.
Interaction with balancing / gauging / AFE measurement domain
Once the hotspot guard starts to derate the charging current, the measurement domain (cell AFE, balancer, coulomb counter) will see waveforms that are no longer “business as usual”: charging current steps down, VBAT rises slower, and cell-to-cell voltage differences can temporarily widen. If at the same time the BMS tries to run cell balancing, we easily end up with a strange situation: upper layer is trying to take heat away while the balancing loop is adding heat locally.
To prevent this, the thermal guard must tell the AFE/balancing block which temperature band we are in and how aggressive balancing is allowed to be.
Temperature-aware balancing policy
- T < T1: normal balancing — run planned equalization, no changes.
- T1 ≤ T < T2: reduce balancing duty / extend the balancing interval — charging is already derating linearly, so we should not add board heat.
- T ≥ T2: pause or mask balancing — let the hotspot come down first, then resume equalization.
Derating often causes a current transient. If the AFE keeps sampling at the old schedule, it may capture the transient instead of the steady state. So the measurement domain should either: (a) re-synchronize sampling to the charging guard, or (b) use a short window-averaging mode while the hotspot condition is active. This keeps gauging and cell-voltage reporting stable.
We keep this interaction page in the charging branch because the sequence is top-down: charging thermal guard decides to derate, and the AFE/balancer adapts. It is not the AFE commanding the charger. As we said:
Upper layer (charger / power-path / USB-C) and lower layer (cells) are two different control domains. The cell-monitor AFE belongs to the measurement domain. It makes high-voltage, multi-cell data available in a synchronous, structured form so the charger can decide safely. This is why in the BMS-防交叉v1 system we keep this page inside the charging branch but do not mix it with pack-FET or leakage-monitor content.
Finally, the charger that entered T2/T3 because of a chassis/connector hotspot must raise a thermal-derate event flag to the BMS coordinator. This lets the system log “we derated because of connector heat” and postpone heavy balancing schedules until the port cools down.
IC selection in 7 brands (charger-centric + port-derating-capable)
This chapter lists IC families that actually help implement the chassis/connector hotspot guard — first by accepting NTC-based thermal foldback, then by doing per-port or port-aware derating, and finally by reporting the fact that they have derated. If procurement swaps a charger that does not have these capabilities, most of the logic in this page will stop working.
We group the 7 brands into three buckets. Each bucket below uses real, existing series names so you can later replace them with exact PNs.
Bucket A — Charger / power-path ICs with built-in NTC foldback
These are best when the connector or chassis NTC will be wired directly to the charger’s TS/NTC pin. They already know how to limit charging current by temperature.
- TI: bq2419x, bq2429x, bq25895, bq25672, bq25790/bq25792 (switching, JEITA-like thermal regulation).
- ST: STC4054/4055, STBC08, STNS01 (linear/small chargers with NTC monitoring), plus USB-C chargers combined with STUSB4500 for policy.
- onsemi: NCP1854 / NCP1855 Li-Ion charger, paired with FUSB302B for Type-C/PD negotiation.
- Microchip: MCP73871, MCP73833/4, MCP73837 (Li-Ion with power-path and thermal regulation).
Bucket B — Port-level / USB-C aware / system-priority capable
These ICs are good for the “one port is hot, others are fine” situation. They let you bind hotspot information to a single port instead of penalizing all charging paths.
- TI: TPS25750 (USB-PD policy, can cooperate with charger for power), TPS25982/TPS25947 eFuse for port-level limiting, sometimes coupled with bq257xx.
- NXP: PCA9460/PCA9461 (high-efficiency buck charger with JEITA), PTN5110/USB-PD controllers for C-sink power negotiation.
- Renesas (Intersil): ISL9238, ISL9241, RAA489204 — hybrid/smart battery chargers that already separate system and battery power.
Bucket C — Measurement / AFE / temp-sourcing parts (to feed hotspot data up)
These are not chargers, but they help when you need more temperature points than the charger can directly read. They can push “I am hot” data upwards.
- Melexis: MLX90614, MLX90640 (remote/contactless thermal points for chassis/connector zones), MLX90393 (mag/position if the port is in a moving assembly).
- TI / NXP / Renesas AFEs: cell monitors with multiple NTC channels can be used to forward connector/chassis temperature to the charger domain.
- Microchip: SAM/AVR MCUs with internal temp + 1–2 external analog channels to normalize non-standard NTC curves.
Selection criteria should always include: NTC count & type, whether derating is multi-level (T1/T2/T3), whether a “I have derated” status/IRQ is exposed, whether per-port limiting is supported, and package / temp range / AEC-Q100 availability. If procurement replaces any of the above with a charger that does not expose thermal derating, this hotspot page loses its enforcement point and becomes documentation only.
Small-batch procurement & cross-brand alternatives
In small-batch orders the original design may have used a charger or power-path IC with NTC-driven thermal derating, but purchasing later replaces it with a “same-function” charger that has no port-level or connector/chassis NTC. The device still charges, but the port becomes hot. This chapter exists to prevent that situation and to make sure the BOM clearly says: “NTC-driven hotspot derating is REQUIRED.”
We provide three practical replacement paths: (1) stay in the same brand/series and pick the NTC-enabled, pin-compatible part; (2) move to another brand but call out the difference in the temperature table; (3) when neither is available, add a small external temperature front-end and feed a synthetic derate signal back to the charger. Lead time can be flexible; thermal safety cannot.
1) For purchasing
Do not replace with parts that only have battery NTC. This page protects the chassis/connector, not just the cells.
2) Port-level required
Keep chargers/PMICs that can limit one hot port without limiting all ports. Global-only devices break the user experience.
3) 48h proposal
If the exact PN is out of stock, submit BOM for a 48h cross-brand proposal that keeps NTC-driven thermal derating.
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Frequently Asked Questions
All questions below are scoped to the charging-domain hotspot guard — i.e. we are protecting the chassis/connector and asking the charger to derate at the port level. These FAQs are not about pack FET shutdown, not about leakage/insulation monitors, and not about full BMS power-off.
Can I share one NTC for both chassis hotspot and battery pack temp?
You can, but you should prioritize the faster-rising point (usually the connector/chassis) and map the thresholds to that profile. Battery packs heat up slower and can be checked with a longer filter. In the charging-domain hotspot guard scenario you should pick the sensor that best reflects port-level risks first.
What derating slope is safe if my connector hotspot rises very fast?
Use a two-stage approach: clamp quickly to a safe power plateau as soon as the hotspot is detected, then hand over to a slower linear derating curve. This protects thin plastics and small connectors without creating oscillations. This is the recommended pattern for port-level thermal derating in multi-port battery systems.
Should I still derate during CV phase or freeze the charge current?
Both are valid: a CV-compatible slope keeps watching the hotspot but moves slower; a CV-freeze stops extra adjustments once tapering begins. Pick one and document it so the charger does not stack two falling numbers and jitter. This guidance is for the charging-domain hotspot guard scenario, not general battery safety.
How do I tell the charger that the system load must be prioritized?
Provide a “system-high-load” or “VSYS-over-threshold” signal to the charger/power-path so the arbiter can keep VSYS and only drop charge current. USB-C policy or PMIC load flags can be reused. This is the normal way to keep user actions alive in the charging-domain hotspot guard scenario.
What temperature level should trigger a “this port only” derating?
Use the connector-proximal NTC as the primary trigger, not the board or ambient sensor. The set-point should be below the “user-feels-hot” level and matched to connector material. In the charging-domain hotspot guard scenario we always limit the overheated port first before touching global charging.
How do I avoid false hotspot detection caused by user handling?
Add a time window and a temperature-rise slope check. Hand contact or sun exposure causes short spikes; connector resistance heating is sustained. Ignore very-short events and apply derating only when the slope stays high. This is how we keep the charging-domain hotspot guard scenario from overreacting to user touches.
Can I pause cell balancing when a connector hotspot is detected?
Yes. When T ≥ T2 or a fast connector hotspot is active, let the charger thermal guard tell the AFE/balancer to pause or reduce duty. The charger is the one making the thermal decision; the measurement domain simply follows. This keeps the charging-domain hotspot guard logic coherent.
How fast should the thermal foldback react to protect a plastic chassis?
Plastic enclosures tolerate less surface temperature and store less heat, so the fast path should clamp earlier and harder, then recover slowly to avoid flicker. A 1–2 second observation plus a fast clamp is a good start. This is tuned for port-level thermal derating on plastic chassis, not for pack-level trips.
What happens if the external NTC curve does not match the charger IC’s expectation?
The charger will start derating too early or too late. To fix it, rescale the NTC in firmware/MCU or select a charger that allows programmable T1/T2/T3. Cross-brand swaps must always mention this in the BOM. This keeps the charging-domain hotspot guard scenario accurate even with mixed sensors.
Can I mix a TI charger with an ST temperature sensor and still keep derating accurate?
Yes, as long as you translate the measured temperature into the TI charger’s expected TS thresholds (for example by MCU or LUT). Document the mapping so procurement does not drop that step. This is a common cross-brand pattern for port-level hotspot guard implementations.
How do I log hotspot-induced derating events for BMS coordination without spamming?
Log only “enter T2/T3” and “exit T2/T3” with a throttle, not every 1°C change. A 5–10 second hold-off is enough for cloud/BMS. This way the coordinator still knows charging was limited because of connector heat in the charging-domain hotspot guard scenario.
What BOM remark should purchasing follow so they won’t pick a charger IC without thermal foldback?
Use a clear line: “Keep charger/PMIC with NTC-driven thermal derating and per-port limiting. Do not downgrade to battery-only NTC parts.” This tells purchasing that the page is for a charging-domain hotspot guard scenario and that connector/chassis safety must stay enabled.
