Portable battery buck-boost delivers a stable system rail across wide 2.5–5.5 V battery ranges and USB/USB-PD inputs. By coordinating power-path control, PFM/Auto-Save, and OTG, it achieves glitch-free VIN≈VOUT crossover, low noise, and controlled thermal/EMI—extending runtime while keeping PDO transitions and transients reliable.
Battery Buck-Boost (Portables)
Battery buck-boost for portables delivers a stable system rail across wide battery and USB ranges using PFM/auto-save and coordinated power-path control—without audible noise or crossover glitches.
Battery + USB + System Rail
Unify single-cell Li-ion and USB/PD inputs while keeping the system rail regulated through charge, discharge, and OTG modes.
PFM/Auto-Save Efficiency
Extend runtime at light load with pulse-skipping while controlling audio-band ripple via thresholds, spread-spectrum, and keep-alive current.
Power-Path Priority
Coordinate system-first/battery-first policies, ideal-diode OR-ing, and OTG transitions so rails don’t dip at VIN≈VOUT crossover.
Principle: Transfer & Limits
Use an ideal CCM relation for intuition, then respect boost-domain RHPZ, mode boundaries, and startup/current-limit behavior when you tune for real hardware.
Ideal Transfer (CCM intuition)
VOUT/VIN ≈ D/(1−D) (non-inverting buck-boost, CCM, ideal). Use it to build duty–voltage intuition; real designs deviate with RDS(on), DCR, switching loss, and dead-time.
Boost-Domain RHPZ & Loop Compensation
RHPZ approximately follows fRHPZ ∝ Rload(1−D)2/(2πL). As duty rises or inductor shrinks, fRHPZ drops—reduce crossover bandwidth and shape ESR zero plus slope compensation for phase margin.
PFM/CCM/DCM Boundaries & Ripple
PFM saves light-load power but can leak audio tones; CCM handles steps predictably; DCM changes ripple spectra. Choose PFM→PWM thresholds, spread-spectrum, and small keep-alive load to avoid audible bands.
Pre-Bias Start, Soft-Start & Current-Limit Mode
Keep system rails from discharging at startup; align soft-start slope and power-path direction. Peak CL is conservative at crossover; Valley CL improves efficiency around light load—verify stability near mode boundaries.
Architecture: System-Level Flow
A stable portable rail requires aligned power-path priority, buck-boost mode, and OTG/USB-PD transitions, with JEITA/NTC constraints mapped into available power and PG sequencing to downstream rails.
- Ideal-diode OR-ing enforces system-first or battery-first policy across battery/USB presence.
- OTG 5 V and USB-PD PDO changes must not disturb buck-boost loop; lock mode or bandwidth during transitions.
- JEITA thermal windows via NTC constrain charge/discharge power → shrink buck-boost operating envelope.
- PG/Sequencing: SYS_PG → LDO_EN/VRM; respect pre-bias so no reverse discharge at start/stop.
Design: Actionable Tuning & Trade-Offs
Glitch-free VIN≈VOUT crossover needs aligned bandwidth, current-limit mode, and power-path timing; manage PFM audio noise, place slope/ESR/RC compensation, script OTG/PD transitions, and balance runtime against thermal rise.
VIN≈VOUT Crossover
- Lock mode near crossover (force PWM or raise PFM threshold).
- Peak CL default at crossover; verify Valley CL only if stability proven.
- Reduce loop bandwidth approaching crossover to improve phase margin.
- Add tiny keep-alive load to avoid deep PFM dip.
PFM Audio Noise
- Spread-spectrum; place thresholds away from 100–2 kHz audible band.
- Use keep-alive current or time-windowed PWM in sensitive modes.
- Inductor core & MLCC selection to minimize magnetostriction/microphonics.
Sense & Compensation
- Slope comp ≥ ~0.5·ΔIL (rule-of-thumb).
- ESR zero placed ~1× left of target bandwidth.
- Sense RC must not conflict with error-amp poles; verify near PFM threshold.
- Pre-bias start: soft-start slope within downstream inrush limits.
Power-Path Cooperation
- Ship-Mode enter/exit with hold current policy.
- SMBus/I²C script: before PDO change → lock mode → limit current → transition → release.
- OTG cut-over: optional short inhibit + soft-start reload to avoid reverse discharge.
Runtime vs Thermal
- Plot light/medium/heavy-load efficiency and hotspot ΔT; pick inductor DCR/size accordingly.
- Higher fSW/smaller L raises density but lowers f(RHPZ) → constrain bandwidth.
- Use copper fill, via arrays, and thermal pads to meet ΔT target at full load.
Thermal & EMI: Heat–Noise–Area Trilemma
Choose inductor core and switching plan to meet thermal limits without leaking audio-band noise, and route tight current loops to control EMI—within portable form-factor constraints.
- Inductor selection: core material, saturation current, AC loss, DCR vs. acoustic noise (magnetostriction).
- Switching plan: fSW, spread-spectrum in PWM domain only, define PFM↔PWM mode windows.
- Layout & return path: minimize high di/dt loop area; local MLCC; power/analog ground reunion at one point.
- Acoustic sources: PFM burst patterns, inductor core buzz, MLCC microphonics—mitigate with keep-alive current and component choice.
Use Cases: Map Rules to Real Devices
Each scenario lists input range, load profile, key constraints, a quick parameter recipe, and common pitfalls—so you can apply the design rules directly.
Smartphone / Tablet
- Input: 3.0–4.4 V + USB/PD.
- Load: AP/DDR/RF burst loads.
- Constraints: thin inductor, chassis ΔT, audio sensitivity.
- Quick recipe: fSW 1–2 MHz; ΔIL≈30%·IOUT; PFM→PWM > 200 Hz.
- Pitfalls: PDO switch dropouts; PG mis-sequencing to PMIC.
Wearables (Watch/Band/Hearing Aid)
- Input: 2.7–4.2 V; ultra-light load long duty.
- Load: MCU/sensors/wireless bursts.
- Constraints: audible noise & Iq.
- Quick recipe: PFM primary; keep-alive 1–3 mA; alloy core; spread-spectrum only in PWM.
- Pitfalls: chassis conduction of buzz; MLCC microphonics to bone conduction.
Handheld Instruments (Barcode/IR Thermometer/PDA)
- Input: Battery + cradle power; occasional OTG.
- Load: scan engine/MCU/display/buzzer.
- Constraints: EMI + industrial temp.
- Quick recipe: ΔIL 25–35%; Peak CL at crossover; Ship-Mode leakage < X µA.
- Pitfalls: buzzer beat with PFM; cradle plug transients.
Portable Router / Hotspot
- Input: 3.3–4.4 V + 5 V OTG.
- Load: PA/Wi-Fi peaks; USB peripherals.
- Constraints: conducted/radiated EMI to LAN/RF.
- Quick recipe: force PWM at traffic peaks; shield SW copper; 22–47 µF MLCC ×2–3 near load.
- Pitfalls: OTG cut-over backfeed; LAN cable coupling of SW harmonics.
Medical Handheld (Ward Terminal / Glucose / SpO₂)
- Input: Battery + USB; medical temp/noise limits.
- Load: low-noise AFE + wireless.
- Constraints: very low ripple/noise; strict ΔT.
- Quick recipe: PWM primary + low-noise LDO post-reg for AFE; PFM only in screen-off.
- Pitfalls: PFM tones in sensor band; poor return path to shield/ground.
Action Cam / Imaging
- Input: Battery; wide ambient temperature.
- Load: ISP/sensor/encoder; step loads when recording.
- Constraints: image artifacts from ripple.
- Quick recipe: force PWM near VIN≈VOUT; ESR zero left of BW; isolate lens motor from SW loop.
- Pitfalls: shutter beat with PFM; thermal drift near crossover.
Validation: Cross-Mode Test Loop
Validate across PFM↔PWM, VIN≈VOUT crossover, USB-PD/OTG transitions, audio-band ripple & acoustics, thermal limits, and long-run low-battery edges.
Mode & Crossover (PFM↔PWM / VIN≈VOUT)
- Load steps: 5→30% IOUT (1–10 µs edges).
- VIN sweep: 2.5→5.5 V; dwell at VIN≈VOUT±0.2 V.
- Record: ΔVOUT (mV), settle to ±1% (µs).
- Scope: ≥20 MHz; capture SW node.
USB-PD / OTG Transients
- PDO: 5→9 V & 9→5 V; OTG 5 V in/out.
- Script: lock → limit → switch → release.
- Metrics: mVpp, backfeed (mA), resets.
- Pass: no reset; ripple < target.
Audio-Band Ripple & Acoustic Noise
- Mic 10 cm, A-weighted, 20 Hz–20 kHz.
- Points: deep PFM / boundary / forced PWM.
- Metrics: dBA, tone peaks, 20 Hz–2 kHz mVpp.
- Mitigate via thresholds, keep-alive, spread (PWM only).
Thermal Imaging
- 25/45/60 °C; still air / 0.5 m·s⁻¹.
- Light / medium / full load.
- Metrics: hotspot ΔT, locations, 10-min trend.
- Pass: ΔT ≤ target; safe hot-spot.
Long-Run & Low-Battery Edge
- VIN 2.5–2.7 V for 1–4 h; burst load.
- Metrics: drift (%), jitter (events/h), dropouts.
- Pass: no dropouts; drift/jitter ≤ target.
ICs Matrix: Function-First Selection
Classify devices by functional capabilities—not just electrical specs—to accelerate choices for noise, thermal, and BOM goals.
Texas Instruments
- Series/Part: TPS63070, TPS63802, TPS63020
- Highlights: PFM/Auto-Save, Power-Path, Peak CL, Spread-Spectrum.
- Use: Phones/tablets with PD.
Analog Devices (incl. Maxim)
- Series/Part: LTC3531, LTC3533, LTC3129-1, MAX77827
- Highlights: Ideal-Diode, OTG, JEITA/NTC, I²C Telemetry.
- Use: Medical handhelds / low-noise builds.
Renesas
- Series/Part: ISL91127, ISL91128, ISL9110A
- Highlights: PFM/Auto-Save, Valley CL, Spread-Spectrum.
- Use: Wearables with strict audible limits.
NXP
- Series/Part: PF1550, PF1510, PCA9460
- Highlights: Power-Path, Peak CL, AEC-Q options.
- Use: Hotspot/router & compact PMIC-centric designs.
onsemi
- Series/Part: NCP3165, NCP3170, NCV8876
- Highlights: Ideal-Diode, OTG support, Spread-Spectrum (family-dependent).
- Use: Action-cam / imaging / automotive-lean builds.
Microchip
- Series/Part: MCP1647, MCP1649, MIC2876
- Highlights: I²C Telemetry, JEITA/NTC, Power-Path (part-specific).
- Use: Handheld instruments with logging.
MPS
- Series/Part: MP3429, MP3432, MPQ4470
- Highlights: High fSW, compact BOM, Peak CL.
- Use: Slim phones/tablets; area-constrained builds.
FAQs
Short, practical answers about crossover, PFM audio, power-path, USB-PD, sequencing, sensing, and thermal behavior in portable buck-boost systems. See Design, Thermal & EMI, and Validation for deeper guidance.
How to avoid output dip/glitch at VIN≈VOUT crossover?
Lock PWM or raise the PFM threshold through the VIN≈VOUT window, reduce loop bandwidth to gain phase margin, and prefer peak current-limit during the hand-off. Add a tiny keep-alive load so the controller won’t fall into deep PFM. Validate with VIN sweeps and load steps near the boundary.
PFM audio noise in wearables—what knobs reduce tones?
Shift the PFM→PWM threshold above the audible band, or keep PWM during sensitive modes. Use a small keep-alive current, spread-spectrum only in PWM, and select alloy-core inductors plus low-microphonic MLCCs. Mechanically decouple the inductor from the enclosure to prevent structure-borne buzz.
Valley vs peak current limit near the mode boundary?
Peak current-limit is safer around VIN≈VOUT and during large transients because it constrains overshoot when duty changes quickly. Valley current-limit improves light-load efficiency but can reduce damping near the boundary. Use peak by default, then qualify valley with step-load tests and stability margin checks.
Pre-bias start without discharging system rails?
Enable true pre-bias start, ensure ideal-diode directionality in the power-path, and align soft-start slope with downstream capacitance so no negative current flows. Gate OTG and charger states so the controller never forces the system rail down during ramp. Confirm with reverse-current probes at startup.
Why does input RMS current peak in boost mode?
As duty increases in boost, the inductor and switch carry higher ripple and average currents to deliver constant power to VOUT, pushing RMS upward. Copper loss and switch loss rise non-linearly, heating the inductor. Use larger L or higher fSW judiciously and verify thermal headroom at high duty.
Spread-spectrum: impact on loop measurement & EMI?
Spread-spectrum helps conducted/radiated peaks in PWM, but it smears the switching frequency during loop-gain measurement. Disable it or use long integration windows and coherent sampling. Do not enable spread in deep PFM; it may translate energy into the audible band. Validate both EMI and loop plots.
Selecting inductor core for wide VIN sweeps?
Target Isat ≥ 1.2× peak current and ΔIL ≈ 20–40% of load to balance loss and size. Alloy cores reduce magnetostriction noise; ferrites minimize AC loss at high frequency. Keep DCR low for thermal margin and verify saturation at worst-case boost duty and hot temperature.
PG & sequencing with downstream LDO/VRM rails?
Use SYS_PG to release LDO/VRM enables in order, then sensitive analog/RF rails. Keep pre-bias constraints and discharge paths consistent. On power-down, reverse the sequence to avoid reverse current. Validate timing with logic probes and ensure PG thresholds match the buck-boost accuracy across modes.
Soft-start vs inrush across PFM/CCM/DCM modes?
Soft-start should limit inrush while preserving regulation if the controller hops between PFM, DCM, and CCM. Near the boundary, slower ramps and peak current-limit prevent overshoot. If inrush into large output caps trips protection, pre-charge them or force PWM during the initial ramp period.
Sense-filter RC that won’t destabilize current-mode?
Place the sense RC pole well above the crossover and far from the error-amp pole/zero set. Provide adequate slope-compensation (≈0.5× ripple current) to avoid sub-harmonics. Kelvin-route sense lines and avoid long loops across the SW node. Verify with Bode plots in both buck and boost regions.
When to prefer a two-switch inverting stage for −V rails?
Choose a dedicated two-switch inverting regulator when negative rails need isolation, better EMI control, or fast transient performance. It decouples −V dynamics from the main buck-boost loop and eases compensation. Sequence PG so −V appears after the system rail and discharges first on power-down.
USB-PD transitions: maintaining regulation during PDO change?
Use a scripted hand-off: lock PWM, limit current, change PDO, wait for VBUS settle, then release limits. Monitor back-feed using an ideal-diode path and prevent reverse discharge of the system rail. Validate mVpp at SYS and ensure no brownout resets during 5↔9 V transitions or OTG entry/exit.
Battery gauge interaction with the power-path?
High ripple or rapid mode changes can skew coulomb counters and OCV-based state-of-charge. Align the gauge’s sample window away from PFM bursts, expose power-path state via I²C, and recalibrate at rest. Ensure the ideal-diode prevents reverse current that would confuse charge-flow tracking during OTG.
JEITA temperature control limiting VOUT or current—best practice?
Prioritize current limiting across JEITA windows; reduce VOUT only when system thermal limits demand it. Tie charger derating to system-rail power budgeting so loads adapt gracefully. Log temperature, current limit, and SYS voltage to correlate user-perceived performance with protection thresholds across ambient conditions.
Ship-mode and leakage: how to minimize quiescent drain?
Use a hard power-path disconnect or ideal-diode gate when sleeping, disable OTG, and park GPIOs to avoid sneak paths. Ensure the controller’s ship-mode disables bias blocks, yet preserves RTC/memory rails if needed. Measure leakage at hot and cold; stray pull-ups can dominate the standby budget.
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- Validation hints for VIN≈VOUT, PFM audio, and thermal limits.