Buck-Boost Battery Charger (Single-Cell)

The charger conditions a variable source through buck or boost regulation and a dedicated power-path. When VIN > VBAT it steps down to supply the system and charge the cell; when VIN < VBAT it steps up so the system remains alive and the battery still charges within limits. A seamless crossover strategy prevents VSYS glitches during the VIN↔VBAT transition. The power-path enforces VSYS priority—the device can even start with no battery attached—while leftover power is allocated to charge current. At the input, IIN/VIN-DPM protects weak adapters and long cables from collapse by dynamically limiting input power or maintaining a minimum input voltage. On the battery side, JEITA thresholds driven by the pack NTC apply temperature-aware current/voltage derating. For storage and safety, Ship mode and UVLO (under-voltage lockout) reduce leakage and guarantee a defined shutdown behavior. This combination—power-path control, crossover hygiene, dynamic input management, and thermal policies—delivers continuous operation and predictable charging across diverse real-world sources.

The sequence starts at Attach/Valid, confirming a usable source and a safe battery/NTC window, then soft-starts to avoid inrush. Pre-Charge applies a small current to recover a depleted cell and enforces a low-temperature timeout when the JEITA band is cold. Entering CC, VSYS priority dictates that ICHG is a residual: it automatically compresses whenever the system load rises or DPM protects the adapter. In CV, termination requires both a tail-current threshold and a minimum time window; hysteresis prevents chatter when the system load oscillates. Terminate hands off to Recharge once the open-circuit voltage droops by a defined ΔV, again with hysteresis to reject noise and temperature drift. Fault handlers (OV/UV/OTP/NTC) and thermal foldback operate as parallel limiters, reducing input/charge power without collapsing VSYS, so the device keeps running and data integrity is preserved.

The crossover objective is simple: keep the system stable and avoid an efficiency trough. Inside the crossover window, the controller reduces loop bandwidth and the duty-cycle slew rate (soft-slew) to limit current transients. A defined VSYS ripple band—backed by C_SYS—keeps visual/logic subsystems from blinking. For long cables, line-loss compensation raises the near-end setpoint so the far-end voltage meets target, preventing the window from “stretching” into instability. On noise and acoustics, avoid resonant bands where magnetics may sing; add a snubber if edges are too sharp at the transition. Finally, log source/cable stability and reuse the best-known parameters next time—lightweight self-learning that speeds up lock-in after hot-plug.

System priority means VSYS is always fed before charging. Practically, the controller treats ICHG as residual power that shrinks under load surges or weak sources. To ride through short disturbances, budget hold-up capacitance on VSYS using the engineering relation t_hold = C_SYS · ΔV / I_LOAD; verify it with a step-load test so the UI does not flicker and storage writes complete. Power-up should enable critical rails first and defer high-draw peripherals—staggered load enabling keeps the input and the loop stable. On abnormal events, firmware can drop non-essential features, report the incident, and restore the target profile once VSYS recovers. The goal is not to maximize charge current at all times but to preserve continuous operation while charging proceeds opportunistically.

Accurate control starts with Kelvin sensing on the shunt: route sense traces away from high-di/dt loops and tie grounds at a single point to avoid common-impedance error. Next, pair the time constants: the DPM loop should be slower than the main power loop to prevent hunting yet faster than source-side protection or re-negotiation, so it catches collapses gracefully. Build a power budget that links peak system load, the VSYS target band, and the ICHG ceiling—when the load surges, charging is the first to yield. For long cables, define a remote-voltage target that compensates line loss; keep it modest to avoid stressing the source. Finally, log telemetry fields—IIN, ICHG, VSYS, VBAT, temperature, and DPM trigger rate—so firmware can whitelist stable sources, blacklist problematic ones, and seed the controller with the last known good settings. This coordination keeps VSYS steady, protects adapters, and maintains meaningful charge progress in the background.