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← Back to: eFuse / Hot-Swap / OR-ing Protection

Definition & Boundaries

Electronic Circuit Breaker (ECB) = limit criteria (ILIM, Vdrop, Vout_UV, P-limit) + energy integration (I2t) + reset policy (Auto-Retry / Hiccup / Latch-Off) + event semantics (PG/FAULT, trip_reason, t_event).

Core Argument

  • ECB = “limit criteria + energy budget + reset policy + event semantics”.
  • eFuse ≈ baseline limit/thermal protections; may lack I2t curves or event logs.
  • Hot-Swap = external MOSFET gate control + SOA focus (not an ECB).
  • Ideal-Diode = OR-ing / reverse-feed blocking (not a tripping-policy device).

Required Fields

  • VIN, ILIM, I2t (or P-limit), ttrip, policy mode, PG/FAULT semantics.

Illustrative Diagram

Electronic circuit breaker vs eFuse, Hot-Swap, and Ideal-Diode: scope and boundaries Central ECB block with three arrows pointing to eFuse, Hot-Swap, and Ideal-Diode. Each edge carries a one-line boundary note to avoid conflation. ECB limit + I²t + policy + events eFuse baseline limits; may lack I²t/events ≠ ECB Hot-Swap external MOSFET + SOA different scope Ideal-Diode OR-ing / reverse-feed block not a trip policy
Scope map: an ECB is defined by limit criteria, I²t energy budget, policy timing, and event semantics; do not conflate it with eFuse, Hot-Swap, or Ideal-Diode functions.

Protection Mechanism Overview: Thresholds, I²t, Foldback, P-limit

This chapter consolidates four protection families into one unified, testable state machine to simplify replacement and validation across brands and operating conditions.

Core Argument

  • Thresholds: Current limit (ILIM), output under-voltage (Vout_UV), voltage drop (Vdrop).
  • I2t: Integral of squared current over time ensures time-related protection.
  • Foldback: Current is a function of output voltage (I = f(Vout)), improving stability for cold-start or “soft short”.
  • P-limit: Power limiting (P = Vdrop × I), suitable for wide-voltage buses.

Formulas

  • I2t trigger condition:0→t i²(τ) dτ ≥ Iref² × ttrip
  • P-limit trigger condition: Vdrop × I ≥ Pset

Unified State Machine

Operating regions: Normal → Limit → Trip → Policy (Auto-Retry / Hiccup / Latch-Off). Side thumbnails show the four limit curves.

Unified Protection State Machine Unified state machine for ECB thresholds, I²t, foldback, and power limiting with side mini-plots of the four characteristic curves. Normal Limit ILIM / Vout_UV / Vdrop / P Trip Policy AR / Hiccup / Latch limit reached I²t / P ≥ set trip action Limit curves (overview) Threshold I²t Foldback I = f(Vout) P-limit (V_drop × I)
Unified protection view: Normal → Limit → Trip → Policy. Side plots summarize threshold, I²t (energy budget), foldback (I vs Vout), and P-limit (Vdrop × I).

Priority & Interaction (Short)

  • Hard short: fastest of threshold/I2t/P-limit wins → Trip.
  • Cold-start (large capacitance): prefer foldback to avoid nuisance I2t trips.
  • Wide buses (48/54 V): prefer P-limit to constrain instantaneous thermal rise; I2t governs accumulated energy.
  • Soft short: foldback + I2t dual criteria; use a small de-bounce window (e.g., 50–200 µs) to avoid oscillation.

Selection Window: Feasible Domain (VIN / I_NOM / I²t / Thermal)

Map electrical + thermal limits into a feasible domain so candidates pass A→A / A→B screening with the same yardstick.

Feasible domain = { VIN_range, I_NOM, I_LIM, I²t or P_limit, RθJA, Ambient (Ta), Package }.

Illustrative Diagram

Unified Protection State Machine Unified state machine for ECB thresholds, I²t, foldback, and power limiting with side mini-plots of the four characteristic curves. Normal Limit ILIM / Vout_UV / Vdrop / P Trip Policy AR / Hiccup / Latch limit reached I²t / P ≥ set trip action Limit curves (overview) Threshold I²t Foldback I = f(Vout) P-limit (V_drop × I)
Unified protection view: Normal → Limit → Trip → Policy. Side plots summarize threshold, I²t (energy budget), foldback (I vs Vout), and P-limit (Vdrop × I).

Bus Binning (quick guidance)

Bus Primary Guard Note
12 V I²t + Threshold Common cold-start capacitance; avoid nuisance trips via foldback.
24 V I²t ↔ P-limit (balanced) Check cable impedance & thermal headroom.
48/54 V P-limit first Constrain instantaneous heat; then verify I²t accumulation.

Feasibility Checklist

  • ☐ VIN bin & I_NOM fixed; package & RθJA match ambient Ta.
  • ☐ Choose P_limit or I²t as primary guard per bus class.
  • ☐ Compute Tj = Ta + Ploss · RθJA  →  derive Pset or I²t_budget cap.
  • ☐ Validate cold-start / soft-short / hard-short without spurious trips.

Policy Domain: Auto-Retry / Hiccup / Latch-Off

Treat policies as timing-domain control. Measure PG/FAULT flips, open/restore windows, and cooling intervals to quantify stability and thermal cycling.

  • Auto-Retry: fixed-period retries for transient faults; fast recovery, higher average heat on heavy loads.
  • Hiccup: open → cool → retry; reduces average heat, but too-short cycles cause reset storms.
  • Latch-Off: remains off until human/system reset; prevents repeated stress, no self-recovery at field.

Timing Windows & Thermal Implications

Timing windows for auto-retry, hiccup, and latch-off Three stacked timelines: PG/FAULT toggling, channel on/off state with t_retry and t_cool labels, and junction temperature with saw-tooth cooling. TSD and N_max annotations included. PG/FAULT Channel Tj (thermal) FAULT PG t_cool t_retry N_max & stop TSD threshold
Three stacked views: PG/FAULT toggling, channel on/off with t_cool, t_retry, and N_max, and junction temperature. Too-short cycles → reset storms; Latch-Off requires manual or system recovery.

Selection Matrix (starter values)

Load / Bus Recommended Policy Starter Params
Capacitive @ 12/24 V Auto-Retry or Hiccup t_retry 50–150 ms; t_cool ≥ RL time constant
Constant-power @ 48/54 V Hiccup t_cool ≥ thermal time constant; N_max 3–5
Safety-critical / repeated trips Latch-Off Require operator/system reset; log trip_reason + t_event

Verification Notes

  • Record trip_reason, retry_cnt, PG/FAULT timestamps at low/room/high T.
  • Observe temperature saw-tooth; if average T rises, increase t_cool or switch to Latch-Off.
  • Confirm N_max behavior and TSD interaction (no unintended lockout).

Events & Telemetry: PG/FAULT, Fault Codes, Timestamps

Define a minimal, brand-agnostic observable set (fields + semantics + timebase) so fleet logs are comparable and cloud-ready.

ECB telemetry schema with PG/FAULT semantics and event timestamp mapping to cloud Left-to-right data flow from Chip to Edge to Cloud with a unified field list, PG/FAULT polarity note, and ms→epoch time mapping. Safe 20 px margins used to avoid cropping in WordPress. Chip Edge Cloud PG / FAULT PG = 1 means power-good FAULT = 1 means fault debounce: 50–200 µs (HW) expose t_event_ms counter Mapping / Normalization unify polarity → PG=1, FAULT=1 units fixed; field names snake_case epoch_offset_ms stored in NVM time_sync_src & quality recorded Fleet / Analytics searchable trip timeline brand-agnostic comparisons A→A / A→B acceptance gates Minimal telemetry fields (name · unit · meaning) name unit meaning i_lim_set A current limit setting p_lim_set W power limit setting i2t_budget A2·s energy budget trip_reason enum SC / OC / OT / PWR retry_cnt count retries in current session latch_flag bool latched off t_event_ms ms time since boot t_event_epoch ms absolute epoch time v_drop V V_in − V_out t_junc °C junction temperature (estimated) Timebase mapping t_event_epoch = t_eventms + epoch_offsetms (+ drift_correction) sync sources: RTC / NTP / Host · quality: good / fair / poor
Chip→Edge→Cloud: unify PG/FAULT polarity, lock field names/units, and convert the on-chip millisecond counter to epoch time via a stored offset.

Visibility Acceptance (quick checklist)

  • PG=1 (good), FAULT=1 (fault) after edge normalization; debounce documented.
  • Required fields present: trip_reason, retry_cnt, latch_flag, t_event_ms, t_event_epoch.
  • Units & types fixed; no renaming downstream; brand-raw kept only for audit.

Testing & Validation: Power-up / Short Injection / Thermal Cycling / Timebase Calibration

A reproducible minimal test set to qualify replacements across temperatures, loads, and wiring impedance.

Validation path for an ECB: inrush, short injection, thermal cycling, and timestamp calibration Left-to-right flow with five steps and probe markers: Power-up, Short Injection, Policy Check, Thermal Cycle, Time Calibration; key measurements listed under each step. Power-up VIN ramp + big C log I_inrush check I2t / P-limit Short Injection hard / soft short t_trip, reason retry_cnt Policy Check t_retry / t_cool N_max behavior PG/FAULT flips Thermal Cycle low / room / high I2t consistency TSD threshold Time Cal write epoch offset inject known event verify cloud timeline V_in, V_out, I, PG/FAULT t_trip, reason, retry_cnt t_retry, t_cool, N_max t_junc pk, I2t check t_event_ms → epoch
Five-step path with fixed fixtures: log inrush, inject shorts, measure policy timing, cycle temperatures, then calibrate the timebase and verify the cloud timeline.

Minimal Test Set

  • Power-up with VIN ramp + large capacitance → record I_inrush, Vout ramp, and whether I2t/P-limit trips.
  • Short injection (hard/soft) → record t_trip, trip_reason, retry_cnt.
  • Policy timing → measure t_retry, t_cool, N_max; watch PG/FAULT flips.
  • Thermal cycling → repeat at low/room/high; check I2t consistency, TSD threshold, and t_junc.
  • Timebase calibration → set epoch_offset_ms; inject a known-time event; verify t_event_epoch in cloud.

Thermal & Reliability: Junction Temperature, Energy, Package

Quantify how temperature and energy budgets shape I²t / P-limit behavior so results are repeatable across ambient, package, and airflow.

ECB thermal and energy budget linking P-loss, RθJA, and I²t or power-limit behavior Upper: temperature rise curves for different RθJA / airflow. Lower: dual bars for I²t and P-limit budgets. Right-top shows red no-go region. Temperature rise Energy budgets time (s) Tj (°C) low RθJA (better cooling) mid RθJA high RθJA (worse cooling) Thermal model Tj = Ta + Ploss · RθJA No-go: exceeds Tj,max or package rating I²t budget ∫ i² dτ ≤ budget P-limit budget P = Vdrop · I ≤ Pset Temperature coupling RDS(on) ↑ with T → favors P-limit on 48/54 V buses
Temperature rise depends on RθJA and airflow; energy budgets are split into I²t (accumulated) and P-limit (instantaneous). The red band marks the no-go region above Tj,max.

Representative P/Ns by Bus Class

Brand Part Number Voltage Domain Package / Thermal Notes
Texas Instruments TPS2595 ≤ 18 V (eFuse) Small QFN; check RθJA for continuous current at high Ta.
Texas Instruments TPS2660 4.2–60 V (industrial eFuse) Wide bus; P-limit selection dominates at 48/54 V.
Analog Devices / Maxim MAX17613A 4.5–60 V (eFuse) Similar domain to TPS2660; verify I²t vs. P-limit interplay.
STMicroelectronics STEF12 / STEF05 12 V / 5 V (eFuse) Focus on cold-start foldback; small-outline thermal limits.
onsemi NIS5021 Automotive/Industrial 12 V AEC options; check de-rating with ambient and PCB copper area.
Analog Devices (Linear) LTC4282 / LTC4215 / LTC4227 48/54 V Hot-Swap Controller + external MOSFET; verify board-level RθJA & SOA (Hot-Swap scope).
Texas Instruments LM5069 / LM5066I 9–80 V Hot-Swap (PMBus on LM5066I) Use for 48/54 V racks; align policy timing and telemetry.
Infineon PROFET+2 (e.g., BTS50010-1TAD) Automotive 12 V (High-side) Electronic protection behavior; verify thermal de-rating curves.

Do & Don’t (Repeatability)

  • Compute Pset ≤ (Tj,max − Ta)/RθJA − Pbase before selecting a P-limit.
  • Split I²t into single-event and repeated-event budgets with a 50–200 µs debounce window.
  • Document package, copper area, airflow; re-run thermal checks at low/room/high.

Cross-Brand Substitution (A→A / A→B)

Upgrade “boots once” swaps into a gated, auditable process: curve alignment, telemetry semantics, and policy timing under the same thermal conditions.

Cross-brand substitution gates for ECB with curve alignment and semantic mapping Left: bullet list of A→A and A→B gates. Right: check/cross matrix indicating pass/fail. Bottom: tags of common cross-pairs. Acceptance gates A→A • I²t ±10% • ILIM ±5% • P-limit ±10% • policy match A→B • curve alignment at same T & RθJA • PG/FAULT semantics equal or mapped • t_event resolution in the same ms class Gate matrix I²t ILIM P-limit Policy PG/FAULT Timebase Sample A Sample B Cross-pairs: TPS2660 ↔ MAX17613A LM5066I ↔ LTC4282 LM5069 ↔ LTC4215/LTC4227 TPS2595 ↔ STEF05/12
Acceptance gates and a quick visual matrix to judge pass/fail, with common cross-pairs highlighted for review.

Representative Cross-Pairs (with P/Ns)

Pair Voltage Domain What to Align
TI TPS2660 ↔ ADI/Maxim MAX17613A 4.5–60 V eFuse P-limit, I²t, PG/FAULT polarity, t_trip.
TI TPS2595 ↔ ST STEF05/12 ≤ 18 V eFuse I_LIM, short response, cold-start foldback.
TI LM5066I ↔ ADI LTC4282 48/54 V Hot-Swap w/ telemetry I²t, policy timing, telemetry field mapping.
TI LM5069 ↔ ADI LTC4215 / LTC4227 48/54 V Hot-Swap I_LIM, t_trip, I²t (same T & RθJA), MOSFET SOA (Hot-Swap scope).
Infineon PROFET+2 ↔ onsemi NIS5021-Q Automotive 12 V High-side Limit/thermal de-rating, diagnostic semantics.

Acceptance Deliverables

  • Gate table (A→A / A→B) and signed curve-alignment pack: I-V, I²t, P-limit, policy timing @ same T & RθJA.
  • PG/FAULT semantic map + event fields aligned with the telemetry schema.
  • Test evidence produced using the validation path (power-up, shorts, thermal cycling, timebase).

Layout & Probing Hooks (ECB essentials)

Minimal but critical hooks so Electronic Circuit Breaker (ECB) measurements are repeatable and PG/FAULT stays stable.

Essential probing and routing hooks for reliable ECB measurements Simplified PCB: VIN→shunt→ECB→VOUT with Kelvin sense, named test points (VIN, VOUT, PG, FAULT, ISHUNT±, THERM), and PG/FAULT pull-up + debounce card. 20 px safe margins to avoid clipping. VIN source TP_VIN 4-terminal shunt Kelvin sense TP_ISHUNT− TP_ISHUNT+ ECB current/energy limiter policy & telemetry VOUT load TP_VOUT PG / FAULT wiring open-drain → pull-up to VIO polarity: PG=1 ok, FAULT=1 fail debounce: HW 50–200 µs system RC 1–5 ms TP_PG TP_FAULT TP_THERM Grounding small-signal GND returns to GND_REF (star) — do not share heavy current loop scope coax spring ground preferred; keep leads short
Probe map and routing essentials: Kelvin shunt sensing, named test points, and stable PG/FAULT wiring with defined debounce windows.

Probe Map (copy for silkscreen / test plan)

Test Point Signal Notes
TP_VIN Input voltage Near connector; avoid shared return spikes.
TP_ISHUNT− / TP_ISHUNT+ Kelvin shunt sense 4-terminal shunt; symmetric routing to ADC pins.
TP_VOUT Output voltage After ECB; pair with load return.
TP_PG / TP_FAULT Status lines Open-drain + pull-up to VIO; RC 1–5 ms at system side.
TP_THERM Temperature Thermocouple/NTC near hotspot; log with events.

Repeatability Checklist

  • Kelvin sense from shunt to GND_REF; do not share heavy current loop.
  • PG=1 good, FAULT=1 fault; HW debounce 50–200 µs; system RC 1–5 ms.
  • Use coax spring ground for oscilloscope; document cable/impedance and ambient.

BOM Remarks & Sourcing Hooks

Procurement clauses that preserve telemetry, semantics, and policy equivalence for the ECB.

BOM remark items for ECB to protect telemetry and policy equivalence Left: three must-have BOM clauses with checkboxes. Right: example telemetry fields card. Bottom: supplier deliverables strip. Safe margins included. Copy-paste BOM clauses ECB must support I²t or P-limit and report trip_reason + t_event; parts without telemetry/logging are not acceptable. Policy (Auto-Retry / Hiccup / Latch) must match the original; if changed, update firmware and cloud mapping first. PG/FAULT semantics must follow this page; cross-brand substitution requires curve-alignment records (same temperature and RθJA). Telemetry fields i_lim_set · p_lim_set · i2t_budget · trip_reason · retry_cnt · latch_flag t_event_ms · t_event_epoch · v_drop · t_junc units fixed; snake_case; do not rename downstream Supplier deliverables curve alignment: I-V, I²t, P-limit, policy timing @ same T & RθJA PG/FAULT semantics + debounce values; telemetry sample logs (CSV/JSON)
Put the clauses into the PO: telemetry required, policy equivalence, and PG/FAULT semantics; request a curve-alignment pack and raw logs from the supplier.

Tick-off Template (copy to RFQ / review form)

Item Supplier Evidence Pass
Telemetry present (trip_reason, t_event_ms/epoch, retry_cnt, latch_flag) CSV/JSON sample attached [ ]
Policy equivalence (AR/Hiccup/Latch parameters) timing plots + parameter sheet [ ]
Curve alignment at same T & RθJA I-V / I²t / P-limit plots [ ]
PG/FAULT semantics and debounce documented polarity map + RC values [ ]
Part IDs, lot/wafer, package & thermal data datasheet + lot info [ ]

Copy-paste Clauses

  • ECB must support I²t or P-limit and report trip_reason + t_event; parts without telemetry/logging are not acceptable.
  • Policy (Auto-Retry / Hiccup / Latch) must match the original design. If changed, firmware and cloud mapping must be updated first.
  • PG/FAULT semantics must follow this page; cross-brand substitution requires curve-alignment records at the same temperature and RθJA.

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Troubleshooting Matrix & Fixes

Use a tight loop—Symptom → Trigger/Condition → Observable fields → Root cause → Fix—so logs are reproducible and comparable across brands. Fields follow this page’s schema: i_lim_set, p_lim_set, i2t_budget, trip_reason, retry_cnt, latch_flag, t_event_ms, t_event_epoch, v_drop, t_junc, and PG/FAULT.

How to use this list

  • Record the exact condition (VIN profile, load model, temperature) alongside the event.
  • Always capture time + cause: t_event_ms/t_event_epoch and trip_reason, plus at least one electrical measurement (v_drop or current).
  • Apply the matching Fix, then re-run the relevant step from the validation path.

False trip at cold-start (large Cout)

Trigger/Condition: VIN ramp into big bulk capacitance; inrush surge.

Observables: trip_reason=OC or PWR, PG chatter, t_event_ms, v_drop.

Root cause: Foldback window too tight or I²t too low for inrush.

Fix: Relax low-V foldback slope, lengthen VIN ramp, raise i2t_budget slightly, verify no short with soft-short test.

Hiccup storm (frequent auto-retries)

Trigger/Condition: Repeating load fault; temperature rising.

Observables: Rapid retry_cnt growth, alternating PG/FAULT, rising t_junc.

Root cause: t_cool too short or N_max too small; energy not dissipated.

Fix: Increase t_cool / t_retry; consider Latch-Off for persistent faults; verify stability at temperature corners.

Timestamp drift

Trigger/Condition: Logs misaligned with host time after power cycle.

Observables: t_event_epoch offset vs. external time, time_sync_src/quality (if present).

Root cause: Missing or stale epoch_offset_ms.

Fix: Re-calibrate offset at boot; log sync source/quality; re-emit a known-time event for verification.

PG/FAULT chatter on fast load steps

Trigger/Condition: Rapid load transients or wiring inductance.

Observables: PG flicker without trip, v_drop spikes.

Root cause: Insufficient debounce; ground return coupling.

Fix: Normalize polarity (PG=1/FAULT=1), add 1–5 ms RC at system side, series 33–100 Ω, star-ground small signal returns.

Thermal runaway at high ambient

Trigger/Condition: Elevated T_a, continuous high load.

Observables: High t_junc, early P-limit triggers, v_drop increase.

Root cause: Underestimated RθJA or power budget.

Fix: Reduce p_lim_set or improve cooling; re-compute with Tj=Ta+Ploss·RθJA; repeat thermal sweep.

Late short detection

Trigger/Condition: Hard short but long t_trip.

Observables: trip_reason=SC, mismatch between set and measured limit.

Root cause: Non-Kelvin shunt routing or insufficient bandwidth.

Fix: Kelvin four-terminal shunt; shorten PCB sense path; verify ADC/sample rate; check i_lim_set.

Overload misclassified as short

Trigger/Condition: Heavy but finite load during spin-up.

Observables: trip_reason=SC with modest v_drop.

Root cause: I²t threshold too low; foldback boundary too aggressive.

Fix: Raise i2t_budget or adjust foldback curve; add “soft-short” test case.

High v_drop but no trip

Trigger/Condition: Sustained drop across the path.

Observables: Large v_drop, stable PG, no trip_reason.

Root cause: P-limit disabled or threshold too high; wrong measurement node.

Fix: Enable/tune p_lim_set; confirm v_drop tap points and units; re-check RDS(on) vs temperature.

Excess retries with steady load

Trigger/Condition: Apparent normal operation yet periodic retries.

Observables: Slow retry_cnt growth; occasional PG flicker.

Root cause: Hidden soft-short or loop interaction at start-up.

Fix: Scope input/output rails; lengthen ramp; retune foldback; confirm load start-up profile.

Missing fields in logs

Trigger/Condition: Cloud records incomplete for certain events.

Observables: Absent trip_reason, retry_cnt, or t_event_*.

Root cause: Edge mapping renamed/filtered fields; unit mismatch.

Fix: Restore canonical names/units; re-ingest sample CSV/JSON; add schema validation in CI.

FAQ

What is the practical difference between I²t and a constant current limit in an ECB?
Constant current limit clips the current at a fixed threshold, which protects against steady overloads but can falsely trip during inrush. I²t integrates current squared over time, allowing short high-current pulses while blocking long energy events. In practice, use I²t for energy-bound faults and pair it with a measured limit for steady or soft-short conditions.
On 12–24 V buses, when should I prefer power limiting over I²t?
Choose power limiting when voltage is high enough that modest current still implies large dissipation across the path. P-limit directly constrains Vdrop·I, reducing die heating and connector stress. On lower buses or when inrush energy is the main concern, I²t can be primary with P-limit acting as a secondary guard rail.
How should I set foldback to avoid false trips during cold-start?
Use a two-segment foldback: higher current at low Vout to charge bulk capacitance, then ramp down toward the nominal limit as Vout rises. Coordinate with the VIN ramp and increase the I²t budget slightly for inrush windows. Validate with a worst-case capacitor and cable set, logging PG/FAULT, trip_reason, and t_event_ms.
What retry period avoids a hiccup storm?
Set t_retry and t_cool long enough that junction temperature decays below the repeating-fault threshold, and cap N_max to prevent infinite loops. Typical designs start with tens to hundreds of milliseconds for retries and several multiples for cool-down. Confirm by monitoring retry_cnt, t_junc, and PG/FAULT transitions during fault cycling.
How do I calibrate event timestamps when the device has no RTC?
Maintain a millisecond counter (t_event_ms) on chip and store epoch_offset_ms in NVM after synchronization with an external source (host, RTC, or NTP). Compute t_event_epoch as t_event_ms + epoch_offset_ms, track time_sync_src/quality, and inject a known-time event to verify cloud alignment after boot.
Which signals must be logged to distinguish a short from an overload?
Log trip_reason, v_drop, and a current-related indicator (I²t accumulator or measured limit crossing). Shorts show rapid energy rise and deep Vout collapse; overloads show sustained elevated current with partial regulation. Include t_event_ms/t_event_epoch and policy state to reconstruct the sequence under identical temperature and wiring conditions.
Is it acceptable to use Latch-Off in production and Auto-Retry in validation?
Yes, but guard it with process controls. Validation with Auto-Retry helps map fault envelopes and thermal cycles; production with Latch-Off avoids repetitive stress and nuisance power cycling. If policy differs, update firmware defaults and edge/cloud mappings together, and document acceptance gates so behavior remains auditable across units and suppliers.
How do ambient and junction temperature change I²t behavior?
Higher ambient increases junction temperature for the same load, effectively shrinking safe energy windows. I²t thresholds that pass at room may trip at high temperature. Test at low/room/high with identical fixtures, keep debounce in the 50–200 μs range, and document t_junc alongside I²t triggers to maintain cross-brand comparability.
How do I prevent PG/FAULT chatter during fast load steps?
Normalize signal polarity (PG=1 good, FAULT=1 fault), apply 1–5 ms RC at the system side, and route small-signal returns in a star to GND_REF. Add a small series resistor (33–100 Ω) to damp line spikes. Validate with step loads while logging transitions and verifying no unintended trips occur.
How do I validate P-limit equivalence during cross-brand substitution?
Sweep load while holding temperature and RθJA constant, capture Vdrop·I limits, and compare trip contours versus the original. Log trip_reason, t_event_ms/epoch, and thermal data. Acceptance typically requires ±10% alignment in P-limit and consistent policy timing; include raw CSV/JSON for audit.
What is the minimal dataset required to accept a cross-brand ECB replacement?
Provide the core telemetry fields (trip_reason, retry_cnt, latch_flag, t_event_ms/epoch, v_drop, t_junc), the configured limits (i_lim_set, p_lim_set, i2t_budget), and policy timing. Include curve-alignment plots for I²t and P-limit under identical thermal conditions, plus a brief report tying logs to fixtures and firmware versions.
How do I write BOM remarks to avoid parts without telemetry?
State explicitly that the ECB must support I²t or P-limit and report trip_reason + t_event; parts without telemetry or logging are not acceptable. Add policy equivalence, PG/FAULT semantics, and curve-alignment requirements. Keep wording brand-agnostic, and request sample logs with units and canonical field names before approving any alternates.