Basics & variants (low-side, high-side, slew-controlled, RCB, QOD, current-limited, ultralow-IQ, wide-VIN, SSR), power mux/priority & battery disconnect, USB power distribution, application patterns, key specs, design hooks, quick formulas, and scope boundary vs eFuse/Hot-Swap.
Basics & Variants
Low-Side Switch
N-MOS to ground; simple and low cost—best for non-sensitive loads.
High-Side Load Switch
Integrated MOS + driver to cut the positive rail; more system-friendly.
Slew-Rate Controlled Switch
Soft-start with programmable dV/dt to tame inrush for large C loads.
Reverse-Current Blocking (RCB)
Blocks backfeed during OFF or upstream droop—vital for battery/multi-source.
Quick Output Discharge (QOD)
Fast VOUT discharge to shorten reset and avoid half-powered states.
Current-Limited Load Switch
Electronic limiting (hiccup/foldback) without full eFuse complexity.
Ultralow-IQ / Ship-Mode Switch
nA–µA leakage for wearables and ultra-long standby with push-button on.
Low RDS(on) Subsystem Switch
10–100 mΩ path for A-level peaks; great for USB/subsystems.
Wide-VIN Load Switch
12–60 V+ with gate clamp/ESD—industrial/automotive auxiliary rails.
Solid-State Relay (SSR)
Opto/magnetic-driven isolated switching with very low leakage.
Power Path & Mux
Power Mux / OR-ing Lite
Two inputs with priority & seamless switchover—lighter than eFuse.
Battery Disconnect / Shipping Mode
Back-to-back MOSFETs for true OFF; wake pin/timer to restore.
USB Power Distribution Switch
Per-port OCP/limit/QOD and reverse block (data path not altered).
Application-Focused
Subsystem Power Gating
Domain power-up for camera/RF/SSD/sensors with proper sequence/noise.
Capacitive Loads / Backplane Cards
Controlled dV/dt + ILIM to avoid upstream droop/restarts.
IoT / Wearables
nA leakage, button-on/hold and extreme standby longevity.
Display/Imager Bias Switching
Soft-start + QOD to avoid residual images in display/CMOS sensors.
Server/Data-Center Rails
On-demand domains, backfeed prevention, thermal/power distribution.
Key Specs & Selection
RDS(on) & Loss
Drop/thermal by typical/max values and temp coefficients.
Current Limit / OCP
Constant-current/foldback/hiccup with threshold accuracy & response.
Slew Rate (dV/dt)
Programmable (R/C/pin) and matching to downstream capacitance.
Reverse-Blocking Capability
Behavior with VOUT>VIN and in OFF state (no backfeed).
IQ & Off-Leakage
Active/standby IQ and VOUT leakage—critical for battery life.
QOD Strength
Discharge network strength vs shutdown speed and disturbance.
VIN Range · ESD/Surge
Max VIN, ESD levels, surge withstand for your environment.
Thermal & Package
RθJA, power budget, copper area/vias and package choices.
Design Hooks & Pitfalls
Inrush Math
Iinrush ≈ Cload × dV/dt; verify with ILIM to avoid trips/droop.
Back-to-Back MOS Orientation
True disconnect & reverse block; source routing and gate drive.
Pre-Biased / Powered Loads
Safe startup with pre-biased VOUT—avoid latch/false faults.
RC & Loop Stability
EN/ONx RC noise sensitivity; interaction with downstream LDO/DC-DC.
Ground Bounce & EMI
Minimize hot loops, place Cin/Cout, add snubbers when needed.
PG & Sequencing
Coordinate with PMIC/reset/reference; multi-rail order.
Thermal & Power Cycling
P = I²·RDS(on) plus limit-phase losses; hiccup can cause pulsing.
Port Protection
Low-C TVS near the connector; keep data pairs untouched.
Quick Cheats & Boundary
Slew Capacitor Sizing
Cslew ≈ (Ichg·Δt)/ΔV (see datasheet variant).
Thermal Rise Estimate
ΔT ≈ Ploss × RθJA; copper & via arrays cut RθJA drastically.
Cable Drop
ΔVline ≈ I × Rcable; fix with higher VIN or lower RDS(on).
Scope: Load Switch vs eFuse/Hot-Swap
Load switch = light gating/RCB/QOD; eFuse/HS = surge energy & telemetry.
