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ATX / CRPS / Server PSU Digital Control & PMBus Design

ATX / CRPS / Server PSU Digital Control & PMBus Design

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Modern ATX and CRPS server power supplies combine PFC+LLC power trains, digital control, PMBus telemetry, current sharing and N+1 redundancy to deliver efficient, fault-tolerant rack power. This page walks through key architectures, protections, transient behavior and IC choices so designs can meet real data-center requirements with margin.

Role & Landscape of ATX / CRPS / Server PSUs

ATX, CRPS and other server power supplies provide the primary energy source for the motherboard, CPU VRM, memory, storage, fans and accessory cards inside a chassis. They convert AC mains or high-voltage DC into a regulated bulk bus that the rest of the system can rely on.

Typical server PSUs deliver a few hundred watts up to several kilowatts. Most designs expose a 12 V or 48 V bulk output plus 5 V and 3.3 V auxiliary rails for housekeeping, always-on logic and management controllers.

Common form factors include ATX supplies, 1U / 2U rack PSUs and CRPS plug-in modules seated in a rear backplane. These modules usually support N+1 or N+2 redundancy so that the system keeps running when one unit is removed or fails.

This page focuses on the PSU itself: digital control, stacked PFC+LLC stages, paralleling and current sharing between modules, redundancy behavior and PMBus-based telemetry. Downstream voltage regulation and system-level power management are covered in separate pages and linked as related topics.

Server chassis with redundant ATX / CRPS power supplies Block diagram showing a rack server chassis with two CRPS modules at the rear feeding a shared 12 V or 48 V bus, which then powers the motherboard, CPU VRM, storage backplane and fan tray. N+1 redundancy and current share are indicated. CRPS 1 CRPS 2 AC AC 12 V / 48 V BULK BUS Current share · N+1 redundancy Motherboard CPU VRM Core rails Storage / I/O Backplane & NICs Fan Tray Thermal control 5 V / 3.3 V AUX Housekeeping rails Digital control · PMBus telemetry Fault logs · status · power reporting
ATX and CRPS server PSUs sit at the rear of the chassis, feeding a shared 12 V / 48 V bulk bus that powers the motherboard, CPU VRM, storage, fans and auxiliary rails with N+1 redundancy.

Power Train Topology: PFC + LLC Stacks for High Efficiency

A modern server PSU typically uses an AC-to-DC chain with input filtering and protection, a boost PFC stage up to around 380–400 VDC and a resonant LLC or full-bridge converter that generates the regulated bulk output. Secondary synchronous rectification and DC distribution complete the path.

The combination of boost PFC and LLC is chosen to meet stringent 80 PLUS Gold, Platinum or Titanium efficiency targets while keeping power density and acoustic noise within demanding data center limits.

Secondary-side synchronous rectifiers reduce conduction loss at high output currents, and the 12 V bulk bus then feeds downstream DC-DC converters and sub-rails. Detailed SR control and layout guidance are covered on the dedicated synchronous-rectification page.

A digital controller often supervises both the PFC and LLC stages. It coordinates multi-channel PWM, mode transitions for light-load optimization, protections, and telemetry reporting over PMBus or SMBus.

PFC and LLC power train for server power supplies Block diagram showing AC input and EMI filter feeding a PFC stage, a 380 to 400 V DC link, an LLC stage with synchronous rectifiers and the 12 V bulk and auxiliary rails, with a digital controller managing both stages and PMBus telemetry. AC IN Mains EMI / Protection Surge · Inrush Boost PFC PF < 1.0 → ~1.0 380–400 VDC DC Link Bulk C LLC Stage Resonant half-bridge Soft-switching SR & Rectifier Low-loss outputs 12 V BULK AUX Rails 5 V · 3.3 V · 12 Vsb Digital Controller PFC + LLC PWM · Protections PFC + LLC stack for 80+ efficiency Digital control · PMBus telemetry · light-load modes
The server PSU power train chains AC input through EMI filtering, boost PFC and an LLC stage with synchronous rectifiers to create a 12 V bulk bus and auxiliary rails, coordinated by a digital controller that manages efficiency, protections and PMBus telemetry.

Digital control architecture for multi-loop server PSUs

Modern server PSUs increasingly move from separate analog PFC and LLC controllers plus an auxiliary MCU to integrated digital PSU controllers. A single digital device can host multiple PWM channels, ADCs and a DSP core that coordinates PFC and LLC power stages with consistent timing and protection behavior.

Inside the digital controller, dedicated voltage and current control loops run for the PFC and LLC stages. Soft-start and shutdown profiles, fault blanking, sequencing and mode transitions are handled in firmware instead of fixed analog networks. ADC sampling is synchronized to PWM edges so that digital compensation can achieve stable, fast transient response.

Configuration is table-driven. PMBus commands write output setpoints, loop gains, protection thresholds and timers into non-volatile or shadow registers, avoiding PCB spins when a platform needs tuning. The same hardware can be re-used across different power ratings by changing firmware profiles.

Digital control enables remote updates, field optimization of efficiency curves, richer fault logging and coordinated behavior across paralleled PSUs. ICs that integrate multi-loop PWM generation, high resolution ADCs, a DSP core and PMBus interface form the heart of this architecture.

Digital controller architecture for PFC and LLC server PSU stages Block diagram showing PFC and LLC power stages feeding a 12 V bus, controlled by a digital PSU controller that integrates PWM generators, ADCs, a DSP core, timing and protection management, PMBus interface and non-volatile configuration. Power stages PFC stage V / I sense LLC stage V / I sense 12 V / 48 V bus Digital PSU controller ADC & sampling PWM · PFC PWM · LLC / AUX DSP core & loop control V / I loops · soft-start · mode Timing & protection sequencing · OTP · OCP · faults PMBus / SMBus remote commands Config tables setpoints & thresholds NVM profiles PMBus to BMC / system manager

PMBus telemetry, configuration and black-box logging

PMBus turns the server PSU into a rich data source for the system BMC. Typical telemetry covers per-rail voltage, current and power, input power and estimated efficiency, as well as multiple temperature points on transformers, MOSFETs, diodes and air inlets or outlets.

Fan speed and health, protection and warning flags and current-share status are also exposed. OV, UV, OC, OTP and communication errors can be monitored in real time so that firmware can react before users see service impact.

Configuration commands allow small voltage margining, soft-start slope adjustment, protection thresholds, fan curves and current-share modes to be tuned without changing the PCB. Boards can ship with conservative defaults and be optimized later for specific server platforms.

Black-box logging records key measurements and fault codes for a short window before a shutdown or restart. This demands accurate ADC conversion, time tagging, an event FIFO and an interface to non-volatile storage so that field returns can be diagnosed without guesswork.

PMBus telemetry and logging from server PSU to BMC dashboard Diagram showing a server PSU connected via PMBus to a BMC, with a dashboard displaying rail voltages, currents, temperatures, fan speed indicators and fault status lights, representing telemetry, configuration and black-box logging. Server PSU Rails: 12 V / 12 Vsb / AUX V · I · P telemetry Temp · fan · status PMBus BMC / controller PSU telemetry dashboard Rails · V / I / P Temperatures & fans Status & faults OK Warn Fault Config & black-box log

Paralleling & current-share strategies (N, N+1, N+2)

Server PSUs are often paralleled so that several modules share a common 12 V or 48 V backplane. Basic N modules provide the required power, while N+1 or N+2 configurations add one or more spares that can take over in case of a failure without interrupting service.

Analog current sharing typically uses droop characteristics and a share bus. Each PSU adds a small slope to its output regulation and senses the common share line so that currents converge. Digital schemes exchange load information over PMBus, CAN or dedicated lines and compute the desired output points algorithmically.

Transient behavior matters when a module is inserted, removed or current limited. Loop design must limit overshoot and undershoot on the bus during hand-off and must tolerate unequal cable drops, temperature derating and component spread.

Test plans therefore include current-share error over load, worst-case tolerance across line, temperature and aging, as well as dynamic tests when modules are hot-swapped or forced into fault-limited operation.

Paralleled server PSUs with analog and digital current sharing Diagram showing three server PSU modules feeding a common DC bus, with a share bus and indication of individual currents I1, I2 and I3 contributing to the total load. PSU 1 I1 PSU 2 I2 PSU 3 I3 Share bus / droop 12 V / 48 V DC BUS Server Load ITotal Digital share PMBus / CAN N, N+1 and N+2 configurations rely on controlled current sharing across parallel modules

Redundancy, hot-swap & OR-ing behavior in racks

N+1 and N+2 redundancy ensure that a server rack continues operating even when one PSU module fails. The remaining modules automatically carry the load, while the faulty unit is isolated and can be replaced without taking the system down.

Hot-swap operation depends on controlled inrush, soft-start and coordination with the backplane voltage. OR-ing elements such as ideal diode controllers or OR-ing FETs, often combined with eFuse or hot-swap controllers, prevent a failing module from dragging down the common bus.

Typical failure modes include a shorted output, a low-voltage module, or a communication failure. Digital control and protection devices work together to detect the problem, disconnect the affected module and flag a reduced redundancy state to the system.

PMBus status bits, front-panel indicators and system logs show which module is in fault, whether it has been isolated and how much redundancy margin remains so that maintenance can be planned without surprises.

N+1 redundant server PSU rack with OR-ing and isolated faulted module Diagram showing three PSU modules feeding a DC bus through OR-ing FETs, with one faulty module crossed out and isolated while the remaining modules continue to supply the load. PSU A Healthy PSU B Healthy PSU C Fault OR OR Off Redundant DC BUS Rack Load Still powered Redundancy state Mode: N+1 → N PSU C isolated, replace soon OR-ing and hot-swap design isolate faults while keeping the rack online in N+1 mode

Fault classes, protections & derating in server PSUs

Server power supplies are exposed to electrical, thermal, mechanical and digital stresses, so protection and derating strategies are designed as an integrated system rather than isolated features.

Typical fault classes include AC input over/under-voltage, DC output over-voltage, under-voltage, over-current and short-circuit events on bulk and auxiliary rails. Thermal faults cover device over-temperature on primary and secondary heatsinks, transformer hot spots and fan stall or gradual degradation that raises internal airflow impedance.

Mechanical and interface issues, such as worn backplane connectors or high-resistance bus bars, are detected indirectly through abnormal drops, hotspot temperatures or repeated protection trips. Digital faults include lost PMBus communication, watchdog timeouts, corrupted NVRAM profiles or inconsistent redundancy roles between parallel modules.

Protection actions are selected according to system impact: fast hiccup modes limit stress on silicon and magnetics during hard shorts, latch-off is used where safety or data integrity demands manual intervention, and controlled derating allows a PSU to continue operating at reduced power when temperatures or component limits are approached. Early warnings and alarm thresholds are mapped into PMBus STATUS_* bits and manufacturer-specific logs so that the BMC can react before a full shutdown is required.

From an IC point of view, the controller must coordinate protection comparators, timers, soft-start and restart logic, while tagging each event with time and context so that field diagnostics can distinguish benign inrush from genuine over-stress conditions.

Fault, protection action and system reaction map for server PSUs Diagram with three columns showing server PSU fault classes, internal protection responses such as hiccup, latch-off and derating, and system or BMC reactions such as logging, service request and graceful shutdown. Fault Classes PSU Protection Action System / BMC Reaction Electrical OVP / UVP / OCP / SCP Thermal OTP, fan stall, hot spots Mechanical / Interface Connector, bus bar issues Digital / Control PMBus, NVRAM, firmware Hiccup / Auto-Retry Limits stress during short Latch-Off Manual service required Derating Reduced power, early warning Pre-Alarm STATUS bits, warnings Log & Alert BMC event, SNMP trap Graceful Shutdown OS and workload protection Service Ticket Module replacement request Fleet Analytics Trend and derating policy
Fault classes in a server PSU, the associated protection actions and how the BMC reacts through logging, derating and shutdown policies.

Transient performance, hold-up & coordination with downstream rails

Server PSU specifications include requirements for transient response and hold-up time so that processors, memory and storage can ride through short disturbances and complete a controlled shutdown during longer outages.

Energy for the hold-up interval is stored mainly in the high-voltage PFC bus capacitors and, in some designs, in additional 12 V bulk capacitors near the backplane. Higher hold-up targets push towards larger or higher-voltage capacitors, but this must be balanced against cost, size and inrush current constraints.

Coordination with downstream VRMs depends on timely status signaling. When AC fail or DC bus decay is detected, the PSU asserts POWER_FAIL or de-asserts POWER_OK and raises PMBus alarms, allowing the BMC to throttle loads, flush caches and initiate an orderly operating-system shutdown within the remaining hold-up window.

Fast load steps from CPU turbo modes or accelerator cards can cause large di/dt on the 12 V or 48 V bus. Digital controllers use measured impedance and control loop models to tune compensation, current limiting and active droop so that voltage excursions stay within specification while avoiding oscillation or unnecessary shutdowns.

For systems that also include dedicated hold-up or backup modules, the server PSU timing and status signals need to be consistent with those pages, reusing concepts such as voltage sag windows and graceful transfer without repeating detailed sizing formulas.

Hold-up time and coordination of server PSU rails Waveform diagram showing AC fail detection, PFC bus discharge, 12 V bus hold-up window and POWER_OK and POWER_FAIL status signaling during the available time for graceful shutdown. PFC Bus Voltage 12 V Bus Voltage Status Signals Time → AC Fail Detected Hold-Up Time Window 12 V within spec POWER_OK High POWER_OK De-Assert POWER_FAIL and PMBus alarms OS and BMC use remaining hold-up time to shut down
Server PSU hold-up behavior from AC fail detection through PFC and 12 V decay, showing POWER_OK and POWER_FAIL timing for coordinated system shutdown.

Design checklist & IC role mapping for ATX/CRPS PSUs

This section turns the ATX/CRPS/server PSU architecture into a practical design checklist. The focus is on assigning IC roles across power trains, auxiliary rails, digital control, protection and monitoring, so that each PSU slot in a rack can be implemented and reviewed systematically.

Power train · PFC / LLC / SR

PFC control & drivers

  • PFC topology (CCM/CRM, interleaved) and target 80 PLUS class.
  • Gate-drive strength, UVLO and leading-edge blanking for high dV/dt.
  • Current-sense method (shunt/CT) and THD / PF performance at low load.

LLC / resonant control

  • Frequency range and dead-time adjustment window for ZVS/ZCS.
  • Multi-point protection: OCP/OVP, capacitive-mode and transformer saturation.
  • Frequency-step strategy for soft-start, burst and light-load efficiency.

Secondary SR controllers

  • Conduction criteria (VDS sensing vs. current-sense) and delay.
  • Body-diode conduction time and reverse current blocking under light load.
  • Compatibility with 12 V and 48 V rails and high-current packages.

Auxiliary power & references

Startup & bias flyback

  • Wide-line input capability and cold-start behavior at low AC.
  • Bias power consumption in standby and burst/skip control quality.
  • Isolation, creepage and reinforced insulation options for safety.

Secondary LDO / buck rails

  • PG/RESET signaling toward digital controllers and mainboard.
  • Load-transient response for 3.3 V/5 V standby rails.
  • Quiescent current and efficiency at light BMC and logic loads.

Precision references

  • Temperature drift and long-term stability for supervisor thresholds.
  • Noise performance for ADC reference and comparator trip points.
  • Monitoring of reference failure with window comparators or ADC.

Digital control & communications

Digital PSU controller / MCU

  • Number of digital PWMs for PFC, LLC and fan drivers in one device.
  • ADC resolution, sampling rate and channel count for multi-rail sensing.
  • DSP horsepower and coefficient range for digital compensation and loop tuning.

PMBus / SMBus interface

  • Supported command set for voltage, margining, protections and fans.
  • Addressing scheme for multi-slot CRPS backplanes and redundancy IDs.
  • Glitch immunity, timeout and bus-fault handling in noisy environments.

NVRAM / data logging

  • Non-volatile storage size for configuration, serial data and black-box logs.
  • Endurance and retention for frequent field updates and re-qualification.
  • Secure or authenticated updates when PSU firmware is field-upgradeable.

Protection & OR-ing layer

eFuse & hot-swap controllers

  • Programmable current limit, SOA-aware dI/dt and inrush control.
  • Short-circuit response (fast trip vs. foldback) and auto-retry behavior.
  • Current, power and energy telemetry for backplane health monitoring.

OR-ing FET controllers

  • Forward-voltage emulation and reverse-current blocking performance.
  • Fault isolation time when a paralleled PSU collapses or shorts.
  • Support for N, N+1 and N+2 redundancy and back-feed immunity.

Supervisors & comparators

  • Window thresholds for UV/OV on 12 V / 48 V and standby rails.
  • Timing control for POWER_GOOD, POWER_FAIL and reset sequences.
  • Propagation delay and hysteresis vs. required transient immunity.

Sensing & health monitoring

Current / voltage sensing AFEs

  • Shunt amplifiers or isolated modulators with adequate CMR and bandwidth.
  • Offset and gain drift vs. required current-share accuracy and PF reporting.
  • CMTI and isolation ratings for high-side and PFC sensing points.

Temperature & fan monitoring

  • Number and placement of temperature channels (magnetics, MOSFETs, air).
  • Fan or pump driver capability, tachometer inputs and health flags.
  • Integration with derating curves and fan-speed vs. noise targets.

System-level reporting

  • Mapping of faults into PMBus status words and manufacturer-specific logs.
  • Timestamping and sequence capture for black-box event analysis.
  • Coexistence with platform BMC policies for system power capping.

Example IC families from major vendors (for further selection)

  • Texas Instruments – UCD3138A digital power controller, UCC28070A interleaved PFC controller, UCC256404 LLC controller, INA240 current-sense amplifier.
  • Infineon – XDPP1100 digital server PSU controller, ICE5PCS01G PFC controller, IRS2982S resonant controller, TLE8386 buck controller for aux rails.
  • Analog Devices – LTC2977 power system manager, LTC4282 hot-swap controller with telemetry, ADM1278 PMBus hot-swap/monitor, AD8418 current-sense amplifier.
  • Microchip – dsPIC33EP256GS series digital SMPS controllers, MCP19118 digital PWM controller, MIC28514 synchronous buck regulator for bias and logic rails.
  • NXP – TEA19162 resonant/PFC controller family, TEA1995T SR controller, PCA9450 multi-rail PMIC for logic and standby domains.
  • Renesas – ISL68127 digital multiphase controller, ISL69247 multiphase PWM controller, ISL28022 current/voltage/power monitor for 12 V and 48 V buses.
  • onsemi – NCP81274 multiphase controller, NCP1910 digital PFC/LLC controller family, NCP45491 eFuse / load switch for hot-swap and protection paths.
IC role map and design checklist for ATX / CRPS server PSUs Matrix-style diagram mapping PFC, LLC, secondary, auxiliary power, digital control, protection and monitoring blocks in an ATX or CRPS server PSU to the main IC roles: controllers, drivers, hot-swap and eFuse, supervisors, shunt amplifiers, temperature sensors and PMBus interfaces. ATX / CRPS Server PSU · IC Role Map & Checklist Power Train Aux Power Digital & PMBus Protection Sensing Controllers Drivers Hot-Swap / OR-ing Supervisors Current / Voltage Temperature / Fan Logging & BMC PFC / LLC CTRL Digital PSU CTRL eFuse / Hot-Swap IC LLC / SR Gate Driver Fan / Pump Driver OR-ing FET Driver N+1 / N+2 OR-ing Backplane Hot-Swap UV/OV Supervisors Startup Sequencer Shunt INA / ΣΔ PFC / 12 V / 48 V Sensing Temp Sensors (NTC / IC) Fan Tach / Health PMBus / SMBus Black-Box Logger BMC / System View Legend Controller / Logic Driver / Actuator Redundancy / OR-ing Sensing & Telemetry
IC role map showing how controllers, drivers, hot-swap/OR-ing, supervisors and sensing devices line up with the main ATX / CRPS server PSU building blocks.

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H2-10. FAQs for Digital ATX / CRPS / Server PSUs

1) When should a designer move from analog PFC/LLC controllers to a fully digital server PSU controller?
A move to a fully digital server PSU controller makes sense once efficiency, telemetry and configurability become as important as basic regulation. When many SKUs share one platform, or 80 PLUS targets, dynamic load profiles, field upgrades and detailed PMBus reporting are required, digital control provides faster tuning, richer protection and easier reuse across power levels.
2) How tight does current sharing need to be between CRPS modules in an N+1 rack?
For typical CRPS N+1 racks, current sharing within about ±5–10% between healthy modules is usually sufficient. Tighter sharing reduces thermal stress on any single PSU and improves lifetime. The key is stable behavior during hot-plug, load steps and fault removal, so that no module is briefly overloaded or forced into repeated current limit operation.
3) What are typical failure modes in server PSUs and how should they be reported over PMBus?
Common failure modes include input UV/OV, output OV/UV/OC/SCP, over-temperature, fan degradation or stall, connector heating, communication loss and internal controller faults. These conditions should map to PMBus STATUS words plus manufacturer-specific flags, with clear latching behavior, timestamps where possible and black-box records that show voltages, currents and temperatures close to the shutdown event.
4) How is hold-up time specified and verified for ATX/CRPS supplies in real systems?
Hold-up time is usually specified as the minimum duration that regulated outputs stay within limits after AC input is removed, under worst-case load and input conditions. Verification uses controlled AC drop tests while logging bus voltages, POWER_OK and PMBus flags. System-level tests must include real motherboard, VRM and storage behavior to confirm coordinated shutdown.
5) What is the difference between droop-based and digital current-share schemes?
Droop-based current share relies on each PSU adding a small output voltage slope versus current so modules naturally balance on the common bus. Digital schemes exchange load information via a share bus, PMBus or CAN and adjust each module’s reference or current limit algorithmically. Digital sharing enables tighter accuracy, role management and richer fault handling across the rack.
6) How does an OR-ing FET controller interact with eFuse and the digital PSU controller during faults?
The OR-ing FET controller reacts first to block reverse current or isolate a faulty module from the common bus. The eFuse or hot-swap controller then limits inrush and protects against sustained faults. The digital PSU controller monitors currents, voltages and protection flags, logs the event, asserts fault status over PMBus and may command an orderly shutdown or retry.
7) Which telemetry channels are “must-have” versus “nice-to-have” for modern server PSUs?
Must-have telemetry typically includes input power, key output voltages and currents, total power, critical temperatures, fan speed, STATUS bits and PSU present/enable signals. Nice-to-have channels add per-phase currents, efficiency estimates, lifetime counters, detailed margining data and extra temperature points. The final set should align with fleet-level monitoring, energy reporting and service diagnostics needs.
8) How should fan speed and thermal derating curves be coordinated between the PSU and system BMC?
Fan speed and derating curves work best when the PSU exposes clear temperature, fan tach and thermal margin telemetry over PMBus, while the BMC owns the global policy. The PSU implements safe local fallback behavior if communication is lost. Coordination avoids oscillations, minimizes acoustic noise and ensures that both PSU and system components stay within safe limits.
9) What tests are needed before declaring a server PSU module hot-swap ready?
Hot-swap readiness requires controlled plug-in and removal tests across line ranges, loads and temperatures. Inrush, bus voltage deviations, current-share transients and OR-ing behavior must be verified. Tests should also cover misalignment, slow insertion, faulted modules and communication recovery. The goal is to avoid nuisance trips, bus collapses or damage when technicians swap units in the rack.
10) How do PSU designers validate N+1 redundancy under worst-case line, temperature and load transients?
Validation combines steady-state overload simulations, worst-case line dips and aggressive load steps while forcing one module offline. Remaining PSUs must stay within current limits, meet voltage regulation and avoid thermal overstress. Tests should be repeated at hot and cold temperature corners. System-level trials confirm that VRMs, storage and networks ride through each redundancy scenario safely.
11) When is it acceptable for a PSU to latch off versus auto-recovery after a fault?
Latch-off behavior suits persistent or potentially damaging faults, such as hard short circuits, severe overvoltage, repeated over-temperature or suspected hardware damage. Auto-recovery fits transient or soft faults like temporary overloads or short line sags. The policy should align with safety requirements, service procedures and system-level expectations for uptime versus protection conservatism.
12) How should IC choices differ between compact ATX, CRPS and higher-power rack PSUs?
Compact ATX designs favor highly integrated controllers and simpler communication, with tight cost and board space limits. CRPS modules emphasize high efficiency, rich PMBus telemetry, advanced protections and robust hot-swap performance. Higher-power rack PSUs often require multi-phase PFC and LLC control, stronger drivers, higher-voltage devices and scalable digital architectures that support paralleling.
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