A frequency/time-interval counter converts signal edges into time-referenced numbers. Instead of “showing a waveform,” it anchors measurements to a timebase (internal or external 10 MHz / 1 PPS) and uses counting + interpolation + statistics to deliver repeatable, traceable results.

Measurement menu (what the instrument can output)

Why a counter is not an oscilloscope (engineering reasons)

• Timebase anchoring: results are explicitly referenced to a timebase (internal/external). This supports calibration and long-term comparability.
• Interpolation + statistics: counters combine coarse counting with fine timing interpolation and report stable averages/variation, which helps interpret “how trustworthy” a number is.
• Edge-time definition matters: the measurement is about the event timing (crossing a threshold), so trigger-point stability is a first-class design constraint.

Practical checklist (to avoid misleading numbers)

• Define the quantity: frequency vs period vs interval vs timestamps vs totalize.
• Confirm edge quality: ensure adequate slew rate at the trigger threshold; slow/noisy edges inflate timing uncertainty.
• Confirm reference state: internal vs external 10 MHz / 1 PPS, and whether the instrument indicates “locked/valid.”
• Choose the right mode: gated is fast; reciprocal improves low-frequency resolution; timestamping exposes missing events.

Measurement “mode” defines what is counted, what is timed, and which error term dominates. Three practical modes cover most use cases: gated counting, reciprocal counting, and timestamping.

1) Gated counting (cycle count within a fixed window)

• Mechanism: count cycles N during a gate time T_gate, then estimate f ≈ N / T_gate.
• Dominant limit: quantization of ±1 count, especially at low frequency (small N).
• Best for: quick checks, mid/high frequencies, and applications where speed matters more than ultra-fine resolution.
• Key knob: longer T_gate improves resolution but reduces update rate.

2) Reciprocal counting (time a period/interval, then invert)

• Mechanism: measure time for one or multiple cycles Δt, then compute f ≈ N / Δt (or T = Δt / N).
• Why it wins at low frequency: low-frequency signals have larger periods, so fine time interpolation becomes a smaller fraction of the total.
• Dominant limit: edge timing uncertainty at the trigger point (noise-to-time conversion, time-walk).
• Key knobs: number of cycles N, averaging strategy, and trigger threshold/conditioning quality.

3) Timestamping (time-stamp every event, then post-process)

• Mechanism: assign a timestamp to each edge/event t_k, then derive period/frequency/jitter/missing edges offline or in firmware.
• Why it is powerful: exposes event-level anomalies (bursts, missing edges, overflows) that average-based modes can hide.
• Dominant limit: throughput and data integrity (FIFO depth, overflow flags, missing-edge counters).
• Key knobs: event rate limits, holdoff/arming rules, and overflow reporting (must be monitored).

Mode selection table (rules, not slogans)

Practical pitfalls (the ones that silently ruin results)

• Low-frequency “too good to be true”: short gate time makes ±1 count dominate; increasing Tgate should reduce variance predictably.
• Reciprocal mode disappointment: slow edges increase timing jitter; the root cause is usually low dV/dt at the trigger threshold.
• Timestamp data lies: overflow/missing-edge flags not monitored; post-processing assumes all events are present.
• Hidden dead time: re-arming/holdoff causes blind intervals; verify with known pulse trains and missed-edge counters.

A trustworthy counter result is built by a chain of decisions: where an edge is defined, which timebase anchors the measurement, and how calibration and validity flags travel with the number. The architecture below is a practical mental model for reading datasheets, configuring modes, and interpreting logs.

Data path (what happens to the input edge)

• Input conditioning: turns an analog transition into a repeatable digital edge by defining a threshold and adding noise immunity. The practical outcome is a stable event time; unstable crossings inflate timing uncertainty across every mode.
• Optional prescaler/divider: reduces effective edge rate so internal counting/interpolation can run safely. This block must expose error states (overdrive, saturation, missed edges) so results are not silently corrupted.
• Coarse counter (timebase-referenced): counts whole timebase ticks or cycles during gates/intervals and provides the absolute time scale. If the timebase is invalid, absolute accuracy is not guaranteed.
• TDC interpolation (fine time ε): estimates the sub-tick remainder between an edge and the nearest timebase tick. This improves resolution, but requires calibration (linearity/temperature) to avoid “ps-looking” numbers that are not accurate.
• Processor + statistics: converts raw counts and intervals into frequency/period/Δt, then reports mean, variation (σ), sample count N, and validity flags so the number is interpretable.
• Display + logs: presents the result and records the evidence: mode, gate settings, reference state, overflow/missing-edge counters, and calibration versions.

Validity flags (the evidence that prevents silent failure)

Architecture checklist (quick self-audit)

• Reference: confirm RefValid/Locked status (internal or external) before trusting absolute numbers.
• Edge definition: verify stable trigger threshold and adequate edge slew at the crossing point.
• Prescaler: if enabled, confirm no saturation/overdrive flags and that edge integrity remains intact.
• TDC: confirm calibration table/version is applied and valid over the current temperature range.
• Statistics: always read mean + σ + N, and attach validity flags to exported results.
• Timestamping: monitor FIFO overflow and missing-edge counters; otherwise post-processing can be misleading.

The timebase is the counter’s ruler. External references such as 10 MHz and 1 PPS can improve comparability across instruments, but the key is understanding which specification affects absolute accuracy versus short-term stability. “Low jitter” in this context means the timebase contributes minimal short-term time noise to interval and timestamp measurements.

External reference inputs (10 MHz and 1 PPS): how to use them safely

• 10 MHz reference: sets the frequency scale for the timebase. Use when multiple instruments must agree on absolute frequency/interval results.
• 1 PPS: provides a second boundary marker for alignment and long-term timing consistency when supported by the instrument.
• Lock/validity matters: always record RefValid/Locked (and Holdover if applicable). Reference loss must be logged and data flagged.
• Switching policy: internal/external/auto selection should leave an evidence trail; treat the switching moment as a data boundary.

Reading the right metrics (without diving into oscillator internals)

Timebase checklist (fast decisions)

• Need absolute agreement across labs? use external 10 MHz (and 1 PPS if supported) and record the ref source in logs.
• Fast updates or short gates? stability dominates; use ADEV at matching τ to estimate achievable variance.
• Long averaging windows? accuracy and drift become visible; attach calibration metadata to the report.
• Any ref loss or switching? flag and separate affected data windows; never mix them silently.

Sub-clock timing is not “magic.” A counter reaches fine resolution by splitting time into two layers: a coarse tick count that provides the traceable scale, and a fine interpolator (TDC) that estimates the remainder between ticks. The practical limit is set by linearity, jitter floor, and calibration validity, not by a headline “ps resolution” number.

Common TDC concepts (implementation-agnostic)

Error terms that define the real limit

• Bin width variation → DNL/INL: time bins are not perfectly equal; this creates non-linearity in ε unless corrected.
• Temperature drift: delay elements move with temperature; a valid calibration table must match the operating range.
• Calibration table (mapping): ε needs a correction map (and a known version/age) to be used as an accurate quantity.
• Interpolation residuals: even after correction, repeatability hits a floor (jitter floor) set by the whole measurement chain.

“Trusted resolution” criteria (how to read specs correctly)

Quick validation workflow (user-facing)

1. Confirm the measurement exports σ and N (not only a mean value).
2. Verify a TDC calibration table is present and current (version/age available).
3. Check for temperature validity or drift warnings during long runs.
4. Compare measured spread to the stated jitter floor under a clean edge condition.

In real measurements, the limiting factor is often the input edge, not the internal TDC. Any voltage noise around the trigger threshold becomes timing noise. Slow edges and varying amplitude create larger uncertainty, even if the instrument advertises very fine interpolation.

Time-walk: amplitude changes create systematic timing shifts

• Fixed threshold: if amplitude varies, the edge crosses the same threshold at different times → a deterministic offset (time-walk).
• Constant-fraction concept: triggering at a fixed fraction of the pulse height reduces amplitude-dependent shifts (conceptual method).
• Amplitude gating/windowing: discarding out-of-range pulses improves consistency and prevents biased statistics.

Hysteresis trade-off: stability vs trigger-point shift

• Benefit: hysteresis prevents chatter when noise causes multiple crossings near the threshold.
• Cost: two thresholds (Vth+ / Vth−) mean the effective trigger point can shift with direction and waveform conditions.
• Practical rule: use enough hysteresis to suppress chatter, but not so much that threshold-dependent offset dominates.

Input criteria (what must be controlled)

Diagnostics: separating edge issues from timebase/TDC limits

1. Move the threshold: large changes in mean/σ indicate edge slope and time-walk dominate.
2. Increase edge slope: if σ drops sharply, the measurement is edge-limited (not TDC-limited).
3. Apply amplitude windowing: if mean shifts, time-walk was present in the unfiltered dataset.
4. Compare to jitter floor: only near-floor results justify blaming timebase/TDC as the limiter.

At high input frequencies, the first priority is reliable edge capture. A prescaler/divider reduces the edge density so the counter or timestamp engine stays within its internal bandwidth. This improves robustness, but it also introduces new constraints: added timing uncertainty, threshold sensitivity, and overdrive/limiting side effects.

What prescaling can break (and how it shows up)

Missing edges vs double counts (pulse-train reliability)

• Missing edges are typically driven by insufficient edge quality (low slope at the threshold), overload recovery, or internal re-arming pressure.
• Double counts often come from multiple threshold crossings (noise or ringing) when hysteresis/conditioning is insufficient.
• Practical rule: treat edge quality and overdrive status as part of the measurement record, not as “setup details.”

Selection guide: ratio + threshold policy (no oscilloscope front-end details)

Minimum “trust record” fields for high-frequency counting

• Ratio: prescaler/divider setting applied to the run.
• Trigger policy: threshold value and hysteresis state (if used).
• Integrity counters: missing-edge and/or double-trigger indicators, if provided.
• Overdrive status: limiter/overload indicator if available.

Missing events usually come from blind time and throughput limits, not from “random errors.” After a measurement window ends, the instrument may require time to re-arm, clear state, process timestamps, or export results. In high-rate timestamping, the limiting chain is often capture rate → FIFO depth → output bandwidth.

Throughput model: capture → FIFO → processing/output

• Capture rate: how fast edges can be timestamped and written into the FIFO.
• FIFO depth: the burst buffer that absorbs short spikes in event rate.
• Processing/output bandwidth: how fast timestamps can be reduced, logged, or exported without backpressure.

“No-miss” criteria (practical, auditable)

Mandatory record fields for timestamp runs

• Windowing: window length, re-arm/holdoff settings.
• Counts: Ncaptured, Ndropped (if available), OverflowCount.
• Validity: overflow flag state per window and any “data valid” indicator.

Quick diagnosis map

1. Overflow rises: FIFO/output throughput is the bottleneck — reduce event rate or increase buffering/export capacity.
2. Missing-edge rises without overflow: front-end trigger policy or holdoff is the limiter — adjust threshold/conditioning.
3. Both rise: event density is beyond the full chain capacity — prescale/divide and re-check integrity counters.

Multi-channel time-interval work is only trustworthy when two different problems are managed at once: time scale and channel zero alignment. A common timebase keeps the scale consistent, but it does not guarantee that two channels share the same effective “time zero.” Channel-to-channel results must therefore be corrected by a skew calibration table and validated across temperature and time.

Where channel skew comes from (counter viewpoint)

• Path delay: each channel has its own conditioning and threshold-crossing path, creating a constant offset.
• Interpolation mismatch: independent TDCs rarely share identical bin behavior; residual nonlinearity becomes skew.
• Trigger policy differences: threshold/hysteresis inconsistencies shift the effective time pick-off between channels.

Practical skew calibration workflow (pulse split method)

Acceptance checks (what proves alignment is “good”)

Minimum “trust record” fields for channel-to-channel intervals

• Timebase status: locked/valid state and the reference selection status.
• SkewCalTable: CalVersionID, CalAge, TempTag (or declared validity window).
• Trigger policy summary: threshold/hysteresis consistency across channels.
• Integrity flags: overflow/dropped/missing-edge indicators for the capture window.

Traceable results require a clear calibration structure and a repeatable uncertainty budget. Calibration is best treated as two layers: (1) timebase calibration that sets the time scale, and (2) delay/interval calibration that removes interpolation nonlinearity, channel skew, and trigger-related offsets. An uncertainty budget then documents what still remains and how it is combined into a defensible final number.

Minimal uncertainty budget template (practical and auditable)

Self-test and calibration interval management

• Reference injection: periodically inject a known reference edge/period to validate the full measurement chain.
• Known delay check: verify delay/interval correction using a known delay element or a certified periodic source.
• Calibration reminders: store CalInterval and raise a validity flag when the interval is exceeded.
• Drift tracking: log skew/zero trends over time to predict when recalibration is needed.

Mandatory report fields (traceability checklist)

• CalVersionID, CalDate, CalAge, CalInterval.
• Timebase status (valid/locked) and reference selection state.
• Uncertainty summary (budget items + combined value) and the measurement mode used.
• Validity flags (over-temp, expired calibration, overflow/dropped events).