Key KPIs that define a “good path”

• Leakage & insulation: off-path currents through switches, PCB surfaces, and connectors (often temperature/humidity dependent).
• Thermal EMF: µV-level offsets from dissimilar metals plus temperature gradients at terminals and relays.
• Contact resistance stability: repeatability after switching; drift, bounce artifacts, and early “sticky contact” symptoms.
• Settling behavior: time to a valid reading after connect/range changes (parasitic C charge, bias recovery, source impedance effects).
• Crosstalk & bandwidth: coupling from adjacent channels and shared nodes; path capacitance and impedance vs edge rate.
• Protection robustness: survivability under miswires, ESD, hot switching, and unknown potentials.
• Path self-test: ability to prove the routing path is sane (open/short/stuck relay) without external fixtures.

This page answers (typical engineering questions)

1. Why can µV / nA / high-Ω measurements be dominated by leakage and thermal EMF in the switching path?
2. How do scanner, matrix, and tree architectures change parasitics, settling time, and crosstalk risk?
3. Which path errors are “static” (offset/leakage) vs “dynamic” (settling/charge injection), and how can each be verified?
4. What protection elements should exist on a mux card so mistakes do not destroy the switch fabric or the measurement port?
5. How can a mux/scanner card self-check the path (open/short/stuck) to prevent silent bad data?

Scanner (1-of-N / 2-of-N / banked)

• Gives: simple sequential measurements; high channel count with low hardware complexity.
• Costs: shared nodes can couple noise and common-mode shifts across channels; long “tail” settling for high-Z sources.
• Typical failure symptom: readings depend on the previous channel (history effect), or drift during fast scanning.
• Fast validation: alternate two very different channels (high-Z vs low-Z) and check for bias/settling differences after switching.

Matrix / Crosspoint (X×Y, 2-wire, 4-wire)

• Gives: any-to-any routing; flexible pairing; supports complex test setups and reconfiguration.
• Costs: more crosspoints mean more coupling paths and higher parasitic complexity; channel-to-channel uniformity is harder.
• Typical failure symptom: crosstalk or noise rises when adjacent crosspoints switch, even if the active channel is unchanged.
• Fast validation: hold a “victim” channel at a quiet condition and toggle a high-swing “aggressor” path; measure induced transient/noise.

Tree / Cascaded Mux (staged switching)

• Gives: fewer switches for large channel counts; structured routing for banked instruments.
• Costs: parasitic capacitance accumulates across stages; deeper paths settle slower and vary with route depth.
• Typical failure symptom: scan timing that works for shallow channels fails for deep channels (path-dependent settling).
• Fast validation: measure settling time on the shallowest vs deepest route using the same source impedance; compare required delay.

4-wire (Kelvin) routing note: why “paired switching” matters

In 4-wire measurements, the force pair drives stimulus and the sense pair reads the DUT node. A matrix must establish (and release) Force HI/LO and Sense HI/LO as a coordinated connection. If force and sense paths are built in mismatched timing or through different parasitics, the system can look stable while hiding systematic errors, especially during channel switching.

• Risk: transient node movement and charge sharing when only half the Kelvin path is connected.
• Mitigation: paired connect/disconnect sequences and a dedicated settling window before accepting data.

Selection table (use this to avoid “topology regret”)

• High impedance / picoamp / insulation → prefer topologies that simplify guarding and minimize off-path coupling; validate humidity/temperature sensitivity.
• General voltage/resistance scanning → scanner is cost-effective; validate history effects and settling vs source impedance.
• Any-to-any connectivity / frequent reconfiguration → matrix/crosspoint; validate crosstalk with aggressor/victim toggles.
• Very high channel count with structured routing → tree; validate worst-case (deep path) settling and path-to-path variation.

Practical rule of thumb (with boundaries)

• µV / nA / high-Ω: prefer low-leak relays + guarding, and validate temperature/humidity sensitivity.
• High channel density / fast scan: solid-state can win on density and speed, but requires explicit control of Cpar and charge injection (settling windows, dummy reads).
• Mixed signals: partition “quiet” low-level paths from high-energy channels; otherwise the switch type alone will not prevent drift and crosstalk.

A) Leakage / insulation (off-state reality)

Metric: off-state leakage is not only a switch property; PCB surface contamination and connector insulation can bypass the contact. Solid-state off current often increases with temperature and can be accompanied by a capacitive “AC path.”

Risk: “disconnected” channels still influence readings, high-Ω measurements show apparent conductance, and zero offsets worsen at elevated temperature/humidity.

Verify quickly: hold the channel OFF and record residual current/offset vs temperature change; compare guard ON vs guard OFF; repeat after cleaning/drying to separate switch leakage from surface leakage.

B) Charge injection & parasitic capacitance (settling killers)

Metric: solid-state switching can inject charge into high-impedance nodes; both relay and solid-state paths carry parasitic capacitance that must be charged/discharged on each connect.

Risk: after channel switching, readings jump then “creep” to final value; fast scans look inconsistent because each measurement sees a different settling point.

Verify quickly: step-test with two source impedances (low-Z vs high-Z) and capture the time to a stable threshold; add a dummy read (discarded sample) and confirm stability improves.

C) On-resistance & non-ideal transfer (when “a switch” becomes an analog element)

Metric: relay contact resistance is usually low but can drift and vary with mechanical state; solid-state R_ON can vary with voltage and temperature and may introduce non-linearity in some paths.

Risk: resistance measurements show range-dependent bias; repeated switching creates step-changes or increased noise as contacts age.

Verify quickly: route a stable reference (short or known resistor) through the same path and log the distribution over repeated connect/disconnect cycles (mean + spread + outliers).

D) Lifetime & failure modes (silent data corruption risk)

Metric: relays can wear, oxidize, bounce, or stick; solid-state can be damaged by over-voltage transients, leading to elevated leakage or shorts.

Risk: the worst case is “still switching” but producing wrong data—intermittent contact, partially shorted paths, or temperature-sensitive leakage increases.

Verify quickly: track per-channel settling time and repeatability over time; add a simple path self-check (open/short/stuck) to prevent silent failures.

E) Why Reed / EMR / MEMS / PhotoMOS are chosen (in one line each)

• EMR (electromechanical relay): general switching and wide signal handling; validate contact stability and thermal EMF for low-level work.
• Reed relay: often preferred for low-level paths; still requires cleanliness and temperature-gradient control at terminals.
• MEMS relay: density potential with relay-like behavior; validate long-term stability and parasitics per route depth.
• SSR / PhotoMOS: fast, compact, and controllable; validate off-state leakage vs temperature and switching-induced transients for high-Z nodes.

Troubleshooting table: symptom → likely mechanism → fastest check

Guarding note: shield mainly reduces field coupling; driven guard mainly reduces leakage by holding insulation surfaces near the node potential.

“Settling time” on a mux/scanner card is the time required for the routing path to stop influencing the value. It is a combination of parasitic charging, source impedance, front-end recovery, and the measurement window (integration / digital filtering). A reliable scan is built by design, not by guessing delays.

A mux/scanner card often sees unknown nodes: miswired sources, live channels, ESD hits, surge energy, and inductive kick. Protection must cover three targets—the switch device, the backend measurement engine, and the DUT— while avoiding silent measurement corruption caused by protection parasitics (leakage and capacitance).

Protection targets (what must be saved)

• Switch devices: prevent over-voltage, over-current, arcing, and transient overstress.
• Measurement engine: keep inputs within safe limits even during faults and hot-switch events.
• DUT: avoid injecting energy that changes the DUT state or damages sensitive nodes.

Risk list → card-level action (and the side effect to watch)

Design principle: use tiered protection and keep a precision mode (low leakage / low Cpar) separate from a survivability mode (maximum fault tolerance).

Simple rules that prevent expensive damage

• Protect early: stop ESD/surge energy at the terminal side before it enters the matrix.
• Limit energy: current limiting and staged clamping are safer than a single “hard clamp” everywhere.
• Control the order: for hot-switch and inductive cases, sequencing reduces stress more than component count.
• Measure the side effect: every protection part adds leakage/Cpar—validate precision mode with guard and high-Z tests.

A mux/scanner card is not electrically transparent. Once signals share connectors, traces, switch devices, and return paths, the card becomes part of the analog link. Crosstalk and bandwidth loss usually come from coupling paths (capacitance, shared nodes, and shared return impedance), not from “bad switching” alone.

Where crosstalk really comes from (card-level coupling paths)

Three design rules that work (at the card level)

1. Isolation: increase physical and electrical separation between aggressors (high level / fast edge / high energy) and victims (µV / nA / high-Ω).
2. Partitioning: use banks/zones and keep “quiet islands” (guard/analog ground islands) away from “dirty zones” (high voltage, switching edges, inductive loads).
3. Return-path control: control where currents return; avoid a single shared shield/ground path that spans both quiet and dirty zones.

When a layered matrix helps (coarse + fine routing)

If the system must route both high-energy / fast-edge channels and precision quiet channels on the same card, a single dense matrix often forces unwanted coupling. A practical approach is coarse selection (farther, tolerant routing) followed by a short fine matrix placed near the precision measurement port. This keeps the most sensitive path short and reduces exposure to the dirty zone.

Guarding is not “extra shielding.” A driven guard makes the voltage across an insulation/leakage path close to zero by driving the guard conductor near the sensitive node potential. Triax cabling extends the guard concept into the cable so that high-impedance nodes remain protected from surface leakage and humidity sensitivity.

Driven guard: the leakage-reduction mechanism

• Leakage is driven by voltage across insulation: contamination or moisture creates a parallel path on surfaces and dielectrics.
• Guard follows the sensitive node: when guard is held near the node voltage, the voltage across the leakage path collapses.
• Result: leakage current is strongly reduced, and high-Ω / pA measurements stop drifting with humidity and cable motion.

Correct connection vs common mistakes (fast diagnosis)

Practical symptom mapping: if readings worsen with humidity, cable motion, or finger proximity, suspect surface leakage and guard misconnection first.

Cleanliness and materials (card/terminal level)

• Flux residue & moisture: forms a conductive film that looks like a parallel resistance across the input.
• Finger oils: create localized leakage paths and make results sensitive to touch and cable bending.
• Terminal gradients: dissimilar metals and temperature differences can create small offsets; keep terminal blocks thermally stable.

A scanning card should do more than “connect pins.” It should prove that the selected route is still healthy: no open paths, no unintended shorts, no stuck relays, and no growing leakage or contact resistance that will quietly corrupt precision results. Self-test works best when a known reference is injected through the same route used for measurement.

Self-test types (what to detect without external fixtures)

• Open/short detection: identify missing connections, broken solder joints, or channel-to-channel shorts using internal loopbacks and reference checks.
• Stuck relay detection: verify that a route actually opens when commanded (welded contact or latch-up style failure).
• Contact resistance trend: track slow degradation by comparing the same reference signature over time (trend matters more than absolute value).
• Leakage trend: detect contamination/humidity sensitivity by monitoring baseline drift in “open” and “guarded” states.
• Bounce counters: count retries/timeouts after switching; rising bounce or settle time is a practical health indicator.

Reference injection (validate the route, not just the meter)

• Route coverage: inject the reference before the switch matrix so the test includes terminals, protection, switch elements, and routing.
• Stability over precision: the reference does not need to be “metrology perfect” to catch opens, shorts, and trends—repeatability is the key.
• Multiple modes: a small set of selectable references (R/V/I) increases fault coverage without adding complex hardware.

Loopback and signature checks (fast “sanity proofs”)

An internal loopback removes dependence on the DUT and makes tests reproducible in production and in the field. The goal is not to model every analog detail, but to detect a signature change when the path is unhealthy.

• Open signature: a commanded connection does not produce the expected response.
• Short signature: the response is too large or appears on unintended channels.
• Stuck signature: the response remains after a disconnect command.

Self-test coverage map (fault → observable → acceptance rule)

Recommended cadence: run open/short/stuck checks at power-up; run trend checks periodically; run a quick reference check after abnormal settle timeouts.

Robust scanning is built from a small set of control patterns: a structured scan list, safe switching rules, bounce handling, and a minimal ready/valid handshake with the measurement engine. The goal is repeatable data, not complex system-level trigger routing.

Scan list structure (reduce settling and surprises)

• Group by behavior: keep quiet/high-impedance channels together; keep high-energy/fast-edge channels together.
• Bank-aware ordering: switch banks in a predictable order and avoid repeatedly crossing between quiet and dirty zones.
• Insert separators: between incompatible groups, add a dummy/bleed step or a reference check to prevent memory effects.

Break-before-make vs make-before-break (choose safely)

Debounce and bounce handling (simple and effective)

1. Connect the route and wait a short stabilization interval.
2. Pre-read and discard to absorb bounce and injection artifacts.
3. Confirm with a second read; if unstable, retry with a bounded count.
4. Log counters (retry count, settle timeouts) as health signals for maintenance.

Minimal ready/valid handshake (keep it small)

• CONNECT done: switches are in the commanded state.
• SETTLE done: discard window completed; route is stable enough to measure.
• MEASURE done: measurement engine reports valid data; firmware advances to DISCONNECT and logging.

This worksheet turns routing concepts into procurement-ready requirements. Fill the blanks to produce a clear spec: signal limits, allowed path errors, switching element rules, protection severity, and self-test coverage.

1) Signal layer (what must be routed)

2) Error layer (what the path is allowed to add)

3) Switch layer (what switching element is allowed)

• Low-level precision routes: prioritize ultra-low leakage and stable contact behavior; require guard support for high-Ω use cases.
• High-density or fast scan routes: allow solid-state switching, but constrain charge injection and parasitic capacitance to protect settling and repeatability.
• Hot-switch constraints: define whether make-before-break is permitted; default to break-before-make for unknown nodes.

4) Protection layer (miswire, surge/ESD, hot-switch)

5) Self-test & logging (what must be provable)

Minimum expectation: the card can prove route sanity with internal reference injection and reproducible loopbacks, and it logs health counters for maintenance.

Example parts (reference only; choose ratings per spec)

• Reed relay (low-level switching): Pickering 103-1-A-5/1 (Series 103 example).
• PhotoMOS / solid-state relay: Omron G3VM-41AY1 (PhotoMOS example).
• MEMS relay-replacement switch: Analog Devices ADGM1304 (SP4T MEMS switch).
• Precision low-leakage analog switch: Texas Instruments TMUX6136 (dual SPDT precision switch).
• Driven guard / ultra-low bias buffer (guarding helper): Analog Devices ADA4530-1.
• ESD clamp at terminals (example): Nexperia PESD5V0S1BA.
• Surge/overvoltage TVS (example): Littelfuse SMBJ58A.
• Resettable fuse for “disaster-level” protection (example): Bourns MF-R050.

These part numbers are placeholders to speed up a first-pass BOM. Final selection must match voltage/current, leakage, capacitance, and switching stress targets in this worksheet.

These FAQs focus on the card-level switching path: topology choice, leakage and thermal EMF pitfalls, settling time, protection for miswire/hot-switch, and practical self-test patterns that prove the selected route is healthy.