PGA-Type / Programmable-Gain Instrumentation Amplifiers (INA)
← Back to:Instrumentation Amplifiers (INA)
A PGA-Type INA enables one measurement front-end to cover multiple ranges by switching gain safely and deterministically. The key is to treat gain changes as timed events—define switching windows, settling/valid-data rules, and per-range accuracy/noise budgets so the ADC always sees predictable, verifiable behavior.
H2-1. What is a PGA-INA (and when it beats fixed-gain INAs)
Definition (one line)
A PGA-Type instrumentation amplifier (PGA-INA) is an INA with digitally selectable gain steps (often via I²C/SPI), enabling one front-end to cover multiple input ranges while keeping measurement fidelity within each range.
Why PGA-INA exists (the range problem)
- One sensor, many magnitudes: small signals demand high gain for resolution, while large signals demand headroom to avoid overload.
- One ADC, optimal use: gain steps keep the ADC input within its best SNR/linearity zone across changing operating conditions.
- One front-end, scalable DAQ: replacing multiple fixed-gain paths reduces BOM and improves maintainability, especially with optional MUX.
Where it wins (clear, testable conditions)
- Wide input span (small signals + occasional large transients) but a single ADC range is preferred.
- Multi-range process control and DAQ front-ends requiring consistent behavior across ranges.
- Plug-and-play sensors or uncertain source levels (auto-range or operator-selected range).
- Tight throughput or control-loop latency: gain switching introduces settling time and potential “discard samples.”
- High source impedance or frequent MUX switching: leakage and “memory” effects can dominate.
- Cross-range accuracy requirements: each gain may need its own error model and calibration.
Range planning checklist (turn “multi-range” into a design spec)
Define each gain range as a complete contract: input span, headroom, noise target, and switching cost must be explicit.
- Input span per range: max differential input + required overload margin (include sensor faults and CM variation).
- Noise/resolution target: map INA noise (wideband + 0.1–10 Hz) into effective input resolution for the measurement bandwidth.
- Headroom: verify input CM range and output swing across gain codes and load; avoid near-rail compression.
- Settling budget: set a numeric pass criterion for post-switch settling (e.g., settle < X LSB within < Y µs under defined ΔV/RL/CL).
- Switching policy: hysteresis, minimum dwell time, and safe sampling sequence (discard N samples or gate ADC conversions).
H2-2. Internal PGA implementations inside INA (ladder, switched networks, chopper+PGA)
Implementation families (what changes when the gain code changes)
PGA behavior is set by how gain is realized internally. Different implementations move risk among noise, linearity, and switching artifacts.
Gain steps come from precise resistor ratios. Expect clean DC behavior when ratios are stable, but switching injects charge and reconfigures loop dynamics.
The loop is re-shaped per gain. Stability, settling, and overload recovery can vary significantly across codes—verify worst-case per range.
Gain is set by internal biasing or gain cells. Noise and linearity depend on internal node swing and bias regions; datasheet conditions matter.
Ultra-low offset/drift can be achieved, but ripple artifacts and filtering interactions may change with gain codes. Treat each gain as its own “behavior mode.”
The three consequences that must be verified per gain code
- Check input-referred noise density and low-frequency noise, then map them into the actual measurement bandwidth.
- Confirm whether noise scales with gain code as expected, or whether internal nodes dominate at certain codes.
- Verify output swing and load drive across codes; near-rail compression often appears first at high gain.
- Ensure the expected input CM range remains valid under the chosen gain and output loading.
- Gain switching can cause a glitch and a re-settling tail; define a numeric settling-to-error-band criterion.
- Overload recovery and CM step recovery may differ by code when the loop is reconfigured.
Gain step error sources (a budget-friendly decomposition)
Treat each gain code as a separate error mode. Cross-range consistency requires tracking which term dominates per code.
- Ratio error (DC gain error): resistor ratio or gain-cell variation creates a per-code gain error and drift term.
- Injection-induced step (glitch): switch charge injection and internal node re-charge appear as an output step + tail.
- Ib × Rs sensitivity: input bias current and leakage translate source impedance into offset and apparent gain shifts.
- Headroom-limited compression: insufficient output swing or internal node swing causes nonlinearity that is often code-dependent.
- Gain error and gain drift per gain code, not only “typical at one code.”
- Settling after gain change with explicit ΔV, RL, CL, measurement bandwidth.
- Input bias/leakage vs temperature and input CM, especially for high source impedance sensors or MUX systems.
H2-3. Gain switching transients: glitch, settling time, and overload recovery
What appears on waveforms (three signatures)
- Glitch / step: a fast spike or step right after the gain code changes.
- Settling tail: a slower return into an error band after the initial glitch (often an exponential tail or mild ringing).
- Overload recovery: if the output hits a rail (or internal nodes saturate), recovery can be much longer than “small-step settling.”
What dominates the transient (ranked by practical impact)
Reconfiguring gain networks injects charge and forces internal nodes to re-bias, creating a fast glitch plus a re-settling tail.
Some gain codes reshape the closed-loop response. The same load can be stable at one code but ring or settle slowly at another.
ADC input capacitance, anti-alias caps, and parasitics act like a dynamic capacitive load that stretches tails and can excite ringing.
Near-rail operation or common-mode steps can slow recovery. Large steps may enter slew/limit regions, extending settling time sharply.
How to read “settling time” in datasheets (conditions are the spec)
Settling time numbers are only meaningful when ΔV, RL/CL, measurement bandwidth, and the error band definition are stated. Board-level loads often differ from datasheet loads.
- ΔV (step size): larger steps are more likely to enter slew/limit regions and extend tails.
- RL / CL (load): ADC sampling caps + filter caps + parasitics create a much harsher load than “light RL.”
- Measurement bandwidth: bandwidth limits can hide peak glitch but do not remove tail energy.
- Error band: “to 0.1%” and “to 0.5 LSB” are different acceptance criteria.
Executable measurement script (repeatable and acceptance-ready)
- Hold a steady differential input and steady common-mode.
- Toggle the gain code at a known edge and capture output peak (±).
- Define an error band ±X (output or input-referred).
- Measure t_settle to enter and stay within ±X for a hold time T_hold.
- Force a worst-case event (rail hit or internal saturation).
- Measure recovery back to linear behavior and residual error.
- Peak glitch: < X mV (or input-referred < X µV) under defined ΔV/RL/CL.
- Settling: t_settle < α·Ts and residual error < β LSB (Ts = sampling/control period).
- Overload recovery: < Y µs with no post-recovery bias drift beyond ±Z.
H2-4. Auto-range control loop: when it chatters and how to stop it
What auto-range really is (a discrete loop)
Auto-range is a discrete decision loop: measure → compare to thresholds → change gain state → wait for settling → resume measurement. Chatter occurs when thresholds and delays create a loop that re-triggers itself.
Why it chatters (root causes mapped to symptoms)
Noise and ripple push the measured value across the boundary repeatedly, causing back-and-forth gain toggling.
Decisions are made before post-switch settling completes; the transient itself triggers the next decision.
Overload is detected after the ADC saturates, causing repeated oscillation between “too big” and “too small” decisions.
Channel switching transients can bias range decisions unless a blanking window and a stable estimator are used.
Engineering controls that stop hunting (parameterized, testable)
Treat range selection as a controlled state machine. Each control below maps to a specific failure mode.
Use UpTh and DownTh per boundary so noise does not flip states near the border.
Enforce T_dwell so the system cannot switch faster than it can settle and measure reliably.
Block decisions for T_blank until post-switch settling is inside ±X; discard N samples if needed.
If switching occurs > N times within a short window, lock to a safe range and raise a status flag for diagnosis.
Quantified acceptance (turn “stable” into KPIs)
- Switch rate: F_switch < F_max in steady conditions (ideally near zero).
- False-trigger probability: mis-switches per hour/day below a defined limit under injected noise/ripple tests.
- Throughput loss: (discarded samples + settling time) stays under a defined percentage of the sampling budget.
- Worst-case convergence: time to reach the correct stable range after a real input change is bounded and tested.
H2-5. MUX + PGA-INA: channel memory, crosstalk, leakage, and “ghost readings”
Symptom map (match the waveform to the dominant mechanism)
- Channel memory: the new channel starts close to the previous channel value, then decays toward the true value (often exponential).
- Switch injection: a sharp spike/step at the switching edge, followed by a shorter tail.
- Common-impedance coupling: other channels move when one channel switches or changes level (shared return/reference/power impedance).
Crosstalk and “ghost reading” sources (three paths that dominate in real systems)
Input capacitance, sampling capacitance, and parasitics store charge. When the MUX changes, the “memory node” redistributes charge and briefly reflects the previous channel.
- Strong correlation: first-sample error scales with (V_previous − V_new).
- Strong sensitivity: high source impedance and large input C increase settling time.
MUX and PGA switching inject charge into high-impedance nodes. This appears as a fast glitch that can kick the ADC input and extend effective settling.
- Strong correlation: peak glitch aligns with the switching edge.
- Strong sensitivity: measurement bandwidth changes the observed peak but not the underlying energy.
Shared impedance converts switching currents into voltage errors that show up as correlated offsets across channels, especially with long leads and imperfect returns.
- Signature: multiple channels move together when one channel is active.
- Signature: touching/moving cables changes readings via return path capacitance and impedance.
Leakage-driven DC offset (why MUX systems are more vulnerable)
Input leakage and board surface leakage translate directly into input-referred offset when source impedance is high. Temperature and humidity can amplify the same leakage path by orders of magnitude.
- Device paths: ESD/protection networks, MUX off-leakage, clamp structures (often strongly temperature-dependent).
- Board paths: contamination, residue, moisture films, and long creepage distances across high-impedance nodes.
- MUX amplifier interaction: switching repeatedly re-distributes charge, making leakage-induced bias visible as “persistent” ghost errors.
- I_leak vs temperature and input common-mode
- Equivalent leakage resistance of the board surface (R_leak_equiv)
- Sensor source impedance and allowed input-referred offset
Suppression playbook (choose actions by dominant path)
- Lower source impedance or add a buffer ahead of the MUX for high-Z sensors.
- Precharge the selected channel toward the target level before measurement if supported.
- Use dummy conversions and discard the first N samples after switching.
- Schedule MUX/gain changes in a sampling quiet window; then gate/blank conversions.
- Keep a consistent switching order (e.g., MUX first, then gain), minimizing compounded transients.
- Add small series isolation where required, but verify added settling and noise penalties.
- Provide low-impedance local returns and keep switching currents out of sensitive reference nodes.
- Place decoupling close to MUX and PGA-INA rails; preserve continuous return paths.
- Use guarding and controlled routing for high-impedance inputs; avoid long parallel runs with digital edges.
- Guard rings around high-impedance nodes; keep the guard at a driven/equivalent potential where applicable.
- Minimize exposed high-impedance copper; increase creepage distance; control residue and moisture risks.
Verification scripts and pass criteria (turn “ghost” into metrics)
- Hold channel A at V_A and channel B at V_B (use a large |V_A − V_B|).
- Switch A→B and log the first N samples on B.
- Compute error[n] decay and the minimum N required to enter ±X.
- Hold a steady input and trigger on the MUX/gain change edge.
- Measure peak glitch (±) and post-edge settling into ±X.
- Apply a controlled disturbance (cable touch/motion or capacitive coupling stimulus).
- Log output deviation and ensure it remains within Y without persistent bias.
- After channel switch: within N samples, error < X (output or input-referred).
- Peak glitch: < X under defined bandwidth, RL/CL, and switch timing.
- Touch disturbance: < Y and no persistent baseline shift after the disturbance.
H2-6. Gain-dependent accuracy: offset/gain error across ranges + calibration strategy
Why each gain code behaves like a separate accuracy model
In a PGA-INA, different gain codes can change internal nodes, loop conditions, and headroom. Accuracy terms often shift with gain, so “one spec number” is not enough for cross-range consistency.
- Offset: input-referred offset can vary by code due to different internal paths and bias conditions.
- Gain error: resistor ratios or gain-cell settings introduce code-dependent scale errors and drift.
- Nonlinearity/headroom: high gain reaches internal swing limits sooner, causing compression or INL shifts.
- Drift + leakage interactions: temperature and leakage paths can create different input-referred errors at different gains.
Cross-range consistency (define it as a measurable KPI)
Convert every gain code output back to an input-equivalent estimate, then compare codes on the same applied input. This reveals whether range switching will cause visible “jumps” in reported values.
- Consistency metric: ΔV_in_equiv(Gi, Gj) < X for defined inputs and temperatures.
- Switching visibility: X should be below the application’s “noticeable step” threshold (system budget).
Calibration ladder (choose the minimum complexity that actually improves accuracy)
Calibration should only be as complex as the dominant error term demands. If measurement uncertainty is not well below the target, calibration coefficients become noise.
Best when offset dominates and the scale term is already within budget across ranges.
The default choice for multi-range systems: improves cross-range consistency by correcting scale error per gain code.
Only worth it when nonlinearity is dominant and coefficients remain stable across temperature, time, and operating modes.
Production vs field calibration (stability decides where coefficients belong)
- Targets manufacturing variation (per-code offset/gain spread).
- Works best when coefficients are stable over temperature and aging.
- Targets system-level terms (wiring, sensor offsets, installation stress, environmental gradients).
- Requires a reference stimulus and a repeatable procedure with known uncertainty.
- Repeatability: coefficients re-fit to similar values on repeated runs.
- Temperature robustness: coefficient drift is modelable or bounded within budget.
- Uncertainty: stimulus + measurement uncertainty is well below the target residual error.
Validation script (per gain code) and pass criteria templates
- For each gain code, measure near-zero and near-full-scale points (or a defined two-point span).
- Compute Offset(G) and GainErr(G); repeat across temperature points if required.
- Apply the same input and compute V_in_equiv for multiple gain codes.
- Measure ΔV_in_equiv between codes; validate against the consistency budget.
- If residual error is structured (curvature/compression) and stable, consider multi-point/LUT.
- If residual error is dominated by noise/uncertainty, avoid LUT and improve measurement chain first.
- Cross-range consistency: ΔV_in_equiv(Gi, Gj) < X across defined inputs and temperatures.
- Drift budget: input-equivalent drift < Y across temperature and aging window.
- Residual after calibration: < Z with measurement uncertainty well below Z.
H2-7. Noise vs bandwidth vs gain: how to translate datasheet numbers into real resolution
Pick the right noise number for the job (slow variables vs dynamic signals)
Use 0.1–10 Hz noise (peak-to-peak) to bound short-term reading jitter over seconds-to-tens-of-seconds windows. This is the number that decides “how steady the display looks.”
Use noise density (nV/√Hz) plus the system’s effective noise bandwidth to compute RMS noise. This is the number that decides real resolution under a defined bandwidth.
Gain is a trade: resolution, bandwidth, and saturation risk move together
- Input-referred noise often improves when gain increases, because the same output noise maps back to a smaller input-equivalent error.
- Bandwidth typically shrinks at higher gain, changing effective noise bandwidth and reducing throughput or dynamic tracking capability.
- Headroom margin gets tighter, so overload and recovery time can dominate real accuracy during auto-ranging or fast transients.
Translation workflow: datasheet → input-equivalent RMS noise → effective resolution
The same noise density can yield very different RMS noise depending on filtering, sampling, and gain-dependent bandwidth. Use this workflow per gain code.
- Wideband: noise density (nV/√Hz) for dynamic resolution under a defined bandwidth.
- Low-frequency: 0.1–10 Hz noise (pp) for slow-window reading jitter bounds.
- NEB is set by analog filtering, gain-dependent INA bandwidth, and digital averaging/filters.
- Always compute NEB per range, because higher gain often narrows the front-end bandwidth.
- RMS noise scales with √NEB; then map back to input by dividing by the selected gain code.
- If saturation/recovery occurs, resolution is limited by recovery time, not by noise.
- Report: Vn_in_rms(G) under the chosen bandwidth and filter plan.
- Verify: throughput (bandwidth/settling) and headroom margins still meet the system budgets.
Using 0.1–10 Hz noise correctly (avoid mixing low-frequency pp with wideband RMS)
- 0.1–10 Hz noise is best treated as a slow-window jitter bound for readings updated over seconds-scale intervals.
- Noise density integrates into RMS noise through the effective noise bandwidth; it is the right tool for dynamic resolution budgeting.
- A range may look “quiet” at low-frequency but still be dominated by wideband noise once bandwidth increases.
Per-range acceptance (resolution + throughput + headroom as one gate)
Each range must pass three gates. If any gate fails, the effective resolution is not deliverable in the system.
- Resolution: Vn_in_rms(G) < X (system budget)
- Throughput: BW_eff(G) ≥ target (or t_settle(G) ≤ budget)
- Headroom: Vout_peak(G) within rail margins under worst-case load
Fillable budgeting fields (minimum set per gain)
| Field | G1 | G2 | G3 |
|---|---|---|---|
| Noise density (nV/√Hz) | — | — | — |
| 0.1–10 Hz noise (pp) | — | — | — |
| NEB (effective noise bandwidth) | — | — | — |
| Vn_in_rms(G) | — | — | — |
| Headroom check (Vout_peak / margin) | — | — | — |
H2-8. Input CM range and output headroom: avoiding near-rail distortion across gain settings
Think in “windows”: input common-mode, output swing, and linear region must overlap
Rail-to-rail labels do not guarantee linear operation at all gains and loads. Each gain code creates a different usable window where input CM, output swing, and linearity overlap.
Near-rail failure modes (field-visible signatures)
As output approaches a rail, gain compresses and input-equivalent error grows. Range switching can expose this as “value jumps” across gain codes.
Heavy loads, large capacitive loads, or aggressive filters can push the output stage into current limit, degrading distortion and extending settling.
Input common-mode steps or overload events can create long tails. If recovery time exceeds the measurement cadence, effective resolution collapses.
Headroom budget (per gain): avoid designing into the near-rail region
For each gain code, predict peak output under worst-case input and verify rail margins under the real load. If margin is insufficient, accuracy is limited by compression and recovery, not by noise.
- Compute peak output relative to the chosen bias/reference point.
- Verify rail margin at worst-case load and temperature.
- Verify settling/recovery within the system cadence after CM steps or range changes.
Design actions that keep all gain codes inside the usable window
Choose a reference point that centers the worst-case output swing for the highest gain range, then validate lower gains still meet their swing needs.
Include line steps, sensor faults, and auto-range boundary conditions. Headroom margins should survive the worst-case event, not only typical operation.
Output swing and distortion depend on RL/CL. Use isolation where required and verify stability and settling in the real filter/ADC load condition.
Avoid hanging large capacitors directly on a weak output node. Filter placement should preserve phase margin and keep recovery time within budget.
Pass criteria templates (near-rail distortion becomes measurable)
- Linearity near rails: input-equivalent error < X at the worst-case CM and output swing.
- Recovery time: after CM step or overload, t_recover < budget.
- Load condition: swing and settling meet targets under the real RL/CL and filter/ADC load.
H2-9. Driving ADCs and filters: stability regions, capacitive loads, and settling criteria
Why “driving an ADC” is not a DC load problem
SAR ADC inputs behave like a time-varying capacitive load. The sampling switch and sampling capacitor inject charge back into the driver (“kickback”), creating output spikes and ringing that must settle within the acquisition window. If settling is not met, effective resolution collapses even when noise density looks excellent.
Kickback mechanics: what to observe and what actually matters
- Field signature: narrow spikes at sampling edges, followed by ringing or a slow tail correlated with the sample rate.
- Key point: spike amplitude is less important than how fast the residue returns inside the settling window.
- Range coupling: higher gain may change bandwidth and phase margin, so the same ADC can settle differently across gain codes.
Stability region control: Riso and Cf are isolation tools, not decoration
Capacitive loads add phase lag and can pull the output stage into ringing or borderline instability. Isolation and shaping must be validated against the real sampling transient, not just with a DC load.
- Isolate the sampling capacitor with Riso to reduce the severity of kickback seen by the driver loop.
- Shape high-frequency spikes with a small Cf at the ADC-side node when needed.
- Validate with both step response and sampling-edge observation; passing one but failing the other is common.
Anti-alias filter choices and their hidden settling costs
Simple and predictable, but the R and C directly affect both the driver load and the acquisition settling. If the pole is pushed too low, settling can fail even though noise improves.
Steeper attenuation, but passive networks often look more capacitive to the driver. Active filters can improve driveability but must be validated for stability and settling in the full chain.
Settling criteria: make “0.5 LSB” meaningful by binding the conditions
Settling time is only a valid requirement when the step size, error band, load, measurement bandwidth, and the exact sampling window are specified.
- Sampling-window criterion: residue at the end of acquisition < β·LSB (or system error band).
- Time-budget criterion: t_settle < α·T_acq (or < α·T_s if settling must complete before the next conversion).
- Stability criterion: ringing decays into the error band without sustained oscillation.
Verification scripts (3 must-run tests) and minimum reporting fields
- Step response (small step and large step) to capture ringing and large-signal recovery.
- Full-scale sine near the target band to expose compression or stability sensitivity under dynamic swing.
- Sampling-edge observation synchronized to CONVST/SCLK to validate settling inside the acquisition window.
- Gain code, Riso/Cf, AAF topology and values
- fs, T_acq, step size ΔV, error band definition
- t_settle, spike decay time, pass/fail summary
H2-10. Digital control (I²C/SPI): update timing, sync sampling, fault flags, and safe states
The three control questions that must be answered for deterministic measurements
- When does a gain write take effect? immediate vs boundary-based update.
- How is the change synchronized? single channel vs multi-channel coherent update.
- How is it confirmed and made safe? readback/flags and safe-state behavior on errors.
Update timing: align “update boundary” with the sampling instant
A gain change is only valid when it happens in a safe window. If an update overlaps with the ADC acquisition, readings can be corrupted by mixed-gain behavior and incomplete settling.
- Apply gain changes only at a defined update boundary that is outside the acquisition window.
- Reserve a guard time for analog settling after update before the next sampling instant.
Multi-channel sync: create “LDAC-like” behavior with a shared apply/trigger domain
Write new gain codes into a shadow register, then assert a single apply event so all channels switch at the same boundary.
Use the ADC trigger as the system timing reference and constrain gain updates to occur only in the safe interval before acquisition.
Preventing unintended gain changes (bus noise, glitches, and partial writes)
- Gate gain writes behind an explicit enable/unlock state so random traffic cannot modify critical registers.
- Use readback confirmation after writes and reject updates that do not match the intended code.
- Enforce non-acquisition update windows so even valid writes cannot corrupt measurements.
Fault flags and safe states: keep data trustworthy under errors
- On communication errors: freeze gain at the last confirmed code and raise a fault flag.
- On overload: switch to a safer range only at a controlled boundary and enforce minimum dwell time before switching again.
- On invalid readback/CRC: reject the update and keep output behavior deterministic.
Verification hooks and pass/fail templates for control determinism
- Capture SPI/I²C transactions, update/apply strobes, and ADC trigger/conversion edges on the same time base.
- Verify readback matches intended gain codes before treating data as valid.
- Inject communication faults and confirm the system enters the defined safe state without uncontrolled gain changes.
- Update boundary is repeatable and occurs outside acquisition windows.
- Sync skew across channels is below the system threshold.
- On errors, gain remains locked at a confirmed code and a fault flag is asserted.
H2-11. Application patterns (how PGA is used; details link out)
What stays constant across applications
A PGA-INA is most valuable when one analog path must cover multiple ranges with controlled switching rules: range thresholds, settling windows, and “valid-data” timing are defined as engineering constraints, not as afterthoughts.
Pattern 1 — Multi-range process control: small signal + overload survivability
- Range plan: define G1/G2/G3 as “resolution range” vs “headroom range”, with explicit up/down thresholds.
- Anti-hunt strategy: hysteresis + minimum dwell time + asymmetric thresholds; lockout on repeated overload events.
- Pass criteria templates: switching rate below a defined limit; after switching, residue enters the error band within the allowed window.
Pattern 2 — Multi-channel DAQ: MUX + PGA throughput budgeting
The dominant limiter is often not the ADC, but the per-channel time budget consumed by MUX switching, analog settling after channel/range changes, and any required discard/dummy conversions.
- Per-channel cycle ≈ t_mux + t_settle(channel) + N_discard · T_sample + t_acq
- Pass criteria: after switching, error returns within X threshold in ≤ N_discard samples
Pattern 3 — RTD / thermocouple: use PGA to place weak signals into the ADC “sweet spot”
- High gain for resolution: amplify microvolt-to-millivolt signals to maximize ADC usage without saturating on worst-case offsets.
- Low gain for headroom / diagnostics: detect overload, wiring faults, or unexpected common-mode shifts without losing determinism.
- Valid-data rule: range changes must be outside acquisition windows, and the next “valid sample index” must be defined.
Links-out boundary (to avoid topic overlap)
This section only covers the PGA usage role. System-level details (process safety/EMC, MUX physics/layout, RTD/thermocouple compensation and calibration) should be handled in their dedicated pages to keep this topic vertically focused.
H2-12. IC selection logic (fields → risk mapping → inquiry template)
Selection starts from risks, not from a parameter dump
PGA-INA selection becomes straightforward when every datasheet field is mapped to a system risk and each risk is closed with a verification test and a pass criterion.
Fields → risks mapping (the minimum set to request and verify)
- Verify offset/gain per range and the delta between adjacent ranges
- Pass criteria: cross-range mismatch stays within the calibration budget
- Verify t_settle per gain transition with defined ΔV and load
- Pass criteria: settling completes inside the allowed window
- Verify DC offsets with realistic series resistors and clamp structures
- Pass criteria: offset drift stays below the error budget across conditions
- Verify stability with the real ADC input (kickback) and AAF topology
- Pass criteria: residue enters the error band by the acquisition deadline
- Verify update boundary, readback confirm, and sync skew
- Pass criteria: updates never overlap acquisition windows
- Verify behavior under overload and communication faults
- Pass criteria: gain freezes at a confirmed state and faults are surfaced
Vendor inquiry template (request the test conditions, not only “typical” numbers)
- Settling after gain change: ΔV step size, RL/CL load, measurement bandwidth, temperature range, and error band definition
- Gain step error per range: distribution (min/typ/max or statistics), drift vs temperature, long-term stability
- Input leakage/bias with protection: test setup including any recommended series resistors/clamps, humidity/temperature conditions if available
- ADC drive guidance: stable CL range, recommended Riso/Cf, and a settling-to-LSB example tied to acquisition timing
- Interface semantics: update boundary behavior, readback mechanism, sync method, and fault reporting
Verification gates (tie every risk to a board-level test)
- Range transition test: fixed input, step gain codes, record waveform and define t_settle to the system error band.
- ADC drive test: observe sampling-edge spikes and verify residue at the end of acquisition across all gain codes.
- Leakage sensitivity test: validate offsets with realistic protection networks and high source impedance boundaries.
- Control determinism test: time-align writes, apply events, and ADC triggers; inject comms faults and confirm safe states.
Reference part numbers (starting points for datasheet lookup)
These examples are provided only to speed up datasheet discovery. Final selection should be driven by the risk mapping and the verification gates above.
- TI PGA280 — SPI-controlled programmable-gain instrumentation amplifier family example
- TI PGA281 — PGIA example for range switching and throughput constraints
- Analog Devices ADA4255 — SPI-controlled PGIA example (focus on update semantics and accuracy)
- Analog Devices ADA4254 — PGIA-family example for industrial measurement front-ends
- Microchip MCP6S21 / MCP6S22 / MCP6S26 / MCP6S28 — SPI PGA with MUX options (DAQ pattern starting point)
- Analog Devices / Maxim MAX9939 — programmable-gain front-end example (compare gain steps and settling behavior)
Request a Quote
H2-13. FAQs (accordion; short, actionable) + JSON-LD
Each answer follows a fixed 4-line format: Likely cause → Quick check → Fix → Pass criteria.
