Ultra-Low-Noise Precision Instrumentation Amplifier (INA)
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Ultra-low-noise precision INA design is won by correctly translating datasheet noise into real resolution, then proving what dominates below 10 Hz (1/f vs leakage vs thermal gradients) with repeatable measurements. The practical goal is a stable, production-testable noise floor—achieved through source-impedance-aware gain planning, leakage/thermal control, and fixture-consistent validation.
What is an Ultra-Low-Noise Precision INA (and when it is the right tool)
An ultra-low-noise precision instrumentation amplifier (INA) targets nV/√Hz-class noise density with a low 1/f corner so that sub-10 Hz resolution is limited by physical error floors (noise, leakage, thermal effects) rather than by bandwidth.
What it is designed to solve (system-level)
In low-frequency measurement chains, the limiting factor is rarely sampling rate. The real limiter is the combined “error floor” seen at the input: INA noise (wideband + 1/f), sensor/source resistance noise, leakage & bias-induced offsets, and thermal gradients/thermoelectric effects.
- Noise density sets the wideband random floor once bandwidth is chosen.
- 0.1–10 Hz noise and 1/f corner dominate perceived stability in weighing, seismic, and micro-vibration sensing.
- Leakage + thermal EMF can exceed the amplifier’s intrinsic noise if the PCB and protection network are not budgeted.
How it differs from a “typical” precision INA (practical consequences)
Lower input-referred noise and lower 1/f corner
Better sub-10 Hz resolution and less “wandering” baseline for long observation windows.
Stronger sensitivity to implementation details
Leakage paths, residue, humidity, thermal gradients, and cable micro-motion can dominate unless explicitly controlled.
Low-frequency optimization does not guarantee dynamic robustness
Overload recovery, common-mode step response, and large-signal behavior must be verified for real disturbances (impacts, transients, startup drift).
When it is the right tool (and when it is not)
Use it when
- Signal bandwidth is low (often <10 Hz) and resolution/stability is the main requirement.
- System noise budgeting shows the front-end noise/drift is the limiting floor, not the ADC or DSP.
- Sensor wiring, protection network, and thermal environment can be controlled and verified.
Avoid it when
- Main goal is high bandwidth / low latency dynamics (use a high-speed INA class instead).
- Field reliability is dominated by surge/ESD/EMI but protection is not engineered yet (solve survivability first).
- Implementation constraints force high leakage/humidity/thermal gradients that cannot be mitigated or tested.
Scope note: This page focuses on ultra-low-noise (nV/√Hz) and low-frequency stability. Detailed chopper ripple theory, IEC compliance levels, and ADC driver/filter topologies are referenced but not expanded here.
Related pages: Zero-Drift / Chopper INA · High-Speed / Low-Latency INA · RFI/EMI-Hardened Input · ADC Drive & Anti-Alias Filtering
Noise target translation: from “nV/√Hz” to real resolution (RMS & 0.1–10 Hz)
Datasheet noise numbers become useful only after translating them into band-limited RMS noise and low-frequency (0.1–10 Hz) stability under the intended bandwidth, gain, and source impedance.
The two noise views that matter (and why both are needed)
Noise density (nV/√Hz)
Approximates the wideband random floor once frequency is above the 1/f region. It predicts RMS noise after bandwidth is defined.
0.1–10 Hz noise (peak-to-peak)
Captures low-frequency behavior shaped by 1/f, drift-like components, and environmental sensitivity. It is often the decisive metric for weighing, seismic, and micro-vibration.
Translation workflow (use steps, not long derivations)
Inputs to collect (per gain and supply range):
- en_flat (noise density in the flat region), f_c (1/f corner), Vn_0p1_10_pp (0.1–10 Hz p-p).
- Ib_max and leakage-related conditions (humidity, temperature, input protection network).
- BW_target and chosen filter shape (defines effective noise bandwidth).
Step 1 — Lock bandwidth first (resolution follows √BW)
Choose BW_target from dynamics and settling needs. Wider bandwidth increases RMS noise approximately with sqrt(BW).
Step 2 — Estimate band-limited RMS at the input
Use a simple workflow formula (shape factor K_shape captures filter and 1/f contribution):
Vn_rms_in ≈ en_flat × √(BW_target) × K_shape
Then translate to output: Vn_rms_out = Vn_rms_in × Gain.
Step 3 — Decide whether 0.1–10 Hz is the real limiter
For ultra-low-frequency use cases, 0.1–10 Hz p-p often correlates better with perceived stability than wideband RMS. Large deviations from expectation usually indicate implementation floors (thermal gradients, leakage, residue, cable motion), not the amplifier’s flat noise density.
Step 4 — Run quick sanity checks (fast diagnosis)
- Short-input test: short the input at the connector and measure
Vn_0p1_10_pp. If it improves drastically, wiring/protection/leakage dominates. - Bandwidth scaling: change
BW_targetand verify RMS roughly follows √BW. If not, 1/f, interference, or drift components dominate. - Environmental toggles: airflow, humidity, and cable movement should not shift the baseline beyond the project limit
X(defined by the noise/drift budget).
ADC boundary: Once the front-end RMS and 0.1–10 Hz targets are defined, confirm the ADC input range/reference mapping and the chosen filter’s effective bandwidth. Detailed ADC drive and anti-alias topologies belong to the dedicated ADC co-design page.
1/f corner, drift, and what really dominates below 10 Hz
Below 10 Hz, “instability” is rarely explained by a single datasheet plot. The observed baseline is usually shaped by a stack of floors: 1/f noise, drift-like trends, and implementation floors such as leakage and thermal gradients.
Critical distinction: low 1/f corner does not automatically mean low drift
1/f noise (random low-frequency fluctuation)
Appears as “wandering” up-and-down motion. The measured peak-to-peak typically grows with longer observation windows. Key fields: fc, 0.1–10 Hz p-p.
Drift (trend-like baseline movement)
Appears as a slow, directional change. It often correlates with temperature gradients, self-heating, humidity, and stress. Key fields: Vos drift, Ib(max), leakage budget.
The dominant-floor checklist under 10 Hz (ordered by real-world frequency)
In ultra-low-noise builds, implementation floors often exceed intrinsic amplifier limits. Diagnose in this order:
Implementation floors (most common)
- Thermal EMF: thermocouple effects at connectors, solder joints, and dissimilar metals under ΔT.
- Thermal gradients: airflow, heat sources, shield openings, and asymmetry convert ΔT into µV-level offsets.
- PCB leakage: residue/humidity/contamination create bias-like errors that drift with environment.
- Stress drift: board bending, potting shrinkage, mounting torque, and sensor mechanics shift the baseline.
Intrinsic amplifier limits (still important)
- 1/f noise: governed by fc and the measurement window (0.1–10 Hz vs longer logs).
- Offset drift: trend with temperature, plus recovery behavior after overload or common-mode steps.
- Bias current behavior: worst-case Ib(max) over temperature/humidity can dominate with high source impedance.
Fast dominance diagnosis (10-minute path to the main culprit)
Use simple toggles; each toggle should move only one layer of the stack.
- Short at connector: compare 0.1–10 Hz p-p (short) vs 0.1–10 Hz p-p (sensor). Large improvement points to wiring/protection/leakage/EMF floors.
- Airflow / hand proximity: if baseline shifts or ramps, thermal gradient/EMF dominates.
- Humidity / cleaning toggle: large changes indicate PCB leakage floors (residue, contamination, moisture).
- Window length toggle: if p-p grows strongly with longer logging, 1/f dominates (after detrending).
Drift vs 1/f separation (keep the analysis reproducible)
- Acquire: record long enough to cover the intended decision window.
- Detrend: remove trend (linear or segmented) before labeling the remainder as “noise.”
- Band-limit: apply the project bandwidth window (example: 0.1–10 Hz) to avoid mixing dynamics.
- Compute: report RMS + p-p + repeatability across multiple runs.
Pass criteria is project-specific: define X from the system noise/drift budget and require repeatable measurements under identical setup.
Scope note: Detailed chopper ripple theory and ripple filtering are handled on the dedicated page. Zero-Drift / Chopper INA
Source impedance and noise: the silent killer in ultra-low-noise designs
In nV/√Hz-class front ends, source impedance sets three coupled floors: thermal noise, bias/leakage-induced offset, and system-level CMRR loss from mismatch. Many “datasheet-perfect” designs fail here first.
The three source-impedance effects that matter at ultra-low noise
1) Thermal noise of source resistance (physics floor)
Source resistance contributes input-referred noise that cannot be calibrated away. If source-noise density is comparable to amplifier noise density, improving the INA alone yields diminishing returns.
2) Bias current × source impedance → offset and drift-like behavior
Worst-case Ib(max) and input-network leakage convert directly into microvolt-level offsets through source impedance. This often looks like drift below 10 Hz.
3) Mismatch (ΔRs) converts common-mode disturbance into differential error
Unequal source impedances (contact resistance, long leads, bridge imbalance) reduce system CMRR. Symptoms include sensitivity to cable movement, touch, nearby supply changes, and common-mode steps.
“Who dominates?” decision workflow (noise vs bias/leakage vs mismatch)
Step-by-step checks (fast, repeatable, and diagnostic):
- Noise density compare: compare source-noise density vs en(flat). If source noise is larger, bandwidth reduction or interface changes matter more than lower amplifier noise.
- Short-input vs sensor: if 0.1–10 Hz p-p improves strongly when shorted at the connector, wiring, leakage, thermal EMF, or mismatch dominates.
- Change effective Rs: alter source impedance (or emulate it) and observe whether RMS and low-frequency p-p scale accordingly.
- Bias/leakage sensitivity: modify bias return path / input network and check whether baseline shift follows the expected direction. Strong sensitivity indicates Ib/leakage dominance.
Practical budgeting fields (use worst-case conditions)
- Thermal noise floor: compare source-noise density to en(flat) under the chosen bandwidth.
- Bias-induced offset: model Ib(max) × Rs(eq) as an error term (trend-like).
- Leakage-induced offset: model I(leak,total) × Rs(eq) under humidity/contamination limits.
- Mismatch sensitivity: track ΔRs and treat common-mode disturbance as a differential error driver.
Engineering actions that reliably improve ultra-low-noise results
Reduce effective source impedance (or limit bandwidth)
When source thermal noise dominates, improving amplifier noise alone is inefficient. Use interface changes, bandwidth shaping, or sensor-side approaches to reduce the floor.
Control bias/leakage paths explicitly
Provide a controlled bias return path and budget leakage across the entire input network. Cleaning, guard, and humidity control often yield larger gains than “lower en” selection.
Match and stabilize Rs+ / Rs− (stop ΔRs from moving)
Use symmetric routing and matched components in the input network. Minimize variable contact resistance, cable micro-motion, and temperature gradients across the differential pair.
Common failure modes (symptom → likely cause → first check)
Cable motion changes the reading
Likely cause: ΔRs and common-mode coupling. First check: short-input comparison and touch/motion sensitivity test.
Slow baseline drift after power-up
Likely cause: Ib×Rs and thermal gradients. First check: detrend + airflow toggle + short-input toggle.
0.1–10 Hz p-p is far worse than expected
Likely cause: leakage/EMF/mismatch dominating. First check: cleaning/humidity toggle and bandwidth scaling sanity test.
Gain planning & bandwidth: don’t let “low noise” collapse your dynamics
Ultra-low-noise INAs can trade away practical dynamics: settling, overload recovery, and common-mode step recovery. Even “low-frequency” systems must define disturbance recovery targets before locking gain and bandwidth.
Low-frequency still has “events” (and events define the user-visible performance)
Many precision builds fail because they optimize noise density but ignore recovery from real disturbances:
- Mechanical shock / micro-vibration: taps, fixture movement, cable micro-motion, sensor mechanics.
- Thermal transients: power-up warm-up, airflow changes, shield opening, nearby heat sources.
- Common-mode movement: ground shifts, supply ripple, EMI-induced common-mode steps within the allowed CM range.
- Accidental overload: plugging, wiring faults, unexpected sensor events, clamp engagement.
Required system KPIs (define these first)
- T_settle_to_X: time to return within ±X after an event (X from the error budget).
- T_overload_rec: time to recover from saturation/overload back into linear operation.
- ΔV_baseline_after_event: baseline shift immediately after a defined disturbance.
Gain planning: maximize usable ADC range without inviting overload and long recovery tails
Separate “signal max” from “disturbance max”
A gain that perfectly maps nominal signal to full-scale can still be wrong if the expected disturbance (shock, CM shift, plug-in) pushes internal nodes into saturation. Budget both V_in_signal_max and V_in_disturb_max.
Track headroom and swing limits explicitly
Near-rail operation can degrade linearity and worsen recovery. Always keep a defined Headroom_margin against V_out_swing_limit and V_cm_range, not only against ideal small-signal conditions.
Common failure mode
“Noise looks great, but the reading takes forever to return after touch/shock.” Likely cause: gain/headroom pushes the chain into partial saturation, producing a long recovery tail (T_overload_rec dominates).
Data fields to record (use worst-case conditions):
Gain_total · Headroom_margin · V_out_swing_limit · V_cm_range · V_in_signal_max · V_in_disturb_max · T_overload_rec
Bandwidth planning: noise is set by ENBW, but usability is set by settling to ±X
Small-signal bandwidth and ENBW shape the integrated noise floor, but the system experience is dominated by the time to return within the error window after a disturbance. Treat T_settle_to_X as a first-class requirement, not as an afterthought.
- Define BW_target from sensor + mechanics + decision window (not from the datasheet headline).
- Define X from the accuracy/noise budget and set T_settle_to_X as a requirement.
- Verify both small-signal and event recovery: a “quiet” chain that cannot settle is not usable.
- Include CM-step recovery if common-mode is not perfectly stationary.
Practical recovery tests (report the same KPIs every time)
- Overload recovery: force saturation → release → record T_overload_rec and tail shape.
- CM-step recovery: apply a legal CM step → record CM_step_rec_time to ±X.
- Handling disturbance: tap / cable motion → record ΔV_baseline_after_event and T_settle_to_X.
Pass criteria uses project-specific X and time requirements: require repeatable results under the same setup.
Scope note: High-speed / low-latency architectures are handled on the dedicated page. High-Speed / Low-Latency INA
Input filtering and protection without adding leakage-driven offsets
In ultra-low-noise systems, the input filter/protection network is often the largest leakage and drift-like error source. Every clamp, capacitor, connector, and PCB surface must be treated as an input-current budget item and verified across temperature and humidity.
Side effects checklist (what protection parts can silently break)
Rseries + RC filter
- Leakage paths: capacitor leakage and PCB surface leakage behave like bias current.
- Dielectric absorption tail: long settling after steps can masquerade as drift.
- Noise and settling: Rseries adds thermal noise and can slow event recovery.
Clamps (diodes / TVS)
- Reverse leakage: often rises steeply with temperature and humidity.
- Junction capacitance: can add nonlinearity and disturb recovery near rails.
- Mismatch risk: unequal leakage between +/− becomes differential offset.
PCB surface and connectors
Residue, contamination, and humidity create variable leakage currents. Dissimilar metals under ΔT can introduce thermal EMF that looks like drift.
Leakage budgeting workflow (turn “leakage” into a measurable offset term)
- Set allowable error: define V_error_allow for the low-frequency window.
- List all leakage paths: components + PCB surface + connector.
- Use worst-case conditions: temperature, humidity, aging, contamination state.
- Convert to input error: model V_error_i = I_leak_i × R_source_eq (and track mismatch).
- Sum into a budget: form I_leak_total and I_leak_mismatch, then V_error_leak_total.
- Turn budget into tests: cleaning A/B, humidity soak, temperature sweep, and recovery-tail checks.
Budget fields (record them consistently):
R_source_eq · Ib(max) · I_leak_i(T,RH,V) · I_leak_total · I_leak_mismatch · V_error_leak_total · ΔV_after_humidity · T_settle_to_X
Design hooks that reduce leakage-driven offsets without removing protection
Stage the input network: limit current → filter → clamp
A staged chain makes each element’s role testable. It also helps isolate which section is responsible for leakage drift or recovery tails.
Match +/− networks and keep thermal symmetry
Leakage mismatch and temperature gradients are differential error generators. Symmetry reduces conversion from common-mode environment changes into differential offsets.
Guard / cleaning / humidity control are part of the electrical spec
In high-impedance nodes, PCB surface leakage sets the floor. Cleaning and guard strategies directly translate into measurable leakage and drift outcomes.
Verification targets (examples as placeholders)
- V_error_leak_total < X under worst-case temperature and humidity.
- ΔV_after_humidity < X after the defined humidity soak.
- T_settle_to_X < T_req after step/clamp engagement (no long DA tail).
Scope note: IEC levels and system compliance workflows are handled on the dedicated protection pages. Protection & Immunity
Layout & grounding for nV-level signals: guarding, Kelvin, symmetry
nV-level results are a circuit + physical implementation system. Leakage paths, return-path geometry, and thermal asymmetry can dominate even when the INA noise density looks ideal on paper.
What breaks nV-level layouts in the real world
- Surface leakage: humidity, residue, and contamination create an input-current term that looks like drift.
- Asymmetry: unequal routing, copper density, vias, and nearby structures convert common-mode changes into differential error.
- Return-path discontinuity: slots/splits force return currents to detour, injecting unexpected differential offsets.
- Thermal coupling: local heating and airflow create gradients that translate to DC error (handled in the next section).
Review fields to record (board-level)
I_surface_leak_est · ΔV_after_humidity · ΔR_trace · ΔC_parasitic · via_count_match · return_path_continuity · ΔV_baseline_after_event
Guard ring: when it helps, and when it becomes a new problem
Use guard when leakage dominates the error budget
- High-impedance input nodes or environments with humidity/residue risk.
- Measured sensitivity to cleaning/humidity soak (ΔV_after_humidity is non-negligible).
- Field evidence of touch/cable motion producing slow baseline changes.
Guard tradeoffs to account for
- Extra parasitics: added capacitance can slow settling (T_settle_to_X increases).
- Noise injection risk: an improperly referenced guard can bring unwanted noise closer to the input.
- Process dependency: guard effectiveness depends on cleaning and humidity control.
Kelvin and symmetry: how differential inputs stay differential
Kelvin sense separates measurement from load/lead resistance. Symmetry ensures the two input paths experience the same parasitics and thermal environment, preventing common-mode changes from becoming differential offsets.
Kelvin hooks
- Sense traces connect at the true measurement point, not at a high-current junction.
- Sense routing avoids sharing return segments with noisy currents.
- Reference point is defined and reviewable (Ref node is explicit).
Symmetry rules
- Match lengths, vias, and local copper environment on VIN+ and VIN−.
- Mirror component placement for filters/protection on both sides.
- Keep thermal environment symmetric near the input region.
Ground and shielding: local “moat” beats vague global rules
For nV-level inputs, the key requirement is controlled return paths around the sensitive region. A continuous reference plane under the input routing and a reviewable connection point for shields usually beats ad-hoc plane splits.
Minimal checks (do not skip):
- return_path_continuity: no slots/splits under the input pair; avoid forced detours.
- shield_connection_point: defined and repeatable; touching the shield should not move the baseline.
- guard_fence_present: sensitive area has a local boundary (keepout + optional via fence).
Verification hooks: cleaning A/B + humidity soak (ΔV_after_humidity), tap/cable motion test (ΔV_baseline_after_event), and repeatable recovery checks (T_settle_to_X).
Thermal gradients & thermoelectric effects: the hidden DC error floor
In weighing, seismic, and micro-vibration sensing, the limiting floor is often not amplifier noise but thermal gradients and thermoelectric (TE) junctions that translate temperature differences into DC error.
Where TE errors come from (typical board-level junctions)
- Connectors and terminals: dissimilar metals + temperature differences across the contact.
- Solder joints and pads: junctions exposed to airflow or local heating.
- Protection parts: clamps/TVS near the input can create a hot/cold imbalance across VIN+ and VIN−.
- Shield and chassis contact points: thermal coupling changes with handling and airflow.
Quantify “temperature difference → input error” (method, not fixed numbers)
- Set the DC allowance: define V_dc_allow for the observation window.
- List TE junctions: create TE_junction_list (connector, solder, clamps, shield points).
- Measure/estimate node ΔT: obtain ΔT_node from thermal imaging or repeatable probes.
- Map to equivalent input error: use V_te_eq = f(ΔT_node, material_pair).
- Budget conservatively: sum contributions into V_te_eq_budget.
- Turn into tests: airflow steps and heat-source toggles must meet the pass criteria.
Report fields:
ΔT_node · TE_junction_list · V_te_eq · V_te_eq_budget · ΔV_baseline_after_airflow · T_settle_to_X
Engineering actions that work (isolate, symmetry, controlled junctions)
Thermal isolation near the input
Keep the input region away from digital and power hot spots. Avoid copper features that unintentionally conduct heat into one side of the differential pair.
Symmetry to keep gradients common-mode
Mirror layout, copper density, and airflow exposure around VIN+ and VIN− so temperature changes do not become differential offsets.
Reduce and control TE junctions
Minimize dissimilar-metal junctions in the input path and ensure any unavoidable junctions appear symmetrically on both sides.
Airflow is a hidden “DC error switch”
A stable noise floor can still fail if airflow changes create temperature gradients across TE junctions.
- Quick check: step airflow direction/strength and log ΔV_baseline_after_airflow.
- Pass criteria: ΔV stays within the DC allowance and returns within T_settle_to_X.
Verification set: airflow step test, heat-source toggle, and symmetry A/B comparisons. Require repeatable ΔV and T_settle_to_X under defined conditions.
How to measure ultra-low noise correctly (what to log, filter, reject)
Ultra-low-noise performance requires a measurement contract: fixed conditions, fixed processing steps, and a clear reject policy. Without it, 0.1–10 Hz results and noise density numbers are not comparable across runs, boards, or labs.
1) Define the measurement contract (before pressing “record”)
- Bandwidth of interest: BW_interest (e.g., 0.1–10 Hz) and the metric to report (p-p, RMS, density).
- Observation window: Record_length and the exact time window used for p-p evaluation.
- Conditions: input_state (shorted/sensor/dummy-R), shield_state, supply_mode, fixture_ID, ambient logging.
- Processing chain: detrend_method + params, filter_type + corners, and whether notch is used.
Output fields (minimum)
Noise_0p1_10_pp · Noise_0p1_10_rms · Noise_density_at_f · Reject_ratio · Repeatability_target
2) 0.1–10 Hz procedure (record → detrend → filter → compute)
- Acquire: record long enough to capture slow wandering and multiple mains cycles; log temperature and airflow state.
- Detrend: remove slow drift using a declared method (linear / segmented / robust). Always store method + parameters.
- Filter: apply a declared band definition for 0.1–10 Hz (type, corners, order). Avoid undocumented manual filtering.
- Compute: report both RMS and p-p from the same window rules; store the exact window length used for p-p.
Mains handling (reject-first, notch-last)
If 50/60 Hz coupling dominates, fix the coupling path and shielding/grounding first. If notch is used, log notch_used and parameters; do not treat notch as a substitute for hardware correctness.
3) Noise density measurement: fixture discipline prevents false conclusions
- Shield box: closed shielding reduces RFI rectification and “hand proximity” drift.
- Supply mode: use battery or a verified low-noise supply; log V_supply and I_supply during the run.
- Shorted input: ensure a symmetric, low-TE short near the input region; avoid long, dissimilar-metal loops.
- Cable discipline: keep cables short, fixed, and strain-relieved; cable motion is a low-frequency event source.
Must-log fields for density runs:
input_state · shield_state · supply_mode · fixture_ID · Fs · record_length · detrend_method · filter_type · notch_used
4) Reject rules: remove events without hiding hardware issues
Event segments
Cable motion, shield opening, or touch events often create steps with long tails. Mark and reject those windows and store Reject_reason=event.
Clamp / saturation segments
Any input overrange or protection clamp produces recovery tails that contaminate low-frequency results. Reject and treat as a hardware-path clue.
Mains-dominant windows
If a run is dominated by mains coupling, prioritize fixture and grounding fixes. If notch is applied, the run must be labeled as “notch-processed.”
Repeatability criterion: under identical conditions and identical processing, require |Metric_run1 − Metric_run2| < X. Set X from the system resolution budget and the observation window definition (not from a single “typical” plot).
Application patterns (Weighing / Seismic / Micro-vibration): recipes and traps
Each target application has a repeatable recipe: a stable chain, a declared measurement window, and a short list of dominant error owners. These patterns stay focused on low-frequency resolution and avoid unrelated application expansions.
Shared recipe format (use the same checklist every time)
- Chain: Sensor → INA → LPF/ADC → DSP (declare BW_interest and observation window).
- Dominant errors: select ≤3 owners and validate each with a dedicated test (airflow step, touch/cable step, heat-source toggle).
- What to log: temp/RH/airflow state, fixture state, input state, and processing parameters.
- Pass criteria: ΔV events within allowance and recovery within T_settle_to_X; repeatability |Metric1−Metric2| < X.
Weighing (bridge/load cell): the baseline is the product
Dominant errors are typically thermal gradients (TE), mechanical stress/creep, and cable/lead changes. The chain may have excellent noise density yet fail on drift and event tails.
- Hooks: symmetry + Kelvin routing, strain relief for cables, airflow isolation near connectors and input junctions.
- Test: airflow step + cable motion step; log ΔV_baseline_after_event and T_settle_to_X.
- Log: fixture_state · cable_state · airflow_state · temp_board · observation_window.
Seismic: long-time stability and environment separation
Dominant errors often include baseline wandering, tilt/orientation sensitivity, and environmental noise coupling. Success depends on repeatable logging and declared detrend/reject rules.
- Hooks: stable mounting, controlled airflow, controlled heat sources near the front-end, consistent observation windows.
- Test: heat-source toggle + orientation A/B; treat environment changes as labeled events.
- Log: orientation_state · airflow_state · reject_ratio · detrend_method · record_length.
Micro-vibration: separate slow drift from tiny dynamics
Micro-vibration measurement fails when drift mixes into the dynamic window, or when event tails from taps/shocks dominate. The chain must be designed so recovery behavior is measurable and repeatable.
- Hooks: strict event rejection, stable fixture coupling, declared filter windows for dynamics vs baseline.
- Test: controlled tap/shock step to characterize tail time; require recovery within T_settle_to_X.
- Log: event_reject_ratio · fixture_state · BW_interest · observation_window · T_settle_to_X.
Practical rule: in these three applications, the most expensive failures come from thermal gradients, leakage, asymmetry, and unlabeled events. A stable chain is proven by repeatability under controlled conditions, not by a single “best run.”
IC selection logic (what to prioritize, what to ask vendors)
Ultra-low-noise INA selection succeeds when the noise band, source impedance, and drift/leakage budget are declared first, then parts are shortlisted using non-typical, condition-specific data.
1) Prioritize by use-case constraints (before comparing parts)
Noise band
Choose the dominant window: <10 Hz (drift/TE/leakage sensitive) vs 10 Hz–1 kHz (density driven). Use the same window later for verification and vendor responses.
Source impedance
Source impedance decides whether the system is limited by sensor thermal noise, INA input noise, or Ib × Rs and leakage. Classify Rs into buckets (e.g., <1 kΩ, 1–10 kΩ, >10 kΩ) and stick to them.
Drift & recovery
For low-frequency resolution, ensure the chain returns to baseline after perturbations (touch, airflow, small overloads). Require recovery data under declared conditions, not a single “best run”.
2) Must-ask fields (request condition-specific data, not “typical”)
Noise (resolution owner)
- en @ 1 kHz (noise density)
- en @ 10 Hz (low-frequency density)
- 0.1–10 Hz noise (p-p)
- 1/f corner (definition and measurement conditions)
Bias / leakage coupling (drift owner)
- Ib (max over temperature, not “typical”)
- Input protection structure hint (internal clamps, ESD approach)
- Input current behavior near rails / overload states (if applicable)
DC accuracy (calibration headroom)
- Vos and Vos drift (max over temperature)
- Gain error and gain drift (max over temperature)
- Offset/gain stability after warm-up (declared time window)
Rejection (real wiring immunity)
- CMRR vs frequency (plot)
- PSRR vs frequency (plot)
- Common-mode recovery behavior under steps (declared step size)
Dynamics (perturbation recovery)
- Overload recovery time (conditions + waveform)
- Output swing vs load (including near-rail behavior)
- Capacitive-load stability region (if driving filters/ADC inputs)
3) Risk mapping (each field must have a failure mode and a quick check)
Ib(max) → drift with high Rs and humidity
Quick check: compare shorted-input baseline vs open-input baseline; if open-input wanders, leakage and Ib×Rs paths dominate.
0.1–10 Hz p-p → low-frequency instability in weighing/seismic windows
Quick check: long record + declared detrend; require repeatability under identical conditions: |Metric1−Metric2| < X.
CMRR/PSRR vs f → mains / wiring sensitivity
Quick check: controlled mains coupling test (fixture unchanged); if results change with cable routing or touch, wiring symmetry and reference/ground paths need correction.
Input protection structure → leakage-driven offsets
Quick check: verify baseline shift vs humidity/cleaning state; if baseline changes after cleaning or coating, the protection network and board surface are part of the error budget.
4) Vendor inquiry template (copy/paste)
Please provide data under the following declared conditions (not “typical”):
- Use case: (Weighing / Seismic / Micro-vibration), BW_interest = ________
- Source impedance: Rs+ / Rs− = ________ (and mismatch range if applicable)
- Gain & supply: G = ________, Vsup = ________, output load = ________
- Input common-mode: VCM range = ________, input step conditions = ________
- Noise: en @ 1 kHz, en @ 10 Hz, 0.1–10 Hz p-p, 1/f corner (definition and method)
- Bias/offset: Ib(max over T), Vos(max), Vos drift(max), gain error/drift(max)
- Immunity: CMRR vs f plot, PSRR vs f plot
- Dynamics: overload recovery waveform/time under declared overload + recovery threshold
- Protection hint: input clamps/ESD structure guidance and expected leakage behavior
Reference examples (part numbers; starting points only)
These part numbers help speed up datasheet lookup and vendor shortlisting. Final selection must be driven by the declared conditions and worst-case data.
Ultra-low-noise INA candidates
AD8429 · AD8428 · AD8421 · INA103 · INA849
Low-TE / low-drift resistor references
Vishay VHP-3 / VHP-4 (review TE specs and stability vs temperature)
Low-leakage clamp / protection references
BAV199 (low-leakage diode reference) · SP0502BA (ESD array reference; verify leakage vs temperature)
Stable dielectric capacitor reference
Murata GRM series C0G/NP0 example: GRM1555C1H100GA01D (choose C0G/NP0 where stability matters)
Engineering checklist (design review + validation checklist)
Ultra-low-noise success is a combination of circuit choices and physical implementation. This checklist is designed for design review, bring-up, and production readiness with explicit hooks for repeatable validation.
1) Layout review (symmetry, guarding, return paths, thermal placement)
- Differential symmetry: equal geometry and equal environment for VIN+ and VIN−; avoid asymmetric copper pours near one input.
- Kelvin routing where needed: use 4-wire sense for bridge nodes or critical resistors; keep sense routes away from heat and digital edges.
- Guard ring usage: place guard only where leakage dominates; keep guard continuous and tied to the correct potential (declared in the schematic).
- Return path sanity: ensure local return continuity near the front-end; avoid crossing splits that force long return detours.
- Thermal placement: keep heat sources away from input junctions and connector regions; keep the two input paths thermally symmetric.
2) Leakage budget review (input network, cleaning, coating, humidity)
- Input network audit: list every element tied to VIN nodes (R, C, clamps, ESD) and its leakage behavior vs temperature.
- Leakage-to-error conversion: convert each leakage contributor into an equivalent input offset via the declared impedance model (document the path).
- Board surface: flux residue, ionic contamination, and moisture can dominate low-frequency behavior; define a cleaning and handling standard.
- Coating policy: conformal coating can help or hurt; validate with before/after baseline drift under controlled humidity.
- Protection placement: keep high-leakage protection away from the nV-level node; if required, isolate it with a declared series path and verify baseline shifts.
3) Thermal review (airflow, rise, gradients, thermoelectric effects)
- Gradient control: reduce temperature gradients across input junctions and connectors; keep thermal symmetry between VIN+ and VIN− paths.
- Airflow sensitivity test: toggle airflow (on/off) as a labeled event and log baseline shift and recovery time.
- Heat-source toggle: switch nearby loads (digital, regulators) and observe low-frequency baseline movement in a declared observation window.
- Material awareness: mixed metals at junctions create thermoelectric offsets; keep connector and input path construction consistent and symmetric.
4) Bring-up & validation tests (short, open, mains, recovery)
Shorted-input noise
Verify 0.1–10 Hz p-p and RMS using declared detrend/filter steps; store processing parameters and observation window.
Open-input drift
Compare short vs open to expose leakage/bias coupling; label humidity and cleaning state.
Mains sensitivity
Fix fixture and cable placement; test repeatability across runs. If notch is used, label results as notch-processed.
Perturbation recovery
Apply a controlled event (tap/airflow/step) and require recovery within T_settle_to_X (X defined by the resolution budget).
5) Production hooks (fixture, logging fields, repeatability gates)
- Fixture standardization: fixture_ID must uniquely identify shielding, cabling, and shorting method.
- Mandatory logs: board_ID, temp_board, ambient, airflow_state, supply_mode, gain, processing parameters, reject_ratio.
- Repeatability gate: under identical conditions and processing, require |Metric_run1 − Metric_run2| < X.
- Traceability: store record_length and observation_window for any 0.1–10 Hz p-p report.
Material references (examples to anchor reviews)
- Low-TE resistor: Vishay VHP-3 / VHP-4 (use where thermoelectric offsets dominate).
- Low-leakage clamp: BAV199 (use as a reference point for leakage discipline; verify over temperature).
- ESD array warning example: SP0502BA (verify leakage and placement; avoid putting high-leakage arrays directly on nV nodes).
- C0G/NP0 capacitor example: Murata GRM1555C1H100GA01D (prefer stable dielectric where it matters).
Request a Quote
FAQs (ultra-low-noise precision INA) — short, actionable, measurable
Each answer is fixed to four lines to keep scope tight and prevent the main article from growing sideways. Thresholds marked as X/T must be set by the system noise/drift budget and verified with the same fixture and processing.
