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CAN/CAN-FD & Automotive Ethernet PHY: Common-Mode, Wake & TC10

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This page turns CAN/CAN-FD and Automotive Ethernet PHY issues into a repeatable interface-layer playbook: control common-mode + return paths, get topology/termination right, and make wake/TC10 behavior measurable so links don’t “randomly” fail.

Deliverable: shortest-loop rules, checks, and pass criteria for robustness, bring-up, and production consistency—without expanding into protocol stacks or system-level EMC theory.

Definition & Scope

CAN/CAN-FD transceivers and Automotive Ethernet PHYs sit at the physical/interface layer in vehicle networks. This page focuses on what makes links stable in real harness environments: topology, common-mode and return paths, wake/sleep behavior, protection/diagnostics, and verification gates.

PHY / Transceiver layer Common-mode & return path Wake / TC10 sleep Protection & diagnostics Bring-up → production gates

What this page delivers

  • Topology & termination decisions with failure signatures (reflection, long stubs, impedance discontinuities) and what to validate first.
  • Common-mode control as a primary stability axis: where common-mode comes from, how return paths amplify it, and how to prove it with a minimal measurement set.
  • Wake/sleep behavior for CAN and TC10-style Ethernet low-power: state transitions, wake sources, and logging fields required for correlation.
  • Protection + diagnostics hooks that are PHY-facing: what to place, where to place it, and which observables separate protection artifacts from true link weakness.
  • Verification gates for bring-up and production: what to test, what to record, and pass criteria placeholders (X) tied to system budgets.

Not expanded here (link out)

  • Protocol stacks and services (UDS/J1939/DoIP, TSN scheduling, application-layer timing). Use internal links to dedicated protocol pages.
  • System-level EMI “how to fix everything” playbooks. Only interface-side hooks appear here (placement windows, matching constraints, and what to prove with measurements).
  • Power tree loop design. Only “how supply noise shows up as link instability” is covered for debugging.

How to use this page (fast path)

  • Link drops, error bursts, or bus-off: start with common-mode + termination + return path checks before touching software.
  • Cannot sleep, false wake-ups, or wake-to-link instability: start with wake/TC10 state transitions and the required log fields (wake source, timestamps, link-up phases).
  • Production pass but vehicle fail: start with verification gates and correlate station-to-station measurements and environmental fields.

Figure 1 — Layer map (focus boundary)

Layer map: ECU/SoC to Transceiver/PHY to Harness environment Diagram showing ECU/SoC, Transceiver/PHY as the focus layer, and harness/connector/ESD/EMC environment. Protocol stack is shown as a faded layer above. Protocol stack (link out) — not expanded here link to protocols ECU / MCU / SoC CAN controller / MAC clocks / resets software stack Transceiver / PHY CAN / CAN-FD Ethernet PHY (T1) topology / CM / wake diagnostics / gates Harness / Connector impedance / stubs ESD / surge EMC / ground shifts Return path & common-mode are primary stability axes in vehicle environments CM focus

Where They Live in the Vehicle

CAN/CAN-FD and Automotive Ethernet PHYs are selected by environmental constraints more than by “features.” Vehicle domains differ in harness length, noise sources, ground shifts, node density, and sleep/wake duty cycles. The goal is to translate domain constraints into interface-layer consequences: what breaks first, what to measure first, and what must be logged for correlation.

Body domain

Many nodes, mixed harness quality, frequent sleep/wake events.

What breaks first

  • Non-compliant termination / long stubs → intermittent errors.
  • False wake-ups from noise → standby power drift.

First checks

  • Verify end-to-end termination and stub lengths on real harness.
  • Log wake source + timestamps; quantify false-wake rate (X / hour).

Chassis domain

Long runs, harsh transients, ground potential shifts, safety-relevant behavior.

What breaks first

  • Common-mode excursions → receivers saturate, error bursts.
  • ESD/surge coupling → link recovers but error counters climb.

First checks

  • Measure common-mode at connector vs at PHY; compare to CM window.
  • Audit return path continuity and shield termination strategy.

E-Drive domain

PWM/inverter noise, strong dv/dt, fast transitions, high EMC stress.

What breaks first

  • Common-mode injection via return/shield discontinuity → link flaps.
  • Sleep transitions become unstable (wake then drop) under noise.

First checks

  • Correlate error bursts with inverter events using timestamps.
  • Validate low-power state machine logs (TC10 / wake source / p99 link-up).

Practical selection signal (interface-layer)

  • Node density + cost + robustness first: CAN/CAN-FD is typically the default, but verify termination discipline and wake filtering.
  • Bandwidth + domain backbone: Automotive Ethernet (T1) is common, but treat common-mode/return path and EMC constraints as first-order requirements.
  • Sleep/wake duty cycle: low-power transitions (CAN wake / TC10) require deterministic logging fields, otherwise intermittent failures remain uncorrelated.

Figure 2 — In-vehicle domain overview (constraints-driven)

In-vehicle domains: Body, Chassis, E-Drive Diagram shows three domains with CAN/CAN-FD buses and an Ethernet backbone. Each domain has constraint tags for length, noise, and nodes. Ethernet Backbone (domain / zonal) Body nodes: high noise: medium length: mixed CAN / CAN-FD Chassis ground shifts: high transients: high length: long CAN / CAN-FD E-Drive dv/dt noise: high EMC stress: high sleep cycles: strict Ethernet PHY (T1) CAN / CAN-FD Ethernet backbone / PHY constraints drive interface choices

Electrical Layer Essentials: Differential, Common-Mode & Return Path

Many “random” link drops, error bursts, and intermittent bus-off events are not caused by insufficient differential swing. They are commonly caused by common-mode excursions amplified by broken or ambiguous return paths. Treat common-mode as a first-order stability axis: identify injection sources, verify the return/shield path, and confirm receiver headroom against its common-mode window.

CM window = hard limit Return path drives CM gain Measure CM at 2 locations

CAN / CAN-FD: differential signaling under ground shifts

  • CANH/CANL carry the differential signal, but receiver behavior is bounded by its common-mode window. Vehicle ground offsets and transients can push common-mode outside that window even when the differential waveform looks “reasonable.”
  • When common-mode approaches limits, typical signatures include: error bursts, sensitivity to harness touch/movement, and eventual bus-off under specific events (load steps, ESD, inverter activity).
  • In CAN-FD, faster edges and narrower timing margins make common-mode/return-path issues appear “more random,” because small CM-to-DM conversions can degrade sampling without obviously flattening the differential amplitude.

Automotive Ethernet PHY (T1): stricter return/shield discipline

  • Single-pair Ethernet relies on a stable return/shield environment. Common-mode and return-path discontinuities can disturb training and link stability even when the differential swing appears normal.
  • Common-mode noise can push analog front-ends into non-linear regions, causing intermittent link flaps, slow link-up, or event-correlated error counters.

Where common-mode comes from (injection mechanisms)

  • Capacitive injection (dv/dt): inverter/PWM edges, ESD discharge, switching nodes coupling into the pair or shield.
  • Inductive injection (di/dt): high-current loops and harness loop area creating mutual coupling into the pair.
  • Ground shifts: different reference points and transient ground bounce moving both wires together relative to the receiver.
  • Shield/return discontinuity: shield bonding gaps, reference plane splits, and connector transitions converting CM↔DM and amplifying CM at the receiver.

Fast prior checks (5-minute triage)

  1. Reference integrity: verify ground reference continuity and quantify ground potential differences (DC + event transients).
  2. Shield/connector bonding: inspect for high-impedance or intermittent bonding that opens the return path.
  3. Return-path closure: confirm the return/shield path forms a controlled loop; avoid plane splits and “floating” segments at connector transitions.
  4. Two-location CM measurement: measure common-mode near the connector and near the PHY/transceiver. A large delta implies return-path/placement amplification.

Pass criteria placeholders (system-budget dependent): common-mode peak-to-peak < X with margin to the CM window; event-correlated error bursts eliminated; connector-vs-chip CM delta < X.

Figure 3 — Common-mode injection paths (return-path break amplifies CM)

Common-mode injection paths Noise sources couple via capacitance and inductance into differential pair and ground/shield. A return path break is highlighted to show common-mode amplification at the receiver. Noise sources PWM / Inverter dv/dt ESD / Surge imp Harness coupling di/dt Ground shift CM Coupling / injection paths Capacitive coupling dv/dt → CM Inductive coupling di/dt → CM Return / shield path break Victims (receiver front-end) Differential pair + CM rises PHY / Transceiver CM window saturation risk Return break → CM amplification

Topology & Termination: Trunk, Stubs & Impedance

Topology mistakes rarely look like a clean “no communication” failure. They more often show up as sensitivity to harness variants, intermittent error bursts, or a system that “works on Classic CAN” but fails when CAN-FD data phase is enabled. Treat topology and termination as measurable constraints: reflections must not intrude into the sampling/training window, and impedance discontinuities must not convert into timing margin loss.

CAN: bus topology and two-end termination

  • A trunk bus with two-end termination prevents energy from reflecting back into the bus and collapsing timing margin. Missing, duplicated, or misplaced termination commonly causes “it works on bench but fails in vehicle.”
  • Stubs behave like reflection antennas. Stub length must be short enough that reflected energy does not overlap the sampling window (use a system-dependent placeholder threshold, rather than a fixed universal number).

CAN-FD: why arbitration can pass while data phase collapses

  • Arbitration can appear stable while the faster data phase fails because reflections and impedance steps scale with edge rate. This is a classic signature of stub length / star wiring / termination mismatch.
  • First validation: hold the harness constant and vary the data-phase speed or edge-control mode; reflection-driven failures typically change in a predictable direction (error rate climbs as the effective timing window tightens).

Pass criteria placeholders: end-to-end termination measured within target window; data-phase error rate < X across temperature and harness variants.

Ethernet T1: impedance continuity beyond “amplitude looks fine”

  • Differential amplitude can appear acceptable while impedance discontinuities (connector transitions, harness variants, shield bonding changes) reduce training margin and produce intermittent link instability.
  • Interface-level hooks: enforce connector symmetry, harness BOM consistency, and shield/return continuity; correlate instability with events using timestamps.

Figure 4 — Topology comparison (good vs bad)

Topology comparison: good vs bad Left shows correct trunk bus with short stubs and two-end termination. Right shows long stubs, star node, and extra termination with warning markers. GOOD: trunk + short stubs + two-end term BAD: long stubs / star / extra term CAN trunk bus trunk 120Ω 120Ω stub reflections absorbed at ends Problem patterns star long long long extra 120Ω reflections intrude into timing margin

Wake/Sleep & TC10: Low-Power State Machine That Actually Works

Low-power failures rarely appear as a clean, repeatable issue. The common field symptoms are: can’t sleep (quiescent current too high), can’t wake (wake event not recognized), or wakes but link bring-up is unstable (intermittent link-up, flaps, or error bursts). Treat wake/sleep as a network power state machine with explicit observability: every transition must produce timestamps, wake sources, and failure codes.

sleepability = state machine wake source must be logged bring-up needs p99 timing

CAN / CAN-FD wake: pin wake vs bus wake (and why false wake is common)

  • Wake can be triggered by a dedicated WAKE pin (local event) or by bus wake (receiver classifies bus activity as a wake event).
  • False wake typically comes from common-mode disturbances, return-path discontinuities, and harness coupling that create “wake-like” edges during noise events (ESD, relay switching, inverter activity).
  • Practical filtering hooks (implementation-dependent): debounce window, event count threshold, and post-power blanking time to ignore supply recovery transients.

Automotive Ethernet PHY: TC10 behavior (engineering view only)

  • TC10 is most fragile at boundaries between power domains and clock domains. Entry/exit must align with rail readiness and clock validity.
  • Wake sources can be remote (link-side activity) or local (PMIC/GPIO events). Unstable return/shield paths can turn noise into a false wake source.
  • Bring-up failure signatures: extended link-up time, sporadic training retries, or link flaps right after wake. These should be treated as timing distributions (p50/p95/p99), not a single “works / fails” bit.

Must-log fields (to make low-power failures debuggable)

State & timestamps

enter_prepare_ts
enter_sleep_ts
wake_detect_ts
link_up_ts

Wake source

wake_src (pin/bus/remote/local/unknown)
wake_reason_code

Power/clock snapshot

rail_ok_bitmap
clk_ok_bitmap
reset_cause

Bring-up diagnostics

link_up_time_ms
bringup_phase_fail
retry_count

Pass criteria placeholders: sleep current < X for X minutes with no false wake; wake_detect → link_up p99 < X ms; wake-to-active window shows no link flaps above X.

Figure 5 — Low-power state machine (each state must emit log fields)

Low-power state machine with required logging State flow Active → Prepare → Sleep → Wake detect → Link bring-up → Active, with key log fields labeled near each step and retry/failure loops. Active enter_ts Prepare rail_ok Sleep sleep_ts Wake detect wake_src Bring-up link_ms stable link → Active retry / fail_code Required logs per transition timestamp wake source rail/clock fail code link_ms

Robustness: ESD, Surge & EMI Hooks at the Interface (Not an EMC Tutorial)

This section stays strictly at the interface level: device-side protection selection logic, placement windows, and return-path control. It does not attempt to cover full-vehicle EMC remediation workflows. The primary goal is to keep energy out of sensitive nodes while preserving differential symmetry and timing margin.

CAN / CAN-FD: survive ESD/shorts without collapsing signal integrity

  • ESD / surge clamps are only as effective as the return path. A “good” clamp placed with a long or ambiguous return can still allow large board-level overvoltage.
  • Short tolerance and thermal shutdown must be treated as observable behaviors: recovery time, fault latch policy, and whether the bus becomes a noise injector during fault recovery.
  • Common-mode chokes (optional) are a trade: they can reduce common-mode noise, but can also add differential loss/phase shift. CAN-FD data phase is more sensitive; use them only when common-mode injection dominates and timing margin is proven sufficient.

Ethernet T1: protection capacitance & matching can make or break the eye

  • Prefer low-capacitance protection elements. Excess capacitance reduces high-frequency margin and can increase training retries or intermittent link instability.
  • Maintain differential symmetry: mismatch between the two lines converts between DM and CM, degrading stability even when amplitude appears acceptable.
  • Placement must keep the protection current from flowing across sensitive reference areas. The “distance + return inductance” product determines how much voltage rise still reaches the PHY.

Placement windows (what goes near the connector vs near the PHY)

  • Connector-side window: energy-handling elements (TVS / surge clamps; optional CMC) should intercept at the entry, with a short, explicit return path.
  • PHY-side window: matching and common-mode control elements should sit near the receiver to minimize parasitic uncertainty.
  • Avoid mixing the “high-energy return” path with “sensitive reference” areas. A long return creates slow clamping and higher board-level stress.

Pass criteria placeholders: after ESD/surge events, the link does not flap; link-up p99 does not degrade beyond X; error counters do not accumulate under repeated immunity exposures.

Figure 6 — Protection placement windows (energy interception vs sensitive matching)

Protection placement windows Diagram from connector to PHY showing connector-side TVS/optional CMC window and PHY-side matching window, with short return path emphasized and long return path warned. Connector I/O PHY AFE Connector-side window TVS CMC opt short return PHY-side window Match / CM ctrl keep energy out long return → poor clamp distance + inductance diff pair

Diagnostics & Failure Modes: From Symptom to Root Cause (Shortest Path)

This section is a troubleshooting hub. It avoids protocol theory and focuses on measurable symptoms, the first check that collapses uncertainty, and the most likely physical-layer triggers. The goal is to reduce “random failures” into a small number of testable hypotheses.

rate-sensitive event-correlated boundary-only

CAN (Classic): common physical triggers behind error states and bus-off

  • Bus-off / runaway error counters: often driven by common-mode out of window, return-path discontinuity, or termination / topology errors that inject reflections into the sampling margin.
  • Burst errors during switching events: correlate with inverter/PWM/relay activity, ESD, or harness movement; this points first to CM injection and shield/return integrity.
  • CRC-like frame failures (engineering view): a typical physical trigger is threshold disturbance from CM noise or waveform distortion from poor termination.

CAN-FD: arbitration OK, data phase fails (signature of margin collapse)

  • If failures worsen as the data phase rate increases, the fastest suspects are long stubs, wrong/multiple termination, or edge shaping mismatch.
  • If failures correlate with vehicle operating conditions (load steps, noise events, harness touch), prioritize common-mode window and return/shield continuity.
  • Shortest-path validation: keep the harness fixed and change only one variable (data phase rate, edge control mode, or sampling configuration). Predictable monotonic error change strongly indicates a physical-margin problem.

Automotive Ethernet PHY: link flaps, training failures, and boundary-only faults

  • Link flaps (runtime): first suspect common-mode injection, return/shield discontinuity, or supply noise coupling that changes with vehicle state.
  • Training / link-up failure (startup): first suspect power/clock readiness sequencing; then check CM near connector vs near PHY to identify return-path amplification.
  • Only hot/cold or only under load: prioritize shield bonding contact resistance changes, connector/harness variants, and rail ripple drift.

Pass criteria placeholders: event-correlated bursts eliminated; FD data phase stable at target rate; Ethernet link-up p99 returns within X and flaps remain below X per time window.

Figure 7 — Symptom → First check → Likely root cause (decision tree)

Symptom to root cause decision tree Three-column decision tree for CAN/CAN-FD/Ethernet: Symptom, First check, Likely root cause. Nodes use short labels. Symptom First check Likely root cause CAN (Classic) bus-off CM@conn CM window error burst shield bond return break frame fail term ohms bad term CAN-FD FD data fail stub len long stub rate worse edge mode topology Ethernet PHY link flap CM delta shield gap

Measurement & Bring-up: Minimal Closed Loop (Waveform + Logs)

The goal is repeatable comparison. A minimal bring-up loop uses: (1) waveform (DM + CM), (2) static termination checks, and (3) timing logs (link-up decomposition). Measurements must be taken at consistent locations with the same probe method and a consistent reference strategy.

Minimal measurement set (must-have)

  • DM + CM at connector and near the transceiver/PHY
  • Termination check (end-to-end effective ohms, target window = X)
  • Bring-up timing (timestamps and p50/p95/p99 link-up)

CAN / CAN-FD: what to probe to separate reflections from common-mode

  • Probe CANH, CANL, DM, and CM under the same trigger event.
  • Validate termination and stub behavior: end-to-end ohms, and whether error rate tracks data phase rate or edge control changes.
  • Compare CM near connector vs near transceiver: a large delta strongly suggests return-path amplification or shielding discontinuity.

Ethernet T1: link-up time decomposition + CM observation

  • Record timestamps: rail_ready, clk_valid, phy_ready, training_start, link_up.
  • Compute deltas (Δ1..Δ4) and track distributions (p50/p95/p99). An unstable system often fails by widening the tail.
  • Measure CM and rail ripple during bring-up retries; correlate spikes with the phase that fails.

Setup traps (avoid false conclusions)

  • Long ground leads and clip grounds can create fake ringing. Keep probing method consistent across comparisons.
  • Bandwidth and acquisition settings can make spectra or edges look “better” or “worse.” Use consistent settings for A/B checks.
  • Cross-location comparison is invalid unless the reference strategy and probe method are the same at each location.

Figure 8 — Minimal test-point topology (board, connector, remote end)

Minimal test-point topology ECU board with PHY/transceiver and test points, connector probe location, remote harness end node. Shows DM/CM/term/log hooks and the requirement of same ground reference and same probe method. ECU board MCU/SoC PHY/Trx Board test points TP_DM TP_CM TP_R TP_RAIL LOG_link_ms Connector DM/CM TERM Remote end TP_DM TP_CM TP_R event Comparison rules (must be consistent) same probe method same reference avoid clip ground

Layout & Harness Interface: Return Path, Shield Bonding, Reference Planes

Many “everything looks correct but the link is unstable” issues are caused by return-path detours, shield discontinuities, or reference-plane breaks. This section turns those failure mechanisms into layout rules that can be reviewed and verified.

Placement & reference-plane continuity (core rules)

  • Close the interface energy at the entry: high-frequency return current from the harness must not be forced to traverse long board paths before closing. Long board-side exposure increases common-mode conversion and event sensitivity.
  • A differential pair still needs a reference: when the reference plane is broken (slots, splits, islands), the return current detours, enlarging the loop and raising CM injection.
  • Ground splitting is a last resort: splits often create the exact “return break” that destabilizes CAN-FD data phase and Ethernet training. If a split is unavoidable, define a controlled bridge point and ensure the interface return is not forced across the gap.

CAN / CAN-FD board-side rules (actionable)

  • Transceiver-to-connector region: keep CANH/CANL routing short, avoid running parallel to high dV/dt switching nodes, and avoid crossing plane splits or slots.
  • Symmetry is more than length match: use a consistent reference and balanced proximity to return paths so DM does not convert into CM under disturbances.
  • Pin assignment and shielding: ensure connector pin-out does not bias one line closer to noisy return or shield currents. Asymmetry often appears as stable DM but abnormal CM.

Automotive Ethernet PHY rules (pair routing + shield bonding decisions)

  • Reference-plane continuity is non-negotiable: avoid split crossings, voids, and “island hops” between connector and PHY. These create CM gain and training instability.
  • Shield bonding is a system choice validated by symptoms: select bonding strategy based on which failure class dominates (rate-sensitive vs event-correlated vs boundary-only). A correct strategy reduces event-correlated flaps and improves link-up tail behavior (p95/p99).
  • Do not let shield become a power return: if the shield carries large low-frequency currents, the interface CM window shrinks under operating conditions. Validate using CM delta between connector and PHY.

Common pitfalls that cause “looks OK but unstable”

  • Plane split / slot crossing → return detour → CM rises → FD data phase or training fails first.
  • Shield bond discontinuity → event-correlated bursts / link flaps under load conditions.
  • Connector pin asymmetry → DM seems correct but CM is abnormal and harness variants behave differently.
  • Protection/matching parts placed without return-awareness → “fixes ESD” but worsens eye/edge behavior.

Pass criteria placeholders: CM delta reduced below X; link flaps under event stress drop below X per window; FD data phase stable at target rate with unchanged harness.

Figure 9 — Return-path comparison: good vs bad (why CM jumps)

Return path good vs bad Left panel: continuous reference plane and tight return. Right panel: plane split/slot forces return detour with large loop and common-mode rise. Includes connector and PHY blocks. GOOD BAD Connector pair PHY/Trx CM ok REF plane (continuous) DM tight return shield bond Connector pair PHY/Trx CM up REF plane (split/slot) slot DM return detour shield gap

Engineering Checklist: Design → Bring-up → Production Stage Gates

This checklist is designed as a gate system: each stage must pass objective checks before advancing. Items are intentionally measurable (test points, logs, or pass criteria placeholders) to prevent late-stage surprises.

Design gate (before PCB)

  • Topology + termination strategy reviewed (CAN ends; FD stubs/edges constrained).
  • Common-mode window plan defined (GPD scenarios, harness variants, event stress).
  • Protection placement window reviewed (connector-side energy capture; PHY-side symmetry preserved).
  • Wake/sleep behavior defined (filters and wake sources; avoid noise-wake).
  • Connector pin symmetry + shield bonding strategy reviewed (no return breaks at entry).
  • Observability designed in: test points and required logs are defined and allocated.

Bring-up gate (minimal closed loop)

  • 3-point probing topology ready (board / connector / remote): DM, CM, TERM.
  • Probe method and reference strategy are consistent across locations (comparison is valid).
  • Ethernet link-up time is decomposed (Δ1..Δ4) and p50/p95/p99 are reported.
  • CAN-FD A/B validation done: only one variable changed per trial, error trend is monotonic.
  • Symptom → check → root-cause mapping is data-triggered (not speculation).

Production gate (consistency + stress)

  • Golden harness / golden node defined for correlation and A/B checks.
  • Termination ohms sampled (window X) and flagged for outliers.
  • CM/DM spot checks under defined conditions (window X), including connector vs PHY delta.
  • Stress coverage: temperature, rail perturbation, event disturbance; pass criteria are explicit (X).
  • Link-up tail monitored: p99 < X and tail widening triggers investigation.
  • Log-field completeness enforced: missing key fields = fail gate.

Figure 10 — Three-stage gate flow (copyable project control)

Three-stage gate flow Horizontal flow with three gates: Design, Bring-up, Production. Each gate contains multiple checkbox icons with short labels. Includes STOP separators between stages. Design Gate Bring-up Gate Production Gate ! ! Checklist topology CM plan prot win wake pin sym TP/log Checklist TP 3pt probe same link p99 A/B var tree hit Checklist golden term X CM X stress tail log ok

H2-11. Applications: domain constraints that drive PHY/transceiver decisions

This section is constraint-driven (not a generic overview). Each domain is expressed as: constraints → observable symptoms → interface-layer mechanism → minimum actions → pass criteria. Example part numbers are provided as reference starting points (verify automotive grade, package, and the latest datasheet).

Chassis domain (steering/brakes/suspension): common-mode margin first

Noise: High Length: Mid Nodes: Mid Sleep/Wake: Mid
Typical symptoms (measureable):
  • CAN: sporadic error bursts or bus-off during actuator events (pump/valve/relay switching).
  • CAN-FD: arbitration phase looks fine, data phase shows bursts of CRC/stuff errors.
  • Ethernet (T1): link flaps correlated with high dv/dt events or ground potential shifts.
Interface-layer mechanism (root line):
  • Common-mode window is consumed by ground shift + return-path discontinuities (shield/plane breaks).
  • Protection parts help only when energy closes locally (placement + short return).
  • FD data phase fails first because it has less timing/edge margin for reflections and CM disturbances.
Minimum actions (design / bring-up / production):
  • Design: enforce a continuous return reference at the connector, and avoid shield/plane “gaps” that force detours.
  • Bring-up: log event-triggered CM delta at connector vs PHY pins using the same probe method.
  • Production: add a stress gate (temp + supply ripple + event injection) and track error counters / link flap rate.
Pass criteria (placeholders; set X by system budget):
  • Event-correlated common-mode excursion < X (same measurement setup).
  • CAN-FD data-phase error bursts < X per 10 min under stress profile.
  • Ethernet link flap rate < X per hour across temp + supply corners.
Example reference part numbers (verify features/grade):
Goal: robust interface behavior (fault protection, CM tolerance, observable counters) rather than “fastest on paper”.
CAN / CAN-FD transceivers
  • NXP TJA1044 (high-speed CAN with standby mode).
  • TI TCAN1042-Q1 / TCAN1051-Q1 / TCAN1044-Q1 (CAN FD-capable families).
  • Microchip MCP2562FD (CAN FD transceiver family).
Automotive Ethernet PHY (Single-Pair Ethernet)
  • NXP TJA1102A (100BASE-T1 dual/single-port options; TC10 wake/sleep forwarding).
  • TI DP83TC812-Q1 (100BASE-T1; TC10 sleep/wake supported; newer than DP83TC811 family variants).
  • Microchip LAN8770 (100BASE-T1 PHY family; check low-power feature set per ordering code).
  • Broadcom BCM89884 (100/1000BASE-T1; TC10 stated for 1000M/100M speeds).

E-Drive domain (inverter/traction): wake robustness + return/shield continuity

Noise: Very High Length: Mid Nodes: Low Sleep/Wake: High
Typical symptoms (measureable):
  • False wake events (noise interpreted as wake source); sleep current unexpectedly high.
  • Wake succeeds but link bring-up tail is long (p95/p99 link-up expands) or retries occur.
  • Ethernet: link-up time varies with inverter operating points (duty/torque transitions).
Interface-layer mechanism (root line):
  • Wake path is not a single signal; it is a state machine coupled to CM noise, rails, clocks, and shielding continuity.
  • Return-path detours convert switching energy into common-mode bursts, collapsing jitter/eye margin during bring-up.
Minimum actions (state + logging first):
  • Mandatory logs: sleep enter/exit timestamp, wake source, rail/clock readiness, link-up stage timing, fail reason code.
  • Bring-up decomposition: split “wake detect → rail stable → PHY ready → training → link up” into time deltas.
  • Layout rule: treat shield bonding + reference continuity as a functional requirement (not a cosmetic EMC add-on).
Pass criteria (placeholders; set X by system budget):
  • False wake rate < X / day under worst-case inverter profiles.
  • Link-up time p99 < X ms across temp + supply ripple corners.
  • Wake reason classification completeness = 100% (no “unknown cause”).
Example reference part numbers (verify features/grade):
  • CAN partial networking / selective wake: NXP TJA1145A (selective wake; CAN FD fast phase support depends on variant/code).
  • Fault-protected CAN FD families: TI TCAN1042-Q1 / TCAN1044-Q1 / TCAN1051-Q1.
  • 100BASE-T1 with TC10 forwarding/sleep-wake: NXP TJA1102A / TI DP83TC812-Q1.

Body domain (doors/comfort): node count + standby power + diagnosability

Noise: Mid Length: Low Nodes: High Sleep/Wake: Very High
Typical symptoms (measureable):
  • Battery drain complaints: standby current out of budget; “cannot stay asleep”.
  • Intermittent wake storms: noise or line events trigger wake unexpectedly.
  • Field debug is slow because wake reason / counters are missing.
Interface-layer mechanism (root line):
  • In large node-count networks, observability is a requirement: counters + reason codes cut field triage time.
  • Wake filters must match the harness environment; otherwise “quiet” is impossible at fleet scale.
Minimum actions:
  • Sleep gate: enforce a measurable standby current window (< X) with wake-reason logging enabled.
  • Wake gate: classify wake sources; unknown/uncategorized wake must be 0.
  • Bring-up: verify wake filter behavior under representative harness disturbance (not only bench).
Example reference part numbers (verify features/grade):
  • Selective wake / partial networking direction: NXP TJA1145A (selective wake) and NXP TJA144x family (CAN FD-oriented; check ordering codes).
  • CAN FD baseline options: Microchip MCP2562FD; TI TCAN1042-Q1 / TCAN1051-Q1.
  • 100BASE-T1 backbone nodes: Microchip LAN8770; NXP TJA1102A (TC10 forwarding option).
Figure 11 — Domain constraints “radar cards” (Noise / Length / Nodes / Sleep-wake)
Domain constraints (chassis, e-drive, body) Three stacked cards showing constraint bars for noise, harness length, node count, and sleep/wake demands. Vehicle domains → constraints that dominate PHY/transceiver success Bars indicate relative pressure (not absolute limits). Chassis CM margin first Noise Length Nodes Sleep/Wake E-Drive Wake robustness Noise Length Nodes Sleep/Wake Body Standby + diag Noise Length Nodes Sleep/Wake

H2-12. IC selection logic: gates first, then scoring (with reference part numbers)

Selection is presented as an engineering decision flow: Scenario → Must-have gates → Nice-to-have scoring → Risk flags → Verification hooks. Part numbers below are examples to anchor datasheet reading; always confirm ordering code, AEC-Q100 grade, temperature range, package, and the latest revision.

How to use this section (fast):
  1. Pick the domain profile (Figure 11): Chassis / E-Drive / Body.
  2. Apply Must-have gates (hard reject if any gate fails).
  3. Use Scoring to trade BOM/cost vs debug time vs robustness.
  4. Close the loop with verification hooks (counters + CM measurements + bring-up timing).

Must-have gates (hard requirements)

Gate A — CAN / CAN-FD transceiver
  • Common-mode operating window must exceed worst-case ground shift + event CM injection (budget: X).
  • Fault robustness: short-to-battery/ground tolerance, thermal behavior, and predictable “unpowered” behavior.
  • Low-power + wake behavior: standby current within X; wake filtering that matches harness noise profile.
  • FD timing margin (if CAN-FD): propagation symmetry + edge control sufficient for the bus topology.
  • Diagnostics/observability: error flags/counters or status visibility that reduces field debug time.
Gate B — Automotive Ethernet PHY (100BASE-T1 / 1000BASE-T1)
  • Sleep/wake support must match the network strategy (e.g., TC10 forwarding vs dedicated wake line).
  • Rail/clock readiness sensitivity: link-up should not be fragile to supply ripple or clock sequencing (measure tail).
  • Training robustness: consistent link-up across temperature and EMI stress profile.
  • Counters + reason codes: link events, error stats, and failure classification must be accessible.
  • Protection-capacitance tolerance: the PHY must tolerate realistic ESD/TVS/CMC parasitics without collapsing eye margin.

Scoring (nice-to-have; pick based on domain pressure)

  • Selectable wake filters / pattern-based wake (Body/E-Drive benefits most).
  • EMC helper knobs (edge-rate control, output driver tuning) to “tune into the window”.
  • Built-in test hooks (loopback/PRBS) to reduce ATE/bring-up instrumentation complexity.
  • Functional safety collateral availability (when the system safety case requires it).
Risk flags (always call out): protection capacitance too high, shield bonding discontinuity, split-plane crossings, star topology on CAN, long stubs for CAN-FD data phase, or “no counters/no reason codes” in a low-power network.

Concrete reference part numbers (grouped)

These are not “recommendations”; they are concrete anchors for datasheet comparison and for building the decision tree in Figure 12.

CAN / CAN-FD transceivers (automotive)
  • High-speed CAN (standby): NXP TJA1044.
  • Fault-protected CAN FD: TI TCAN1042-Q1, TCAN1051-Q1, TCAN1044-Q1.
  • CAN FD baseline: Microchip MCP2562FD.
  • Selective wake / partial networking direction: NXP TJA1145A (selective wake); NXP TJA144x family (CAN FD-focused; confirm exact variant capabilities).
Automotive Ethernet PHY (Single-Pair Ethernet)
  • 100BASE-T1 with TC10 forwarding/sleep-wake: NXP TJA1102A.
  • 100BASE-T1 with TC10 sleep/wake: TI DP83TC812-Q1 (note: DP83TC811 variants may differ in TC10 support).
  • 100BASE-T1 PHY family: Microchip LAN8770 (verify low-power feature set by ordering code).
  • 100/1000BASE-T1 with TC10 stated: Broadcom BCM89884.
Tip: When the network is low-power heavy (Body/E-Drive), prioritize “wake reason + counters + bring-up stage timing” as selection criteria. Missing observability often costs more than the part delta during field debug.
Figure 12 — Selection decision tree (Scenario → Must-have gates → Scoring → Risk flags → Verify)
Selection decision tree A flow diagram from scenario entry to must-have gates, scoring, risk flags, and verification hooks. Selection flow: reject by gates first, then score, then verify with hooks Keep it measurable: CM delta, counters, link-up stage timing, stress pass/fail. 1) Scenario entry Chassis E-Drive Body 2) Must-have gates (fail any → reject) CAN / CAN-FD gate CM window fault tol wake filters Automotive Ethernet PHY gate TC10 clk/rails counters 3) Score + risk flags + verify Score (nice-to-have) Risk flags Verify hooks Hooks: CM delta counters link p99

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H2-13. FAQs (CAN/CAN-FD & Automotive Ethernet PHY)

Each FAQ is a strict 4-line, data-structured action loop: Likely causeQuick checkFixPass criteria. Thresholds use X placeholders (set X by your system margin/budget).

CAN is stable on bench but frequent bus-off in vehicle: check ground shift first or termination first?
Likely cause
Either the effective termination/topology is wrong in-vehicle (missing/extra terminators, long stubs), or the common-mode window is being consumed by ground potential difference + return/shield discontinuities.
Quick check
First do the fastest “hard split”: power-off bus resistance at the harness ends (target ~60 Ω for two 120 Ω terminators). If termination is correct, measure event-triggered CM delta at connector vs transceiver pins with the same probe method.
Fix
Correct termination/stub lengths first; then close the return path (shield bond continuity, reference plane continuity near connector). If CM delta is still high, pick a transceiver whose CM operating range covers your CM budget.
Pass criteria
Under the vehicle stress profile: bus-off = 0 over X hours, and event CM delta remains < X (same measurement setup).
CAN-FD arbitration phase OK but data phase CRC explodes: suspect stub reflection first or edge shaping/sample point first?
Likely cause
FD data phase has less margin; the usual triggers are reflections (stubs/termination) or edge/sample-window mismatch (slew too slow/too fast, wrong sampling point, asymmetric delays).
Quick check
One-variable A/B: (A) temporarily remove/shorten the worst stub node and compare CRC burst rate; (B) keep topology fixed and change edge-rate / FD bit timing (if supported) and compare.
Fix
If A dominates: reduce stub length, enforce correct two-end termination, avoid star. If B dominates: tune slew/bit timing/sample point to re-center the data-phase eye window.
Pass criteria
At max FD data rate: data-phase CRC bursts < X per 10 min under the stress profile; no error storm escalation to bus-off.
Same harness, another vendor transceiver becomes “more sensitive”: what is the first common-mode window comparison experiment?
Likely cause
Different transceivers have different CM operating range, receiver thresholds, and edge-control behavior; the “sensitive” one is simply running out of CM margin sooner.
Quick check
True A/B swap: same node, same harness, same termination, same stress events; only replace the transceiver. Log CM delta (connector vs pins) and error counters / bus state for both parts.
Fix
Either (1) reduce CM injection (return/shield continuity, termination, routing) to bring CM delta under budget, or (2) select a transceiver with CM range/robustness that covers your measured CM delta envelope.
Pass criteria
Under identical stress: “sensitive” part error rate ≤ X and no bus-off; CM delta envelope fits inside the selected CM budget.
Vehicle wake-up: CAN works but occasional false wake drains battery. How to quickly verify wake filter is noise-triggered?
Likely cause
Wake detection threshold/debounce is too permissive for the harness noise environment, so noise events are interpreted as valid wake source (often tied to return/shield discontinuities).
Quick check
Build a wake histogram: log wake source, enter/exit timestamps, and the nearest event tag (e.g., actuator/inverter state). Reproduce with controlled disturbance injection and confirm wake source matches the noise stimulus.
Fix
Tighten debounce/window, apply pattern/qualified wake where available, and ensure pull-ups/pull-downs match the harness impedance. Close the return/shield path so noise does not become CM bursts at the wake detector.
Pass criteria
False wake rate X/day over worst-case vehicle profile; standby current returns to < X.
Ethernet T1 link-up sporadically times out: which three timing segments should be split in logs first?
Likely cause
Timeouts are usually not “random”: either rail/clock readiness is unstable, or training is repeatedly restarting because CM/return/shield margin collapses during bring-up.
Quick check
Split link-up into three deltas and plot p95/p99: T_power (rail stable), T_clock (clock stable/locked), T_phyready (PHY-ready → training → link-up).
Fix
Gate training until rails/clocks are truly stable, harden the rail (decoupling/sequence), and close the return/shield path so CM bursts do not reset training.
Pass criteria
Timeouts = 0 over X cycles; link-up p99 < X ms with stable segment deltas.
TC10 enabled: can sleep, but wake causes link flaps. What handshake is most often misaligned and what to capture first?
Likely cause
The wake/exit sequence is bouncing: rails/clocks/PHY-ready are not aligned with the exit state machine, or the wake source itself is noisy, causing repeated enter/exit and re-training.
Quick check
Capture: TC10 enter/exit timestamps, wake reason, link event counter, training retry counter, and the three timing deltas (T_power/T_clock/T_phyready). If available, sample the sleep control + wake signal level at transitions.
Fix
Add hold-off/hysteresis to exit, ensure rails/clocks settle before training, and harden wake filtering so wake is stable (not a bursty noise proxy).
Pass criteria
After wake: link flaps = 0 within the first X s; retries ≤ X over X cycles.
Common-mode choke improved EMI but link is less stable: how to tell if capacitance/imbalance is hurting the eye?
Likely cause
The choke adds insertion loss, parasitic capacitance, or imbalance that reduces differential margin (eye/edge), or its placement creates a return-path discontinuity that turns disturbances into CM bursts.
Quick check
A/B with only one change: choke in vs out (or alternate part). Compare link retry/error counters and link-up p99 (Ethernet), or edge/reflection/error bursts (CAN/CAN-FD), using identical probe bandwidth and grounding.
Fix
Use a lower-parasitic, better-matched choke (or remove if not needed), and place it so protection energy and return currents close locally near the connector without forcing detours.
Pass criteria
EMI remains compliant and link stability improves: retries/error bursts < X, link-up p99 < X, with no new flap patterns.
Link drops only at high e-drive torque: check return path first or shield bonding first?
Likely cause
Torque steps create strong dv/dt/di/dt that becomes CM bursts when return paths detour or shield bonding is discontinuous. The interface runs out of CM/jitter/eye margin only at those events.
Quick check
Measure CM delta during torque steps at two points: connector side and PHY/transceiver pin side. If you can add a temporary shield bond strap, compare dropouts and CM delta envelope with the strap on/off (one-variable A/B).
Fix
Restore return continuity (avoid plane slots/crossings), implement consistent shield termination strategy near the connector, and keep the interface reference stable under inverter events.
Pass criteria
Under max-torque profile: dropouts = 0 over X hours, and CM delta stays < X at both measurement points.
Production passes but hot vehicle fails: which environment/power fields should be logged for correlation?
Likely cause
Heat shifts rails/clock stability and reduces CM/eye margin; without the right fields, failures look random and cannot be reproduced station-to-vehicle.
Quick check
Log at minimum: temperature (board + ambient), rail min/max and ripple proxy (X), wake/TC10 timestamps, T_power/T_clock/T_phyready, and error/retry counters. Compare hot vs room across the same stress recipe.
Fix
Add a hot-soak + rail-stress gate in production, tighten sequencing/stability margins, and ensure the exit/bring-up state machine is gated by real readiness (not assumptions).
Pass criteria
Correlation becomes deterministic (field split): failures occur only when a logged field exceeds X, and after mitigation hot pass rate ≥ X%.
After an ESD hit, CAN does not crash but error rate increases: check TVS leakage/clamp shift or transceiver damage first?
Likely cause
“Soft damage” often shows as either protection part drift (leakage/clamp behavior) or reduced transceiver margin (receiver/driver degradation) without a full failure.
Quick check
Two-step A/B: replace TVS only and re-measure error rate; then restore TVS and replace transceiver only. Also measure leakage/standby current shift vs baseline.
Fix
Improve protection placement/return closure at the connector, and ensure the selected protection parasitics match the interface margin. Replace the part category that A/B confirms as degraded.
Pass criteria
Error rate returns to baseline < X under stress; leakage/standby shift < X vs golden unit.
Harness length increased: communication still works but diagnostics slows down. How to quickly tell slower edges vs higher CM noise?
Likely cause
Longer harness increases loss and coupling: either edges slow (reducing timing margin) or CM noise rises (triggering retries/errors that look like “slow diagnostics”).
Quick check
Using identical probe bandwidth/grounding, compare short vs long harness: rise/fall time (edge) and CM noise floor + event CM delta. Also compare error/retry counters and link-up timing tail (if Ethernet).
Fix
If edge-limited: improve termination/topology or tune edge-rate. If CM-limited: close return/shield, reduce CM injection, and ensure protection parasitics do not worsen imbalance.
Pass criteria
Diagnostic latency p95 < X; error/retry counters remain < X over X minutes under stress.
BER/drop rate differs across stations: what is the first station-to-station consistency calibration step?
Likely cause
Most station differences come from setup mismatch: termination, probe bandwidth/grounding, fixture reference, firmware/config, or link bring-up timing assumptions.
Quick check
Use a golden node + golden harness. Lock termination, test profile, bandwidth/filter, trigger, firmware version. Run the same script on every station and compare baseline: BER/error counters and link-up p99 (if Ethernet).
Fix
Create a station calibration SOP (termination check, probe method, fixture reference, config hash, golden baseline). Reject stations that deviate and re-calibrate before shipping conclusions to design.
Pass criteria
Station-to-station BER/error rate within ±X (or within a factor of X), and link-up timing within ±X ms for the golden setup.