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Smart Ring Hardware Design: Sensors, BLE, Power & Dock

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A smart ring is a mixed-signal, ultra-low-power system where real performance is proven by evidence: microamp sleep current, clean burst timing, stable PPG/temperature/EDA signal chains, and a dock/ESD design that prevents charging and RF events from corrupting analog measurements.

If the power domains, timing windows, contact interfaces, and protection paths are engineered correctly, the ring can deliver multi-day battery life and repeatable sensor data across users and real-world wear conditions.

H2-1. System boundary & performance targets (ring-specific, measurable)

Intent: Define “good” for smart-ring hardware using measurable acceptance criteria (power, sensor headroom, contact robustness, and link cost) without drifting into phone-app/cloud workflows or medical diagnosis claims.

Tiny battery → strict µA average Bursty loads → mA peaks & droop risk Small optical path → PPG headroom margins Electrode contact variability → EDA impedance reality On-skin thermal coupling → settling & self-heating bias Tiny dock alignment → charge bounce & ESD entry
How this page stays “ring-only”: Every later chapter must map back to the KPIs below using physical evidence (current waveforms, ADC-code distributions, saturation counters, impedance traces, and event logs). No app UX or cloud architecture.
One budget table (engineering acceptance, not a generic spec sheet)
Domain KPI (what to lock) Target band (examples) Why it matters Evidence to capture
Power Iavg (24h) + Ipeak shape
Average decides days; peaks decide resets.
Iavg: ~30–250 µA
Ipeak: ~5–60 mA bursts
Exact band depends on battery mAh and duty cycle.
Rings fail when “average looks fine” but burst overlap causes rail droop, UVLO, or hidden wake-storms. Battery/rail current waveform (baseline + bursts), event counters (wake count/hour), reboot/brownout log.
PPG ADC headroom + saturation rate
Keep margin at low LED current.
≥6–12 dB headroom under “worst-case” optical return
Saturation <0.1% of samples
If headroom collapses, firmware “fixes” only mask the real issue: leakage, ambient, gain staging, or timing. ADC-code histogram, saturation counter, AFE output snapshot aligned to LED pulses, noise PSD in HR band.
Temp On-skin settling + self-heating bias Settling to stable band in ~2–10 min
Burst-induced bias bounded (device-specific)
A ring is a small thermal mass; RF/LED/charge bursts can imprint “fake” temperature steps. Wear/remove step response, correlation between burst activity and temperature spikes, sensor placement map.
EDA Usable impedance window + contact detect ~20 kΩ to >1 MΩ (skin/fit dependent)
Stable “no-contact” discriminator
EDA lives or dies by electrode polarization, moisture, pressure, and leakage paths—must be detected, not guessed. Impedance vs time trace, raw ADC stability under dry/moist/motion, leakage check after humidity exposure.
BLE Link cost per hour (advertise + connect) Track as µC/event and events/hour
(instead of “range claims”)
BLE energy is “quantized” by connection events; wrong intervals or retry storms dominate the daily budget. BLE event current profile, retry/CRC counters, connection interval configuration + measured event frequency.
Minimum acceptance evidence pack (ring-ready):
  • Power: baseline + burst current waveform (battery input or main rail) + wake count/hour + reboot/brownout counter.
  • PPG: ADC-code distribution + saturation rate + AFE/ADC snapshot aligned to LED pulses + noise PSD.
  • Temp: wear/remove settling curve + burst-activity correlation plot (time-aligned).
  • EDA: impedance/ADC trace across contact states + leakage/offset drift check after humidity/sweat exposure.
  • BLE: event current profile + retry counters + measured event cadence (per hour) under representative usage.
Power Path Sensor Island Compute + Link Tiny Dock Battery PMIC Rails AO / SW Protections Gauge PPG AFE Temp EDA Electrodes + AFE ADC / Timing Artifact Tag (IMU optional) ULP MCU BLE SoC Logs / Counters Pogo Pins Magnet ESD Test pads
Figure F1 Cite this figure: Smart Ring hardware blocks (ICNavigator)

Why this chapter matters: If the acceptance table is not locked first, later “optimization” becomes guesswork. Power, headroom, and contact reality must be proven with waveforms and counters—before any feature discussions.

H2-2. Power budget & duty-cycling architecture (the real ring moat)

Intent: Achieve multi-day battery life by engineering the ring as a controlled set of bursts (LED pulses, ADC windows, compute, BLE events) separated by true deep-sleep—then proving it with current waveforms.

A ring-typical state machine (hardware gating, not a marketing flow)
  • Shipping: deepest storage mode. Only a minimal wake source allowed (dock attach or long-press, if present).
  • Idle (not worn): ultra-low baseline; periodic wear-detect probe (short, bounded).
  • Wear-detect: confirm contact state using a low-energy discriminator (avoid keeping the full sensor chain awake).
  • Measure burst: enable only the required rail(s), run LED pulse train + AFE settle + ADC capture inside a fixed window.
  • Sync burst: batch data into short BLE events; avoid long “connected” periods that silently dominate the day budget.
  • Charge: charge-control + protection. Measurement policy must be explicit (what is allowed/blocked while charging).
Energy-per-burst accounting (what to budget and what to measure)
Do not budget by “average current guess.” Budget by event energy (integral of current over time), then multiply by daily counts:
  • Emeas (per measurement): LED pulse energy + AFE/ADC window energy + compute energy + storage write energy.
  • Eble (per BLE event): event current integral (µC/event) × events/hour.
  • Eday: Σ(Emeas × measurements/day) + Σ(Eble × events/day) + baseline × 24h.
The dominant hidden killer is usually event storms (unexpected wake-ups, retry bursts, or “always-on” rails), not the nominal measurement schedule.
Hardware-timed vs firmware-timed (to avoid drift and wake storms)
Must be hardware-timed / hardware-gated Can be firmware-scheduled (inside active windows) Hard “do-not-overlap” resources
RTC wake + sleep entry/exit
Rail switch / load switch gating
LED enable + pulse timing window
ADC capture window (fixed length)
Brownout/UVLO interrupt logging
Lightweight filtering/feature extraction
Packetization + timestamp stamping
Batch storage indexing (in RAM first)
BLE payload selection (short bursts)
LED burstBLE TX
LED burstNVM write
BLE TXNVM write
Avoid peak stacking that creates rail droop and analog noise.
Scheduling rules (ring-safe, evidence-driven)
  • Quiet windows: reserve conversion windows where RF TX is blocked and rails are stable (PPG/EDA capture stays inside them).
  • Batching principle: store locally first, then sync in short bursts; avoid keeping the radio “warm” by frequent small transfers.
  • Overlap matrix: explicitly prohibit LED+RF and LED+write overlaps; enforce with rail gating and event arbitration.
  • Baseline discipline: if baseline is high, measure which wake source dominates (RTC vs GPIO vs dock bounce) before changing anything else.
Must-have evidence (3 captures that make power behavior obvious)
  • Rail current waveform: show µA baseline + burst envelopes; flag unexpected periodic spikes (wake storms).
  • LED current pulse: verify pulse width/count and alignment to ADC window; ensure no extra “tail” current.
  • BLE event current profile: integrate to µC/event; confirm event cadence matches the intended connection interval / advertising schedule.
Duty-cycle timeline (text-light, event-based) LED ADC BLE Sleep Window Deep sleep dominates Resulting current waveform µA baseline mA peaks Peak stacking avoid overlap Measure → Sync → Sleep

Field-proofing tip: If users report “random reboot” or “battery drops fast,” start with the waveform: (1) baseline too high → hidden wake source, (2) periodic tall spikes → retry storms or overlap, (3) peak+droop coincidence → rail gating / UVLO margin problem.

H2-3. PPG AFE: optical front-end, noise, and motion artifact discriminators

Intent: Build a PPG chain that (1) stays out of saturation across skin/contact variability and ambient light, and (2) preserves usable SNR at low LED current. Motion handling is ring-safe: IMU is used only as a quality tag, not as an algorithm deep dive.

Headroom first (avoid clipping) Low LED current, still usable SNR Ambient margin (cancellation not near limit) Timing windows (LED / blanking / ADC) RF quiet window during capture
Two failure paths to separate early:
A) Saturation / clipping: ADC codes hit rails, waveform flattens, “too clean” but unusable under some users/light.
B) Noise drowning: no clear band energy at low LED current; PSD rises in the HR band; walking/loose fit collapses the signal. The evidence pack below is designed to discriminate A vs B quickly.
Optical front-end (hardware-only decisions)
  • LED wavelength (HW angle): choose for energy-per-useful-SNR, not marketing claims. Lower LED current budget reduces thermal/self-heating and extends duty-cycle margin.
  • Photodiode area & capacitance: larger PD increases signal but raises capacitance, impacting TIA stability/noise and bandwidth margin. Balance PD size with TIA feedback values.
  • Leakage paths: ring geometry and window reflections can create “false DC” that consumes headroom. Treat leakage as a measurable offset that must not drive ADC toward rails.
  • Mechanical fit sensitivity: contact pressure and micro-gaps change optical coupling. Design for acceptable headroom across expected fit variance, not only “ideal press-fit.”
AFE essentials (noise, ambient cancellation, ADC dynamic range)
  • TIA noise & stability: avoid chasing gain by default. If gain is too high, saturation appears first under strong ambient/leakage; if too low, SNR fails at low LED current.
  • Ambient cancellation margin: keep cancellation output away from its limit; otherwise the system becomes fragile to sun/indoor transitions and window contamination.
  • ADC dynamic range: lock a headroom rule: typical operation stays well inside rails; rare peaks should not clip during walking or ambient transients.
  • Anti-alias filtering: protect the HR band by blocking out-of-band noise folding; aliasing often looks like “mysterious in-band noise” in PSD.
Timing windows & “quiet capture” rule
  • LED pulse → blanking → ADC window: blanking hides switching and optical transients; the ADC window must sit after settle and before unnecessary drift.
  • RF quiet window: block BLE TX during capture; otherwise RF burst coupling can raise the in-band noise floor and mimic motion artifacts.
Evidence pack (2 waveforms + 1 spectrum)
Capture What to look for What it proves (fast discriminator)
Waveform #1: AFE output or ADC codes
still / walking / poor contact
Clipping/flattening vs noisy wandering baseline; compare amplitude distribution across states. Distinguishes saturation (codes pinned/flat) from noise drowning (codes spread but no band energy).
Waveform #2: LED current + blanking alignment Pulse width/count stable; blanking covers switching transient; ADC window lands after settle. Proves whether timing is injecting artifacts (too-short blanking, misaligned capture, or unnecessary LED tail current).
Spectrum: noise PSD around HR band Check in-band floor and spurs; compare “quiet window” vs “RF active” conditions. Confirms whether in-band noise is dominated by analog noise, aliasing, or digital/RF coupling.
PPG signal chain (ring hardware view) noise points + timing LED Driver LED Skin / Optics leakage / ambient PD TIA Ambient cancellation ADC Digital Filter Quality Tag artifact flag IMU (optional) tag motion switching ambient TIA noise ADC ref RF burst Capture timing (one burst) LED / AFE ADC LED ON Blanking ADC Window RF quiet window

Ring-specific takeaway: If headroom is not protected, the system becomes user- and light-dependent; if SNR is not preserved at low LED current, power budget collapses. The fastest debug path is always: ADC distributiontiming alignmentPSD in HR band.

H2-4. Temperature sensing on skin: placement, self-heating, and time constants

Intent: Make temperature meaningful on a tiny wearable attached to a warm, moving heat source by engineering the thermal path, sensor placement, and self-heating policy—then validating with step response and activity correlation.

Placement defines what is measured Time constant must be characterized Self-heating bias must be bounded Charging dominates thermal bias Contact state affects validity
Placement: NTC vs IC sensor (hardware trade-offs)
  • NTC (thermistor): flexible placement and fast local response, but reads strongly through its mounting path (pad, adhesive, metal contact).
  • IC temperature sensor: stable transfer function and easier manufacturing control, but package and PCB copper can bias readings toward device temperature.
  • Placement rule: closer to skin interface → more “skin-like” but more sensitive to moisture/sealing; closer to PMIC/battery → more “device-like” and more burst-coupled.
Self-heating map (what biases temperature in a ring)
  • LED pulses: short, high-power bursts—bias depends on thermal path from LED/AFE to the sensor node.
  • RF bursts: periodic energy injection—can create pseudo-periodic temperature ripple if the sensor is near the RF/PMIC copper.
  • Charging: the dominant bias source—battery and charger losses raise local temperature; treat “charging state” as a hard context flag.
Practical calibration boundaries (measurement-only)
Item What it means in hardware How to validate (no app/cloud)
Offset Unit-to-unit mechanical/assembly bias (adhesive thickness, copper, sensor attach). Usually stable per device. Compare against a stable reference in controlled ambient; record offset binning and repeatability after thermal cycling.
Slope Transfer function gain; often stable if the sensor type and attach are controlled. Two-point or multi-point test across temperature; confirm slope remains stable across humidity exposure and sealing variations.
Contact state Whether the reading is dominated by skin coupling or by device self-heating/ambient air. Wear/remove step response and “contact present” flag behavior; define validity conditions for reporting temperature.
Evidence pack (must-have)
  • Wear/remove step response: characterize settling time and hysteresis; this is the fastest way to reveal whether placement is skin-coupled or device-coupled.
  • Burst correlation: time-align temperature with LED/RF/charge activity; quantify whether bursts create measurable spikes or ripple.
Thermal paths (ring-scale) placement + hot spots Skin interface contact / moisture / airflow Ring body Battery PMIC LED / AFE / RF activity hot T1 (skin-side) T2 (mid-body) T3 (near PMIC) Dock / charging context Charger Battery heating Self-heating sources: LED / RF / PMIC / charge bias Evidence points wear/remove step • burst correlation Step response Burst correlation

Ring-specific takeaway: Temperature validity is defined by thermal coupling + time constant + context flag. Without step response and burst correlation, “calibration” is usually compensating for uncontrolled self-heating or poor placement.

H2-5. EDA/GSR on a ring: electrodes, biasing, and impedance reality

Intent: Make EDA usable on a ring by engineering the electrode–skin interface, bias/protection strategy, and a reliable “contact / no-contact” discriminator. The goal is to separate motion, dry skin, and poor fit from real impedance behavior, using measurable evidence rather than assumptions.

Contact reality (area/pressure/moisture) Polarization drift bounded Bias stays in linear region Common-mode managed Independent contact detect
Ring EDA “impedance reality”: the interface is not a fixed resistor. It is a time-varying element shaped by contact area, pressure, moisture, and electrode polarization. Without a contact discriminator, the system will mislabel “no-contact” and “dry skin” as meaningful impedance changes.
Electrode geometry & placement (engineering view)
  • Effective contact area: the usable area is set by pressure and micro-gaps; the nominal electrode size is not the measurement area.
  • Pressure sensitivity: micro-slips during motion modulate contact impedance; treat it as an artifact source with recognizable signatures.
  • Moisture state: dry skin raises impedance and noise; moist contact lowers impedance but can increase slow drift from interface polarization.
  • Layout goal: make both electrodes see similar mechanical conditions; asymmetry often creates common-mode swings and false differential readings.
Front-end: bias scheme, input protection, ADC & common-mode
  • Bias scheme: choose a bias level that avoids forcing the interface into non-linear behavior. Keep a margin to absorb slow polarization drift without saturating the front-end.
  • Input protection: ESD and dock-contact events can introduce leakage paths; leakage looks like “mysterious long-term drift” and can shrink usable ADC headroom.
  • Common-mode management: ring-scale grounds are noisy. Ensure the IA/AFE input common-mode stays inside its valid window across motion and digital bursts.
  • ADC resolution: value is limited by drift and leakage. Prioritize stable headroom and known limits over chasing extra bits.
Artifact signatures & reliable no-contact detection
Condition Typical signature (hardware view) Fast discriminator (what to measure)
Motion Intermittent impedance steps + short spikes; often repeats with movement timing. Align raw ADC/impedance vs motion flag timing; confirm bursts are not overlapping capture windows.
Dry skin Impedance trends high; noise floor rises; readings appear “jittery” with weak structure. Observe raw ADC stability under controlled stillness; check if noise rises even without motion.
Poor fit / no-contact Impedance rails high or becomes discontinuous; abrupt state flipping with tiny movements. Use an independent contact-detect path (comparator/threshold) to label invalid windows.
Evidence pack (must-have)
  • Impedance vs time during wear: look for settling, drift, and rail behavior across contact changes; identify “state switching” zones.
  • Raw ADC stability (dry / moist / motion): compare variance and saturation; confirm whether instability is physical contact or electrical coupling/leakage.
EDA (ring) interface + AFE contact detect included Electrode A Electrode B Skin interface pressure / moisture polarization drift Input protection Bias scheme IA / AFE ADC Contact detect comparator MCU state Quality flag ESD/leak drift CM noise Evidence impedance vs time • raw ADC stability dry / moist / motion

Ring-specific takeaway: EDA becomes usable only when invalid windows are labeled with an independent contact discriminator, and when bias/protection prevent leakage-driven drift from consuming ADC headroom.

H2-6. MCU + BLE SoC partitioning: what runs where (and why it matters for power/noise)

Intent: Avoid the classic ring failures: radio events coupling into analog measurements, and firmware preventing deep sleep. Partitioning and time scheduling must enforce quiet windows for AFE capture, while preserving local data integrity with counters and buffers.

Deep sleep stays deep AFE capture has RF-quiet windows Wake sources are deterministic No NVM writes during capture Counters expose missed samples
Failure pattern to prevent: ADC noise floor rises exactly at RF events, and “missing sample” happens without clear error flags. The cure is architectural: isolate responsibilities, enforce scheduling gates, and leave evidence in counters/buffer signatures.
Partition choices (single chip vs ULP MCU + BLE companion)
Option Strength Common pitfalls (ring reality)
Single BLE SoC Less BOM and simpler interconnect; fewer wake lines; potentially smaller footprint. Radio stack activity can extend wake time; harder to guarantee RF-quiet capture windows; retention/IRQ paths often keep rails awake.
ULP MCU + BLE SoC MCU owns sensor timing and sleep policy; BLE wakes only for short sync bursts; quiet windows easier to enforce. Bad wake wiring causes wake storms; host interface chatter can leak power; scheduling must explicitly block RF during capture.
Noise coupling: how digital bursts enter analog (and what to lock down)
  • Ground bounce: RF/digital current pulses modulate analog reference. Mitigation is both layout and scheduling: block RF TX during capture.
  • Rail coupling: shared supply droop or ripple shifts AFE bias/ADC reference. Use rail gating/filters and avoid high-current operations during capture.
  • I/O activity: bus toggling and interrupts near sampling windows inject jitter and noise. Gate “chatty” interfaces during AFE conversion.
Local data integrity (hardware-visible evidence, not cloud)
  • Timestamps: monotonic time base; mark discontinuities after reset/undervoltage so gaps are visible.
  • Sample counters: increment at acquisition; compare expected vs actual to expose missed samples.
  • Ring buffer: bounded storage with explicit overrun signature; avoid silent overwrite without flags.
Evidence pack
  • Analog noise vs RF event timing: overlay ADC noise/PSD with RF event markers; confirm capture window is RF-quiet.
  • Missed-sample / overrun signature: verify counters change exactly when buffer pressure rises or when scheduling violates windows.
Digital / analog partition + scheduling quiet windows Partition Sensor island PPG / EDA / Temp ULP MCU timing • counters • buffer quiet gate (capture) BLE SoC radio events Wake: RTC • contact • dock Wake: BLE IRQ / wake pin Scheduling map (one cycle) AFE capture BLE events NVM write quiet window BLE burst batch write RF blocked no ADC no AFE

Ring-specific takeaway: The system becomes predictable only when capture is protected by scheduling gates, and when local counters/buffer signatures expose violations (missed samples, overruns, or RF overlap).

H2-7. Energy management & rails: PMIC topology under tiny battery constraints

Intent: Keep analog sensors stable while the micro-battery droops and system load is bursty. The power tree must separate always-on (AO) from switched (SW) domains, gate bursts to avoid worst-case concurrency, and convert brownouts into predictable, logged degradations rather than reboot loops.

AO vs SW domains Load switches & gating Quiet rails for AFE UVLO + hysteresis Graceful degrade + logs
Ring power reality: battery internal resistance and tiny form factor turn LED/RF bursts into measurable rail droop. Without domain gating, “LED + BLE + write” concurrency can collapse rails, corrupt AFE capture, and trigger repeated resets.
Rail strategy: always-on vs switched domains
Domain Typical blocks Key rule (ring-grade)
AO (Always-On) RTC/timebase, wake logic, retention, minimal battery monitor, event-log stub Must stay quiet and µA-class. Never allowed to be dragged by burst loads.
SW (Switched) PPG LED + AFE, EDA AFE, BLE/RF, display/UI (if any), storage writes Must be windowed and gated. Avoid worst-case overlap by scheduling.
PMIC topology choices (what matters in a ring)
  • Retention LDO: keeps critical state alive with predictable noise and leakage while the rest is gated off.
  • Buck vs LDO rails: efficiency helps battery life, but AFE stability needs ripple/PSRR discipline and clean references.
  • Load switches: define inrush, sequencing, and “what wakes what.” Gate SW domains so bursts can be serialized.
  • PG (power-good): treat PG as a “rail truth signal” used by firmware to avoid sampling on unstable rails.
Battery measurement: ring-reality use (decision-grade, not cosmetic)
  • Voltage-only estimation: easy but misleading under burst load; droop is not equal to true state-of-charge.
  • Coulomb counting / fuel gauge: more reliable for decisions, but still needs temperature awareness and offset control.
  • Practical goal: use battery data to trigger degrade policies (reduced LED current, delayed sync, block concurrency).
Brownout strategy: UVLO thresholds + graceful degrade
  • UVLO + hysteresis: avoid “threshold ping-pong” that causes reboot loops at low battery.
  • Graceful degrade ladder: reduce LED pulse current/length → reduce BLE sync rate → block overlap → stop high-sensitivity capture if needed.
  • Event logs: on every reset/brownout, record reset reason + last known burst context (LED/RF/charge state) to pinpoint root cause.
Evidence pack (must-have)
  • Rail droop during LED + BLE concurrency: capture VBAT + key rails; look for droop depth and recovery time, and whether PG toggles.
  • Brownout/reboot event log: verify reset reason and context flags; confirm the device degrades instead of entering repeated resets.
Power tree + domain gating AO vs SW Battery micro-cell Charger power-path Buck main rail Retention LDO (AO) AO domain quiet • µA-class SW domain gated • windowed RTC Wake logic Event log Battery mon PPG LED + AFE BLE / RF EDA AFE NVM write Load switch burst TP_VBAT TP_VSYS TP_VANA

Ring-specific takeaway: a stable ring needs a domain plan (AO vs SW), gated concurrency, and brownout policies that leave evidence (rails + logs) instead of reboot loops.

H2-8. Tiny dock charging: pogo-pin/magnet alignment, safety, and charge noise isolation

Intent: Treat the dock as a system-defining interface. Dock mechanics determine contact resistance and bounce, which in turn drive charging reliability, ESD risk, and noise coupling while charging. The charge path must protect against intermittent contact and enforce a clear “measure while charging” policy.

Alignment → resistance Bounce waveforms ESD/TVS close to pins Thermal limits (NTC) Charge-noise isolation
Dock failure pattern: “Shows charging but battery does not rise” often comes from contact bounce and termination mis-detection. The fix is not cosmetic: it is contact physics + protection placement + charge-path architecture + a strict measurement policy.
Dock mechanics → electrical consequences
  • Misalignment: reduces effective pin contact and increases resistance, creating voltage steps that disturb the charge controller.
  • Contact bounce: intermittent open/close produces current “sawtooth” pulses and repeated charger state transitions.
  • Contamination: sweat residue/oxidation shifts resistance over time, making charging behavior drift across weeks.
Charger strategy: CC/CV, thermal limits, termination under micro-battery
  • CC/CV control: stable current requires stable contact; bounce forces retries and increases ripple on system rails.
  • Thermal limits: ring enclosure traps heat; NTC placement and limits prevent local hot spots during charge.
  • Termination robustness: termination criteria must tolerate bounce without false “charge done” events.
“Measure while charging” policy (what must be disabled)
Category Policy Reason (evidence-driven)
High-sensitivity capture Disable PPG/EDA capture windows while charging (or mark as invalid) Charge ripple + bounce steps couple into AFE rails and appear as artifacts/noise floor rise
AO essentials Keep RTC + minimal logging + safety monitors alive Preserves state and records brownout/charge events without adding burst noise
Sync / telemetry Allow short, scheduled bursts only (if rails stable) Prevents RF overlap with any remaining measurements and reduces wake time
Evidence pack (must-have)
  • Charge current vs contact bounce waveform: observe I_CHG while inducing small dock movement; confirm bounce causes state cycling.
  • Charger ripple coupling into AFE: overlay VANA ripple with ADC noise/PSD; confirm artifacts match charge ripple timing.
Dock interface + protection + charge path noise isolation Dock Pogo + Pogo – Magnets / alignment ESD / TVS Charger IC CC / CV NTC Power-path ORing Battery System rails AO RTC • logs SW AFE • RF • LED TP_I_CHG TP_VANA ripple bounce

Ring-specific takeaway: charging reliability is shaped by alignment and bounce, while measurement integrity requires a strict “disable or invalidate high-sensitivity capture during charge” policy plus clear test points for ripple evidence.

H2-9. EMC/ESD/waterproofing: protecting a high-impedance mixed-signal device on the body

Intent: Survive sweat, ESD, and RF while keeping high-impedance analog inputs clean. The design must force disruptive currents into controlled return paths (TVS/structure return) and away from AFE inputs. Waterproofing must be treated as an electrical constraint: sealing can change electrode behavior and create trapped-moisture leakage.

ESD entry points mapped Return path discipline High-Z leakage control Sealing zones & trapped moisture Rail-glitch evidence
Mixed-signal fragility: EDA and other high-impedance nodes can be damaged or silently biased by leakage. A design that “doesn’t reset” under ESD can still fail if analog rails or inputs glitch during the event.
ESD entry points (ring-specific)
Entry point Typical injection path Must NOT be reached
Dock pins Plug/unplug transient → charge path / system ground disturbance Analog rail (VANA) and AFE input references
Electrodes Body ESD + sweat bridge → direct high-Z node coupling EDA AFE inputs (high-Z), bias nodes, guard regions
Metal ring body Large-area capacitive coupling → common-mode disturbance AFE input front-end and quiet ground regions
Button opening (if any) Direct spark to internal wiring/ESD gaps MCU reset line + analog references
Waterproofing constraints that affect signals
  • Sealing changes electrode behavior: the electrode perimeter and dielectric environment shift effective contact and polarization signatures.
  • Trapped moisture: sealed cavities can retain humidity and ions, creating slow leakage that biases high-Z inputs and drifts baselines.
  • Surface leakage: residue (sweat/salts) lowers surface resistance; high-Z nodes need physical separation and controlled surfaces.
Ring-scale grounding & shielding (practical rules)
  • Short, separated high-Z routing: keep EDA high-impedance nodes short and isolated from charge/RF/clock edges.
  • “Closest clamp wins” placement: TVS/ESD diodes must be physically close to entry points to shape the current path.
  • Return-path clarity: provide a defined return route (structure/ground path) so ESD does not seek a path through AFE inputs.
Evidence pack (must-have)
  • ESD gun outcomes + rail glitches: record reset reason and capture VBAT/VSYS/VANA behavior near the event; verify analog rails stay within safe bounds.
  • Humidity exposure drift: measure leakage-driven drift (sleep current shift, high-Z baseline drift, EDA raw stability change) after humidity soak.
ESD current paths + sealing zones keep high-Z clean Metal ring body Dock pins Electrodes Button (opt) TVS / clamp Return path AFE inputs high-Z node NO Sealing zone Seal perimeter Trapped moisture leakage risk desired path forbidden
Figure F9 Cite this figure: ESD paths + sealing zones (ICNavigator)

Ring-specific takeaway: waterproofing and ESD are electrical constraints. The only stable outcome is a controlled ESD return path plus leakage-aware sealing that keeps high-impedance inputs isolated from moisture-driven drift.

H2-10. Calibration & production test: what you can actually test at scale

Intent: Convert “lab-good” into “mass-good” using scalable hardware checks. The production plan focuses on go/no-go windows and binning from measurable signals: optical sanity, temperature self-consistency, electrode continuity/leakage bins, and power signatures (sleep + bursts + charge acceptance).

DFT pads + modes Go/No-Go windows Binning (A/B/C) Counters + flags Minimal jig
Production truth: if a failure cannot be reproduced on a simple jig with clear thresholds, it will escape to the field. Design-for-test (pads + deterministic burst modes + counters) is part of the product.
DFT prerequisites (hardware-only)
  • Test pads: expose VBAT/VSYS/VANA and at least one charge current sense point (or proxy).
  • Deterministic modes: fixed LED pulse train, fixed BLE burst window, fixed “quiet mode” for analog capture.
  • Counters/flags: sample counter, missed-sample counter, brownout flag, reset reason, charge-state flag.
Module checks you can run at scale
Block Go/No-Go check (hardware-facing) Output
PPG chain LED/PD sanity; ambient response; ADC code window (not near rails); saturation margin under fixed pulse PASS/FAIL + optional bin (margin)
Temperature Quick two-point or self-consistency trend check; reject outliers and stuck sensors PASS/FAIL
EDA Electrode continuity; leakage proxy; impedance range bins using fixture (open/short + resistor bins) BIN A/B/C + FAIL
Power Sleep current; burst signature (LED burst / BLE burst); verify rail droop stays within bounds PASS/FAIL + margin bin
Charge Charge acceptance: stable entry into CC; termination robustness under controlled contact disturbance PASS/FAIL
Evidence pack (what to log on the line)
  • Go/No-Go thresholds: record min/max windows used for each test to catch drift across lots.
  • Counters: sample counters + reset/brownout flags during burst tests to detect silent instability.
  • Minimal jig description: dock jig (power/charge), optical dummy (遮光/反射块), electrode fixture (open/short/resistor bins).
Production test flow + test nodes go/no-go + bins Flow Power-on Sleep Iq PPG check Temp check EDA bins Result PASS / FAIL / BIN Test nodes + minimal jigs Ring DUT TP_VBAT TP_VANA TP_VSYS TP_I_CHG Counters / Flags Dock jig power + charge Optical dummy 遮光 / reflect Electrode fixture open / short / resistor bins BIN A/B/C
Figure F10 Cite this figure: Production test flow + nodes (ICNavigator)

Ring-specific takeaway: scalable production quality comes from deterministic test modes, pads, and thresholds. If the line cannot measure it quickly (nodes + jigs + counters), the field will measure it painfully.

H2-11. Field debug playbook: symptom → evidence → isolate → fix (ring edition)

Working rule: every symptom starts with two measurements (waveforms/flags), then a discriminator that proves Contact vs Power vs Scheduling vs EMC/ESD, followed by a first fix that is hardware-actionable.

Minimum toolset (low friction, ring-reality): DMM + scope (one rail + one current sense) + a stable dock jig; optional IR camera / near-field probe. Firmware evidence is limited to reset reason, brownout flag, sample counters, and charge-state (no app/cloud dependency).

  • AO sleep current (µA)
  • Burst current signature (mA)
  • VBAT / VSYS / VANA droop
  • I_LED pulse + blanking window
  • I_CHG + dock bounce
  • Humidity leakage drift
  • Reset reason + UVLO flags

Quick map (one-screen triage)

Symptom First 2 measurements Discriminator (what it proves) Isolate (min variable cut) First fix + MPN examples
Battery drains fast AO Iq (µA)
Burst signature (mA, cadence)
High baseline → leakage / stuck-on domain
Cadenced bursts → wake source / scheduling
Force flight mode (no BLE, no LED)
Disable RF, keep sensing
Domain gating + wake hygiene
MPNs: TPS7A02, TPS22916, MAX17262, nRF52832
PPG noisy I_LED pulse + AFE blanking
Raw ADC under still/walk
Noise aligned to RF TX → coupling
Noise even at still → optical/AFE noise floor
Disable BLE TX, fixed LED burst
Use optical dummy to sanity-check
Quiet window + analog return path
MPNs: MAX86141, AFE4404, TPS7A02, TPD1E05U06
Temp jumps Temp vs activity markers
Charge/RF/LED bursts vs spikes
Spikes tied to bursts → self-heating bias
Slow settle → placement/thermal path
Disable RF/LED, temp-only run
Charge vs measure separation
Sensor placement + “no-measure while charge”
MPNs: NCP15XH103F03RC, bq25120A
EDA flatlines Electrode continuity
Input bias/leakage drift
Open/fit issue → contact geometry
Moisture drift → sealing/leakage
Known-impedance injection jig
Disable RF/LED bursts
Leakage control + contact detect path
MPNs: AD5940, TPD1E05U06
Random reboot Reset reason + UVLO flag
VBAT/VSYS/VANA near event
Droop w/ concurrency → power tree / gating
Glitch w/ ESD → clamp/return path
De-concurrency (LED≠RF)
External supply replaces battery
Supervisor + UVLO hysteresis + rail isolation
MPNs: TPS3839, TPS22916, TPS7A02
Won’t charge I_CHG waveform
Dock pin bounce / Rc
Bounce-correlated dropouts → alignment/contact
Thermal/NTC trips → safety loop
Rigid jig alignment
Disable sensing during charge
Dock mechanics + ESD at entry + power-path isolation
MPNs: bq25120A, MCP73831, TPD1E05U06

1) Battery drains fast

  • First 2 measurements: (A) measure AO-domain sleep current at the battery input or PMIC input (target: stable µA baseline); (B) capture the burst signature (mA peaks + cadence) and label each peak (LED / RF / flash write) by timing markers.
  • Discriminator: baseline elevated even in “flight mode” ⇒ leakage (seal moisture, contaminated high-impedance nodes, always-on rail not gated); baseline low but frequent bursts ⇒ wake source (GPIO/interrupt chatter, overly frequent BLE events, duty-cycle bug); bursts cause droop ⇒ rail impedance / gating (domains overlap, inrush too high).
  • Isolate: force no-BLE / no-LED for 10 minutes and verify baseline; then enable sensing-only (no RF) to split “RF vs sensor” contribution.
  • First fix: (1) shrink AO domain (only RTC/retention); (2) hard-gate sensor islands with load switches; (3) prevent LED + RF concurrency by schedule windows; (4) leakage control: clean/coat, keep high-Z nodes inside sealing boundaries.
MPN shortlist (examples)
• Nanopower LDO for AO/retention: TI TPS7A02
• Ultra-low leakage load switch for island gating: TI TPS22916
• Fuel gauge for “is it battery vs firmware?” separation: ADI MAX17262
• BLE SoC energy baseline reference: Nordic nRF52832
Note: MPNs are examples for BOM thinking; verify package/voltage/current vs ring constraints.

2) PPG noisy (still noisy / walking noisy / charging noisy)

  • First 2 measurements: (A) capture I_LED pulse together with the AFE blanking / sample window alignment; (B) record raw ADC codes (or AFE output) for 30 seconds in still and walking.
  • Discriminator: noise spikes time-aligned with RF TX events ⇒ digital-to-analog coupling / ground bounce; noisy even when RF disabled ⇒ optical leakage / ambient cancellation margin / front-end noise floor; noise increases when charging ⇒ charger ripple coupling or dock return path injection.
  • Isolate: disable BLE TX; run fixed LED burst; then (optional) use an optical dummy (known reflectance/遮光块) to separate “optics vs electronics”.
  • First fix: (1) enforce a quiet window for conversions (no RF/flash/charge switching); (2) improve analog return path and keep LED driver loop compact; (3) clamp ESD at the entry points and keep AFE inputs away from ESD current paths.
MPN shortlist (examples)
• Optical AFE w/ integrated LED drivers: ADI/MAXIM MAX86141
• Optical AFE alternative (3 LEDs, 1 PD): TI AFE4404
• Clean AO rail / analog island supply: TI TPS7A02
• Low-cap ESD diode near dock/pins: TI TPD1E05U06

3) Temperature jumps (on-skin bias & self-heating)

  • First 2 measurements: (A) plot temperature vs activity markers (LED burst, RF sync, charge start/stop); (B) verify charge current / burst current around the spike and note time constants (seconds vs minutes).
  • Discriminator: spikes synchronized with bursts ⇒ self-heating coupling (PMIC/charger/LED loop); step response slow and overshoots after wear/remove ⇒ placement & thermal path; humidity-dependent drift ⇒ seal moisture changing thermal boundary + leakage.
  • Isolate: run temp-only mode (no RF, no LED) to baseline the sensor; then run “charge-only” to quantify charger heat injection.
  • First fix: move sensor toward skin contact zone, away from PMIC hot spots; add thermal isolation slot; define “do-not-measure while charging” windows.
MPN shortlist (examples)
• 10k NTC (0402) common for ring thermal sensing: Murata NCP15XH103F03RC
• Wearable charger/PMIC with low-IQ domains: TI bq25120A

4) EDA flatlines (electrode contact, biasing reality, moisture leakage)

  • First 2 measurements: (A) electrode continuity/open-short check (fixture or controlled contact); (B) observe input bias drift / baseline stability over 2–5 minutes (dry vs slightly moist).
  • Discriminator: intermittent open ⇒ fit/contact geometry; baseline rails to a code after humidity exposure ⇒ leakage on high-Z nodes (seal trapped moisture, surface contamination); flatline only during motion ⇒ no-contact detection threshold or electrode polarization swing.
  • Isolate: inject known impedance bins (e.g., 20k/100k/300k) via a simple jig to prove the AFE path; disable RF/LED bursts to remove coupling variables.
  • First fix: enforce guard/keepout around high-Z nodes; re-route ESD return away from electrode inputs; add a hard contact-detect comparator path.
MPN shortlist (examples)
• Impedance / electrochemical AFE often used for skin/body impedance style measurements: ADI AD5940
• ESD clamp near entry (keep AFE inputs out of the discharge path): TI TPD1E05U06

5) Random reboot (brownout, concurrency, ESD, charge transients)

  • First 2 measurements: (A) read reset reason + brownout/UVLO flags; (B) capture VBAT + VSYS/VANA around the reboot (2 rails minimum) and annotate concurrent events (LED/RF/charge).
  • Discriminator: droop during LED+RF overlap ⇒ power tree / domain gating; reset without droop but with sharp spikes on an exposed pin ⇒ ESD/EMC injection; reboot at dock insert/remove ⇒ contact bounce + charger transient.
  • Isolate: force “no concurrency” schedule (LED≠RF); replace battery with a stable bench supply to amplify droop diagnosis; test with rigid dock jig.
  • First fix: add/verify supervisor thresholds and hysteresis; isolate analog rail (separate LDO, short loop); ensure ESD is clamped at the entry with a clean return.
MPN shortlist (examples)
• Nano-power supervisor / reset IC (ignore fast transients): TI TPS3839
• Ultra-low leakage load switch for domain separation: TI TPS22916
• Nanopower LDO for analog island: TI TPS7A02

6) Won’t charge (dock alignment, bounce, safety loop, noise isolation)

  • First 2 measurements: (A) capture I_CHG waveform (does it enter CC? does it drop to zero?); (B) capture dock pin bounce (voltage interruptions or contact resistance swings) while applying controlled micro-movement.
  • Discriminator: I_CHG dropouts correlated with movement ⇒ mechanical alignment/contact; early termination with NTC flags ⇒ thermal/safety loop; charging triggers sensor noise/reboots ⇒ charge ripple coupling + poor power-path isolation.
  • Isolate: rigid alignment jig; disable sensing/radio during charge; verify ESD path at dock pins (no discharge into analog).
  • First fix: improve pogo/magnet alignment tolerance; clamp ESD at pin entry; use a clean power-path strategy so charging does not corrupt analog rails.
MPN shortlist (examples)
• Wearable charge management IC (charger + rails + load switch): TI bq25120A
• Simple linear charger option (space/cost-driven designs): Microchip MCP73831
• Dock/pin ESD protection: TI TPD1E05U06
• Dock NTC (if used): Murata NCP15XH103F03RC

Figure F11 — Ring field decision tree (text-light)

Layout goal: Symptom → Measure A/B → Prove (Contact / Power / Scheduling / EMC) → First fix. Labels are intentionally short for mobile readability (≥18px).

Smart Ring Field Debug — Decision Tree Symptom → Measure A/B → Prove domain → First fix (hardware actions) Symptom First 2 measurements Proves First fix Battery drains fast µA baseline + burst cadence A: AO Iq (µA) B: Burst signature (mA) Scheduling or Leakage Gate domains Fix wake sources PPG noisy RF-coupling vs optics/AFE A: I_LED + window B: Raw ADC still/walk Power/EMC or Optics Quiet window Return path + clamp Temp jumps self-heating vs placement A: Temp vs events B: I_CHG / bursts Thermal coupling Move sensor Separate charge/measure EDA flatlines contact vs leakage A: Electrode continuity B: Bias drift vs time Contact or Leakage Guard high-Z Add contact detect Random reboot droop vs ESD vs dock A: Reset reason/UVLO B: VBAT + VANA glitch Power or EMC Supervisor De-concurrency Won’t charge bounce vs safety loop A: I_CHG waveform B: Dock pin bounce Contact or Safety Dock alignment ESD + power-path Legend: A/B = first two measurements. If evidence is ambiguous, isolate by disabling BLE TX, disabling LED bursts, or using a rigid dock jig.
F11 is designed to be “field-friendly”: minimal text, strong arrows, and short labels to keep mobile readability. Use it as the entry point, then jump to the matching symptom card above for discriminator and first-fix actions.
Cite this figure Suggested caption: “Smart Ring field debug decision tree (symptom → evidence → isolate → fix), Figure F11.”

MPN index (quick BOM anchor)

Function Example MPNs Why it appears in this chapter
Wearable charger/PMIC TI bq25120A Charge reliability, rail stability under bursts, “measure while charging” policy and noise isolation.
Linear charger (space/cost) Microchip MCP73831 Dock charge path baseline; useful as a simplified reference when diagnosing bounce vs safety loop.
Optical PPG AFE ADI/MAXIM MAX86141, TI AFE4404 LED pulse timing, AFE noise floor, ambient cancellation margin; debug signals are measurable in the field.
EDA / impedance AFE ADI AD5940 Electrode interface reality checks, leakage sensitivity, known-impedance bin testing.
BLE SoC (reference) Nordic nRF52832 RF event coupling signature, advertising/connection energy baseline, wake source diagnosis.
Nanopower LDO TI TPS7A02 Clean AO/analog supply, reduced rail noise and improved burst immunity during debug.
Ultra-low leakage load switch TI TPS22916 Domain gating for “isolate variables” and preventing concurrency-induced droop.
ESD protection diode TI TPD1E05U06 Dock/electrode entry-point clamping and keeping discharge current away from AFE inputs.
Supervisor / reset IC TI TPS3839 Proving brownout vs “mystery reset”, filtering fast transients, consistent reset behavior.
Fuel gauge ADI/MAXIM MAX17262 Separating “battery reality” from “firmware scheduling” when drain/reboots occur.
NTC (0402) Murata NCP15XH103F03RC Charge thermal loop and on-skin thermal time constant evidence.

This index is intentionally short: it anchors the debug evidence to concrete parts without drifting into platform/app topics.

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H2-12. FAQs ×12 (evidence-based; ring hardware only)

Rule Every answer starts with two measurements (waveform/flag), uses a discriminator to prove the root class, then gives one “first fix” action. No app tutorials, no cloud, no medical claims.

“Battery drops overnight even when not worn” — baseline current or wake storms?

Cause: Either the always-on (AO) baseline current is too high (leakage / ungated domain) or periodic wake storms keep firing (timers/IRQs/RF events).

Measure A/B: A) AO sleep current (µA) in a forced “flight” mode; B) burst signature (mA peaks + cadence) and whether peaks align with RF/LED/flash writes.

First fix: shrink AO rails and hard-gate islands; eliminate overlapping bursts. (TPS7A02, TPS22916)

Ref: H2-2 / H2-7

“PPG works at rest but fails while walking” — motion artifact or saturation?

Cause: Walking failure is typically motion/contact modulation (artifact) or AFE headroom loss (TIA/ADC saturating under certain reflectance/pressure conditions).

Measure A/B: A) raw ADC codes still vs walking; B) LED pulse timing vs AFE blanking/sample window, plus a quick check if noise spikes align to RF events.

First fix: enforce quiet windows (no RF during sampling) and keep LED/AFE loops compact. (MAX86141, TPD1E05U06)

Ref: H2-3 / H2-6

“PPG clips only on some users” — optical path or gain headroom?

Cause: User-to-user optical variability can push the chain into clipping if LED current range, TIA gain steps, or ADC dynamic range is marginal.

Measure A/B: A) confirm ADC/TIA saturates (codes rail or flat-top) on the failing users; B) compare with LED current setting and ambient-cancel margin under the same time window.

First fix: redesign headroom: wider gain range or better ambient cancellation margin. (AFE4404, TPS7A02)

Ref: H2-3 / H2-1

“Temperature jumps when syncing data” — self-heating from RF bursts?

Cause: RF sync bursts and concurrent compute can inject local self-heating into the ring body, biasing an on-skin sensor with a short thermal path.

Measure A/B: A) align temperature trace to RF event markers; B) capture current profile during sync and check if spikes precede temperature steps by seconds to minutes.

First fix: separate “sync” and “temp sample” windows; move sensor away from hot spots. (nRF52832, bq25120A)

Ref: H2-4 / H2-6

“EDA is flat / always zero” — contact detect or electrode leakage?

Cause: A flat EDA reading is usually no-contact (fit/pressure) or a high-impedance node being pinned by leakage/ESD path interaction, not “algorithm failure.”

Measure A/B: A) electrode continuity / contact-detect flag; B) baseline drift over time (dry vs slightly moist) to reveal leakage or polarization behavior.

First fix: add robust contact-detect and guard high-Z routing in sealed zones. (AD5940, TPD1E05U06)

Ref: H2-5 / H2-9

“EDA drifts after shower/sweat” — sealing moisture or polarization?

Cause: Post-shower drift is commonly trapped moisture lowering surface resistance (leakage) or electrode interface polarization changing the apparent impedance.

Measure A/B: A) baseline/impedance drift vs time after controlled moisture exposure; B) recovery time constant (fast recovery points to contact, slow recovery points to leakage paths).

First fix: tighten sealing zones and keep high-Z nodes away from moisture reservoirs; verify discharge paths. (TPD1E05U06, TPS22916)

Ref: H2-5 / H2-9

“Random reboot during LED pulses” — rail droop or UVLO threshold?

Cause: LED current bursts can induce VBAT droop or cross-domain disturbances that trip UVLO/brownout, especially when RF events overlap.

Measure A/B: A) reset reason + brownout/UVLO flags; B) VBAT and an analog rail (VSYS/VANA) around the event, aligned to LED pulse timing.

First fix: de-concurrency (LED≠RF) and add supervisor hysteresis / rail isolation. (TPS3839, TPS7A02)

Ref: H2-7 / H2-2

“Charging starts then stops” — dock bounce or thermal/NTC trip?

Cause: Stop-start charging is dominated by intermittent dock contact (bounce/resistance swing) or safety loop trips (NTC / thermal foldback / timeout).

Measure A/B: A) charge current waveform (I_CHG: CC entry, dropout cadence); B) dock pin voltage interruptions or contact-resistance changes during controlled micro-movement.

First fix: improve alignment tolerance and debounce the power path; validate NTC placement. (bq25120A, NCP15XH103F03RC)

Ref: H2-8

“Noise increases while charging” — charger ripple coupling into AFE?

Cause: Charger switching/linear ripple can couple into sensitive analog rails, raising the PPG/EDA noise floor, especially if return paths or domain isolation are weak.

Measure A/B: A) correlate AFE output/ADC noise to charger ripple or I_CHG activity; B) repeat with sensing disabled during charge to prove coupling rather than sensor artifact.

First fix: separate charge and measurement windows; isolate analog rail with clean LDO. (bq25120A, TPS7A02)

Ref: H2-8 / H2-3

“BLE range suddenly becomes poor” — antenna detune or ground noise?

Cause: Range collapse is often antenna detuning (body proximity, metal ring geometry change) or elevated ground/rail noise reducing RF margin during TX events.

Measure A/B: A) RSSI/packet retry counters vs orientation; B) check if failures align to high-current bursts (LED/charge) or to specific ESD/humidity events.

First fix: stabilize ground return and isolate noisy domains; protect exposed entry points to prevent damage drift. (nRF52832, TPD1E05U06)

Ref: H2-6 / H2-9

“Device won’t enter deep sleep after updates” — wake source or retention domain?

Cause: “No deep sleep” is proven in hardware as elevated AO current from repeated wake sources (IRQ chatter) or a retention domain that never powers down.

Measure A/B: A) AO Iq in a forced no-RF/no-LED state; B) wake counters (which IRQ is firing) and burst cadence to distinguish periodic timers vs noisy GPIO.

First fix: hard-gate islands and filter wake sources; verify retention rail behavior. (TPS22916, TPS7A02)

Ref: H2-2 / H2-6

“Only some units fail after ESD” — path control or weak protection placement?

Cause: Unit-to-unit ESD sensitivity points to uncontrolled discharge paths (current crosses analog/digital domains) or clamps placed too far from the entry point.

Measure A/B: A) reproduce with consistent ESD hit points (dock pins, electrodes, metal body) and log resets; B) capture which rail glitches first and whether damage drifts after humidity.

First fix: clamp at entry and force return away from AFE inputs; tighten sealing zones. (TPD1E05U06, TPS3839)

Ref: H2-9 / H2-11