What it is & where it fits (Linear sink array in the LED chain)

Definition (extractable): A linear LED current sink array is a multi-channel constant-current (CC) “pull-down” device that regulates each LED string current by sinking it to the return node, enabling tight channel matching, per-channel trimming, and built-in open/short diagnostics.

Where it sits: The sink array typically sits at the low end of each LED string. An upstream rail (often a constant-voltage LED supply) feeds the LED strings; each channel then regulates current by adjusting its internal linear element. The key design boundary is headroom (compliance voltage) and heat (power dissipation in the linear path).

• What it solves: multi-string current regulation, channel-to-channel matching, per-channel brightness trim, and fault visibility (open-string / short conditions).
• What it does not solve: high-efficiency power conversion (switching topologies) or building-control ecosystem details (those are separate topics).
• Success constraint (one line): accuracy comes from linear regulation, but efficiency is limited by voltage headroom; reliability depends on thermal sharing and derating behavior.

Evidence-first mindset: Most “matching problems” seen in the field are actually headroom or thermal problems. If a channel enters dropout/saturation (insufficient Vsink), current collapses first on the highest-Vf string; if a package region overheats, thermal foldback can reduce current unevenly across neighboring channels. These failure modes are distinguishable using Vsink + ILED + temperature (three signals that are quick to capture).

Diagram focus: system placement, evidence nodes (Vsink/ILED/T), and built-in diagnostics blocks.

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When to choose this topology (Decision checklist vs alternatives)

Goal of this chapter: decide “go / no-go” for a sink array using only measurable inputs. The decision is dominated by headroom and thermal budget; matching and diagnostics are the payoffs once the hard constraints are satisfied.

• Best fit: many channels, low-to-mid current per channel, strong uniformity requirements, per-channel trim, and a need to detect open/short conditions.
• Poor fit: tight headroom (supply barely above LED Vf), high current per channel with limited heat sinking, or strict system efficiency KPIs.

The 3 hard gates (go/no-go):

• Gate 1 — Headroom margin: ensure the lowest supply condition still covers worst-case LED Vf (cold / high bin) plus wiring drops and sink dropout. If Vsink collapses, current regulation cannot be maintained.
• Gate 2 — Dissipation budget: worst-case channel power scales with (Vsupply − Vf_total) × ILED. If total heat cannot be removed, thermal foldback will reduce current and break uniformity.
• Gate 3 — Thermal path: confirm a credible heat path (copper area, vias, thermal pad contact, airflow). Without it, “matching drift” will appear after warm-up.

Fast rule of thumb (engineering, not marketing): if the design can guarantee headroom under worst-case Vf and can dissipate the resulting heat without entering thermal foldback, a sink array is often the fastest way to achieve multi-string uniformity with robust fault visibility.

Diagram focus: the 3 hard gates that decide success before matching/diagnostics details.

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Architecture deep dive (Current regulation loop + per-channel trims)

What stabilizes constant current: a sink array closes a local loop that compares a per-channel current-sense signal to a programmable target, then adjusts the linear sink element so ILED converges to the setpoint. This page focuses on the signal path and the practical “knobs” used to reach uniform brightness across many channels.

Setpoint path (what defines ILED): most devices implement a global current reference (IREF / ISET code) that defines the nominal channel current, then apply a per-channel trim (gain/offset trim code) to correct residual mismatch. The trim is intended to remove static channel-to-channel error; it cannot “fix” dropout caused by insufficient headroom (covered in H2-4).

• Global set (ISET / DAC code): controls overall current scale (coarse brightness, system power).
• Per-channel trim (TRIM code): corrects channel mismatch for uniformity (fine alignment).
• Sense + compare: converts ILED to a comparable signal (mirror / internal sense / Rsense method depends on device).
• Error amp + linear pass: moves the channel operating point until sensed current matches target.

Why channels differ: even with the same setpoint, channel currents can spread due to mirror mismatch, sense offset, DAC/trim quantization, and temperature coefficients. In the field, “mismatch” is often exaggerated by thermal gradients or by one channel entering saturation (dropout), so logs should always capture ISET code + TRIM codes + Vsink + temperature.

Diagram focus: what sets current, what trims uniformity, and which error sources to log and verify.

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Headroom & dropout budgeting (Compliance voltage, saturation, dimming margin)

Core concept: a linear sink channel can regulate current only while it has enough headroom (also called compliance margin). When headroom collapses, the channel enters dropout/saturation and the current can no longer track the target. The first visible symptom is usually “one string gets dimmer,” which is often misdiagnosed as channel mismatch.

• Vsink: the sink-node voltage (or equivalent headroom indicator) that shows how much margin the channel has to regulate.
• Vdropout: the minimum headroom required for the channel to hold the set current at the given ILED and temperature.
• Compliance window: the safe operating region where Vsink stays above dropout with margin for tolerances and dimming dynamics.

Budgeting steps (review-ready checklist):

• Start from the worst supply: use VLED_SUP(min) including cold-start dip, brownout, and harness/connector drops.
• Use worst-case LED Vf: take the highest-Vf string at cold temperature and worst bin (plus aging margin if required).
• Add distribution losses: copper/trace drops, connector resistance, and any series elements in the string path.
• Reserve sink dropout: keep Vsink above Vdropout(min) at the target ILED and temperature.
• Leave margin: keep extra headroom for PWM edges, dimming transitions, and temperature drift so regulation never grazes saturation.

What dropout looks like: channels do not fail equally. The string with the highest Vf (or the largest wiring drop) consumes more supply voltage, leaving less Vsink margin. That channel reaches dropout first, its ILED falls, and the system appears to have “poor matching.” Under deep dimming, the margin can be even tighter due to timing windows and transient behavior, making flicker or intermittent faults more likely.

Diagram focus: supply limit, string Vf spread, and how the highest-Vf string loses headroom first and enters dropout.

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Power dissipation & thermal sharing (Why matching fails when hot)

Why heat dominates uniformity: a linear sink array converts headroom into heat. Even if room-temperature matching is excellent, channel currents and brightness can diverge after warm-up because device parameters drift with temperature and protection policies (derating/OTP) can change channel setpoints unevenly.

Per-channel power (channel view): a practical estimate is:

P_CH ≈ V_SINK × I_LED, where V_SINK = V_{LED_SUP} − V_F,string − wiring drop. This highlights the key risk: the channel tied to the lowest-Vf string (or highest supply) can run the hottest because it burns the most headroom at the same current.

• Worst-case dissipation: often occurs at high supply and hot LEDs (Vf decreases with temperature), which increases V_SINK and therefore P_CH.
• Thermal gradients: copper spread, via farms, and the thermal pad path decide whether heat is shared evenly or concentrated into a hotspot.
• Thermal coupling: adjacent channels can “move together” because the local PCB region warms as a group; edge channels may stay cooler due to better heat spreading.

Derating policy and its visual impact:

• Global derating: reduces all channels together, often preserving relative uniformity but sacrificing total brightness due to one hotspot.
• Per-channel derating: protects the hottest channel first and preserves overall output, but can create visible banding or “one string dim” patterns.

Diagram focus: heat is a closed loop (dissipation → temperature → derating → ILED change). Policy choice directly affects visual uniformity.

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Channel matching & uniformity calibration (From % mismatch to visual banding)

What “matching” really means: matching is not a single number. For multi-channel lighting, it typically includes (1) channel-to-channel current spread at steady state, (2) how evenly channels drift with temperature, and (3) how linear each channel remains at low current (deep dimming). Visual banding emerges when errors are spatially correlated and exceed what the optics can diffuse.

• Static spread: compare ILED across channels at a fixed temperature (min/max/σ).
• Drift consistency: re-check after warm-up; uneven drift creates “gets worse when hot” banding.
• Low-current behavior: offset/quantization dominates at deep dimming and can create step-like non-uniformity.

Calibration strategy: a common and robust approach is a factory trim table: measure each channel, compute the correction, and store a per-channel trim code. Runtime self-calibration should be used carefully because it adds feedback dependencies and can interact with thermal derating, supply variation, or protection behavior.

Diagram focus: uniformity is a data loop. Electrical matching plus optical verification produces a trim table that must be re-validated (including hot conditions).

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Open/short detection fundamentals (What you can detect and what you can’t)

Core boundary: most “open/short” features in linear sink arrays are Vsink window decisions (high/low/out-of-window) combined with timed sampling and debounce. Many fault types look similar on Vsink, especially during deep dimming or when headroom is tight, so the output should be treated as a fault class rather than a perfect root-cause label.

Common fault classes and typical Vsink signatures (exact behavior depends on the bias/injection network and wiring):

Detection methods (three building blocks):

• Vsink window comparator: two thresholds define a “normal” band. Out-of-band triggers a candidate fault event.
• Dynamic injection / biasing: a weak pull or pulse makes Vsink predictable during PWM-off or deep dimming so the comparator does not read noise.
• Time-gated sampling: sample only after current settles (t_settle) and away from PWM edges; confirm with N-hit debounce.

Why false trips happen:

• Deep dimming: on-time is too short; Vsink has not settled when sampled → transient out-of-window.
• Insufficient headroom: channel leaves regulation and Vsink collapses toward the low threshold → looks like a short-to-GND.
• Cable transients: plug/EMI/surge events cause momentary excursions → must be filtered by debounce and rate limits.

Diagram focus: “open/short” is a pipeline. Window thresholds alone are not enough; PWM-aware sampling and debounce/latch rules decide stability and false-trip rate.

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Fault response design (Latch, retry, graceful degradation)

Why response policy matters: detection only helps when the post-detect actions are explicit, rate-limited, and observable. A weak policy leads to oscillation (nuisance trips) or silent hazards (fault persists without usable logs).

Response options (choose by risk + user experience):

• Per-channel shutdown: safest localized action; may create visible dark bands or partial black-out.
• Derate and continue: maintains lighting continuity; must be paired with counters and time limits to avoid prolonged overheating.
• Group bypass / graceful degradation: keeps fixture alive with reduced uniformity; must be reported as a degraded state.
• Global shutdown: maximum safety for severe/ambiguous faults; worst user experience.

Retry mechanism:

• Timed retry: simple periodic retry; can cause periodic flicker if faults are persistent.
• Conditional retry: retry only when temperature and supply/headroom return to safe regions; typically more stable.
• Rate limit: retry interval + max attempts; convert to LATCH when exhausted.

Logs and diagnosability: store events as a compact record so the field can reconstruct “what happened” without guesswork. At minimum, include fault code, channel/group ID, first/last timestamp, count, and action taken. INT triggering should align with latch/clear policies to prevent interrupt storms.

Diagram focus: response is a state machine with rate limits. Retries should be gated by temperature and supply/headroom, and every transition must emit a diagnosable log record.

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Dimming methods for sink arrays (PWM gating vs analog vs hybrid)

Scope: dimming behavior is defined by how the sink array modulates ILED(t) and how the system preserves stable sensing (Vsink sampling) and predictable visibility (ripple/flicker). The key trade is not “PWM vs analog”, but settling time vs minimum controllable current vs false-detect risk vs EMI edges.

PWM gating (hard on/off): excellent proportionality because current amplitude stays near the regulated setpoint during the “ON” window. The real risks show up at deep dimming:

• Timing boundary: if Ton is comparable to t_settle, the current and Vsink have not stabilized when sampled → visible instability and false open/short flags.
• Sampling alignment: open/short comparators and ADC reads must avoid PWM edges; sampling must be time-gated inside the steady portion of the ON window.
• EMI edges: fast PWM edges can inject noise into ground/return paths, degrading measurement repeatability and increasing nuisance trips.

Analog dimming (change current setpoint): reduces low-frequency ripple and avoids hard edges, but becomes difficult at very low currents:

• Low-current nonlinearity: quantization steps, mirror bias error, and temperature drift become a larger fraction of ILED.
• Color / uniformity impact: LED chromaticity shifts with current, and channel mismatch is more visible at low levels (banding, tint shift).

Hybrid dimming (recommended in many systems): use analog dimming at mid/high brightness for smoothness and low EMI, then switch to PWM below a defined boundary to avoid the “too-small-current” region. The switch point should include hysteresis to prevent mode chatter.

Diagram focus: sampling must be inside a settled region. PWM deep dimming can violate Ton_min > t_settle + t_sample, raising ripple and false-detect risk. Hybrid uses analog above a safe minimum current and PWM below it.

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Interfaces & telemetry (I²C/SPI, daisy chain, fault pins)

System goal: integrate the sink array as a reliable “actuator + sensor” node. Control must be deterministic (global/group/per-channel), and diagnostics must be actionable (fault bits + counters + timestamps + clear reasons). This chapter focuses on robust MCU integration, not external lighting ecosystems.

Control model (three layers):

• Global: overall current target, enable/disable, derating limits, safe-mode.
• Group: zone-level dimming (panels/regions), synchronized updates, shared policies.
• Per-channel: trim codes, channel enable, fault mask, per-channel state.

Telemetry that actually helps in the field:

• Status/fault registers: present faults vs latched faults (what happened vs what is happening now).
• Event counters: counts per fault class to separate “single transient” from “repeating issue”.
• Optional readings: temperature / Vsink / supply monitors (if exposed), used as discriminators for headroom/thermal boundaries.

Reliability and maintainability:

• Addressing & chain management: predictable device IDs (address straps, enumerations, or chain order) and service-friendly mapping (device_id → zone).
• Bus robustness: retries and safe fallbacks if reads/writes fail; avoid leaving channels in an undefined on-state.
• Power-on safe default: a known safe state before configuration; fault visibility at startup; consistent latch/clear behavior after reset.

Diagram focus: treat the sink array as an actuator + sensor node. Use bus control (global/group/per-CH), INT for immediate attention, and MCU-side logs (timestamps + counters) to turn faults into a debuggable history.

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Validation & field debug playbook (Symptom → evidence → isolate → first fix)

Intent: a minimum-tools SOP that converts “visual symptoms” into two measurements, a hard discriminator, and a first fix. The same evidence format should work on the bench and in the field (service mode).

Minimum tool kit (repeatable)

• 2-channel scope (or 1-channel + DMM): capture Vsink and ILED (or shunt voltage) with a trigger on PWM/EN or FAULT/INT.
• DMM: steady-state checks for VLED_SUP, Vsink, and basic continuity.
• Optional service logging: fault bits + counters + timestamps stored by MCU.

Concrete MPN examples (common, swappable; verify datasheets)

Symptom 1: One channel is dimmer or runs hotter

First 2 measurements:

• Vsink (bad channel vs a known-good channel), captured during a steady “ON” window.
• ILED (or shunt voltage at Rsense) for the same channel pair.

Discriminator (isolate the root cause):

• Headroom / saturation: Vsink collapses toward the device’s compliance/dropout boundary and ILED droops. This often masquerades as “poor matching” but is actually voltage margin.
• Static mismatch / calibration: Vsink stays healthy but ILED is consistently off by a stable percentage. Suspect trim table, dot correction, or channel mapping.
• Thermal derating: ILED decreases over time (warm-up) and correlates with temperature (NTC or temp flag). Neighboring channels may shift if thermal coupling is strong.

First fix (fast → structural):

• Restore margin: raise the LED rail or reduce string voltage (e.g., bin/stack choices) so the worst-case channel has margin. If a separate rail stage exists, validate its transient behavior first.
• Re-balance heat: redistribute “high Vsink” strings across non-adjacent channels; enforce global derating earlier to avoid localized banding.
• Thermal path: increase copper spreading, add thermal vias, improve pad contact. Confirm with a before/after Vsink + ILED capture at steady thermal state.

Symptom 2: Deep dimming flicker or ghosting

First 2 measurements:

• PWM/EN (or dimming control input): capture duty, period, and edge timing.
• ILED(t) (preferred) or Vsink(t): verify settle time and plateau stability within the ON window.

Discriminator:

• Ton too short: ON time is not long enough for settle + sampling → current never reaches a stable plateau; flicker increases and diagnostics may misfire.
• Analog low-current nonlinearity: step-like brightness jumps or non-monotonic behavior while PWM is not the limiter; suspect quantization, mirror bias limits, or poor low-current matching.
• Nuisance fault gating: flicker aligns with FAULT/INT events and counters increase; detection logic is interacting with dimming edges.

First fix:

• Hybrid dimming: analog in mid/high region; PWM below a defined minimum stable current; add hysteresis to avoid mode chatter.
• Sampling window discipline: time-gate any Vsink sampling/comparator decisions away from PWM edges; delay sampling until after settle.
• Edge hygiene: reduce ringing/ground bounce on control lines (series damping resistor near the driver input is a common first step) and re-check ILED ripple.

Symptom 3: Frequent open/short alarms

First 2 measurements:

• Vsink captured with a trigger on FAULT/INT (or on the comparator output if exposed).
• FAULT/INT timing vs PWM/EN edges (same capture if possible).

Discriminator:

• True fault: Vsink stays beyond the open/short window for longer than debounce time; fault persists across dimming levels.
• Deep PWM false alarm: alarms appear only at low duty or near edges; Vsink violates the window only briefly during transitions.
• Headroom edge-case: near-saturation Vsink behavior is misinterpreted as open string; correlate to VLED_SUP and temperature conditions.

First fix:

• Debounce & window tuning: increase debounce time or adjust thresholds to match the real settle dynamics (do not “mask” real faults).
• Event counters + timestamps: log fault_code + counter + t_first/t_last to separate “single transient” from “repeat offender”. Example log storage: FRAM MB85RS64V.
• INT conditioning (optional): clean FAULT/INT edges for reliable capture (e.g., Schmitt buffer class SN74LVC1G17 + minimal RC).

Symptom 4: Power-up overshoot or false protection at startup

First 2 measurements:

• VLED_SUP at power-up (trigger on the rising edge): check overshoot, droop, and settling.
• Vsink or ILED during initialization: confirm whether channels are driven before configuration is stable.

Discriminator:

• Supply transient first: VLED_SUP overshoots/dips before enable; fault occurs with no meaningful PWM activity → rail management is the primary suspect.
• Enable sequencing first: EN/PWM asserts early; ILED spikes before the bus configuration settles → sequencing and default state are the suspect.
• Bus config incomplete: inconsistent behavior across resets; device comes up in a non-safe default output mode → configuration timing and reset policy are the suspect.

First fix:

• Constrain the rail transient: add inrush/overshoot control (eFuse/hot-swap class examples: TPS25947, TPS2660) and validate with VLED_SUP captures.
• Enforce safe default: keep outputs disabled until config completes; apply a supervisor to guarantee sequencing (example families: TPS3839, MCP1316).
• Commit policy: update channel settings only inside a known safe window (avoid edge updates at PWM boundaries); log startup faults to confirm the improvement.

Diagram focus: every field issue should collapse to two measurements, a discriminator, and a first fix. Use timestamps + counters to turn “intermittent” faults into a reproducible story.

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