Gas Ultrasonic & Turbine Flow: Low-Noise AFE and Counters
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Reliable gas ultrasonic or turbine flow measurement is built by turning weak, noisy sensor signals into repeatable timing edges, then proving every number with evidence fields (noise, jitter, overflow, drift, NVM integrity) so failures always point to the first fix.
What this page solves: system boundary and outputs
System boundary (what is included)
This page focuses on the electronics chain that determines measurement trustworthiness: low-noise AFE → clean edges / shaping → time & frequency counters → low-power MCU I/O. The goal is consistent timestamps and stable counting across temperature, EMI, and low-power operation—without relying on “it looks fine on the scope” intuition.
Core idea: if the evidence fields (waveforms, timestamps, counters, logs) are designed up front, drift, missed pulses, and “stable-but-wrong” behavior become diagnosable instead of mysterious.
What a reader should be able to do after this page
- Build a reference architecture that separates analog uncertainty (SNR, saturation, threshold drift) from digital uncertainty (timer drift, missed capture, overflow).
- Instrument a minimum evidence set—the smallest set of signals and log fields that can prove which block caused a failure.
- Select the correct sensing path by measurement model: ultrasonic (amplitude / correlation / phase timing) vs turbine (pulse integrity / period or gate counting).
Minimum Evidence Set (MES): the fields that prevent blind debugging
Design the chain so these fields exist and can be captured during validation and field failures:
- AFE output: in-band noise (RMS), peak level, and a saturation indicator (noise_rms, peak, sat_flag).
- Shaper output: edge rise-time and hysteresis/threshold state (edge_rise, thresh_state).
- Counter/TDC: capture jitter distribution and missed-capture counter (capture_jitter, missed_cap).
- Clock & temperature: timer ppm vs temperature and calibration version (clk_ppm, temp, cal_ver).
- NVM integrity: CRC and last-commit reason (cal_crc, commit_reason).
Practical rule: any symptom (“zero-flow offset”, “near VFD fails”, “low-flow unstable”, “high-flow dropouts”) should be explainable by changes in at least one MES field.
You are here if…
- Ultrasonic gas sensing needs repeatable TOF/phase timing under low SNR, multipath, or transmit leakage.
- Turbine gas metering needs reliable edge capture / counting across bounce, jitter, and wide flow range.
- Symptoms include non-zero at zero flow, low-flow instability, high-flow dropouts, or failures near VFD/motors.
- Power budget demands aggressive sleep while keeping capture trustworthy (wake latency and missed edges must be measurable).
Not covered here (to keep scope clean)
- Mechanical/acoustic installation and pipe-field effects (handled elsewhere).
- Legal metrology/custody-transfer standards (regulatory domain).
- Full communication stacks (protocol details belong to dedicated connectivity pages).
Two measurement models: ultrasonic TOF vs turbine frequency
Why two models matter
Both sensing types share the same electronics stack, but the dominant failure mechanism differs: ultrasonic is timestamp-quality dominated (resolution + stability + consistent pick-off), while turbine is edge-integrity dominated (clean transitions + correct counting primitive). Treating them as one generic “signal to MCU” problem causes stable-looking yet incorrect flow results.
Practical framing: ultrasonic flow is a time-difference measurement system; turbine flow is an event counting system. The best design choices come from selecting the evidence fields that prove each system’s assumption holds.
Ultrasonic TOF model (what to measure first)
- Key signals: transmit burst, echo envelope, a consistent timestamp pick-off (threshold/zero-cross/correlation peak).
- Typical failure modes: weak echo (low SNR), multipath (false peak), Tx leakage saturating Rx, threshold bias shifting with temperature.
- Evidence fields to demand: t_cross, snr_proxy, sat_flag, capture_jitter.
If timing is “repeatable but wrong”, suspect temperature/clock calibration or a biased pick-off point; if timing is “noisy”, suspect SNR, saturation, or unstable shaping.
Turbine frequency model (what breaks counting)
- Key signals: pulse train edges and their spacing; at low flow, period stability; at high flow, overflow/missed edges.
- Typical failure modes: bounce/double-trigger, slow edges near threshold, EMI-induced extra pulses, missed pulses from filtering or sleep transitions.
- Evidence fields to demand: period_capture, missed_pulse_cnt, debounce_reject, overflow_cnt.
The correct counting primitive depends on flow range: period capture tends to win at low flow, while gate counting tends to win at high flow. The evidence fields above indicate which regime is failing.
What must be temperature-compensated (and why stable can still be wrong)
- Ultrasonic: speed-of-sound changes with temperature; ignoring it can shift flow even when timing looks smooth.
- Both models: the time base drifts; timer/oscillator ppm vs temperature can silently bias TOF deltas or period measurements.
- Threshold behavior: comparator/Schmitt thresholds drift; this moves t_cross even if the echo shape stays similar.
Field heuristic: “stable but wrong” often indicates compensation or calibration integrity (clock/temp/NVM), while “noisy and unstable” often indicates SNR, saturation, or shaping.
Front-end noise budget: where SNR is won or lost
Design intent
The front-end should make timing and counting repeatable by turning “noise” into measurable buckets. Ultrasonic timing errors typically appear as timestamp jitter; turbine errors typically appear as false edges or missed pulses. A practical noise budget links each bucket to a component choice and to an evidence field that can prove where the failure started.
Rule of thumb: counters and TDCs do not fail first—the signal quality delivered to their inputs fails first. A noise budget that includes saturation and reference stability prevents “stable-but-wrong” outcomes.
Noise buckets that map to component choices
- Amplifier intrinsic noise (voltage/current noise) sets the floor before any digital processing. It interacts strongly with source impedance and feedback resistance.
- Source impedance behavior (transducer/coil equivalent) can shift the noise optimum across frequency. Treating it as a fixed resistor often underestimates noise in-band.
- Resistor thermal noise rises with resistance and bandwidth. Large feedback or bias resistors can dominate even with a “quiet” amplifier.
- Reference and ground noise turns thresholds into moving targets. Comparator thresholds and ADC references must remain stable at microvolt-level.
- Coupled interference (EMI, switching edges, long cables) adds bursty noise that causes edge double-trigger or missed capture.
Each bucket should have at least one measurable proxy field. Without proxies, debugging becomes trial-and-error swapping parts.
Band-limiting: why “too wide” harms counters
A wider analog bandwidth integrates more noise, increasing threshold crossings and time pick-off variance. For ultrasonic, this inflates t_cross jitter even when echo amplitude looks acceptable. For turbine, it increases false edges and forces heavier debounce, which can then cause missed pulses.
- Too wide: noisy thresholds, extra crossings, unstable edge timing.
- Too narrow: waveform distortion, delayed edges, reduced SNR if the passband cuts signal energy.
- Target outcome: present the counter with a stable transition, not maximum analog detail.
Dynamic range pitfalls: saturation vs quantization
Both extremes break repeatability. Saturation clips echo or pulse peaks and can shift the apparent timing point, while quantization-limited operation makes thresholds ride on noise. The right headroom and gain distribution should keep signals inside a predictable window across temperature and interference.
- Saturation signature: rail hits during burst or echo, abrupt changes in timing, or recovery tails.
- Quantization/noise-floor signature: edge timing varies randomly, low-flow period estimates drift, or zero-flow offsets wander.
Evidence fields to demand (minimum set)
- Noise proxy: scope noise floor vs signal, or a rough input-referred estimate if available (noise_floor).
- In-band RMS noise at AFE output (noise_rms) using the intended analog bandwidth.
- Saturation indicators: rail-hit count or saturation flag during transmit burst / pulse peaks (sat_flag, rail_hit_cnt).
- Baseline/threshold stability: slow drift in baseline or threshold state (baseline_offset, thresh_state).
A symptom should correlate with at least one evidence field: jitter with noise_rms, dropouts with sat_flag or baseline_offset, and false edges with noise_floor.
Analog shaping: filters, envelope/zero-cross, and stable edges
Design intent
Shaping should optimize repeatability, not aesthetics. The objective is to deliver a stable, counter-friendly transition: ultrasonic systems need a consistent timestamp pick-off, while turbine systems need robust edge integrity under noise, bounce, and EMI.
A shaping chain is “good” when evidence fields become stable: edge_rise tightens, capture_jitter shrinks, and missed_pulse_cnt stops climbing under stress tests.
Ultrasonic shaping options (by purpose)
- Band-pass + limiter → comparator: limits out-of-band noise and constrains amplitude so the comparator sees consistent crossings. Evidence focus: sat_flag, edge_rise, capture_jitter.
- Envelope detect for gating + zero-cross timestamp: uses envelope to define a credible window, then uses zero-cross/threshold inside the window to reduce multipath picks. Evidence focus: gating_window, t_cross, snr_proxy.
- Correlation/phase path vs simple threshold: chosen when low SNR or multipath makes threshold pick-off unstable; the key is a confidence metric, not algorithm length. Evidence focus: confidence, capture_jitter.
Turbine shaping options (edge reliability)
- RC + Schmitt + digital debounce: cleans slow/dirty transitions while rejecting bounce; RC must not over-slow the edge near threshold. Evidence focus: edge_rise, debounce_reject, missed_pulse_cnt.
- Hysteresis setting for dirty edges: enough hysteresis reduces false triggers; too much can lose low-amplitude pulses. Evidence focus: thresh_state, missed_pulse_cnt.
- Input protection without edge distortion: protection placement and capacitance can create ringing or slow edges that confuse counters. Evidence focus: false_pulse_cnt, edge_rise.
Go measure (fast verification checklist)
- Before shaping: noise_rms and sat_flag at AFE output under worst-case burst/pulse.
- After shaping: edge_rise and capture_jitter (ultrasonic) or debounce_reject and missed_pulse_cnt (turbine).
- Stress: repeat with temperature sweep and injected interference to confirm evidence fields remain bounded.
If edge_rise widens, first reduce edge distortion (RC/protection placement). If sat_flag rises, first restore headroom before changing algorithms.
Time & frequency counters: choosing the measurement primitive
Design intent
“Counters” should be treated as a menu of measurement primitives. The best primitive depends on SNR, edge integrity, dynamic range, power, and temperature drift. Selecting the wrong primitive often produces results that look stable yet fail under low flow, high flow, EMI, or temperature sweep.
Practical objective: make the chosen primitive provably valid using evidence fields—clock ppm vs temperature, jitter histograms, and missed/overflow rates.
Ultrasonic timing primitives (TOF / phase paths)
- TDC vs timer capture: TDC offers higher nominal resolution but can suffer from linearity and temperature drift; it needs stronger calibration and verification. Timer capture is easier to validate and compensate when clock drift dominates the error budget.
- Dual-channel capture (upstream/downstream): captures both directions using a shared time base; common-mode drift can be reduced if channel skew is measured and controlled.
- Windowed measurement (multipath rejection): defines a credible time window using envelope/energy gating, then performs pick-off inside the window to avoid false peaks.
Resolution is not the same as accuracy: when pick-off is unstable, improving SNR and shaping can reduce capture_jitter more than adding TDC resolution.
Turbine primitives (pulse / frequency paths)
- Period measurement (best at low flow): measures time between edges; avoids the “0 or 1 count” quantization that fixed gates suffer at low rates.
- Frequency count in a fixed gate (best at high flow): counts edges in a known window; efficient for dense pulses, but requires overflow planning and missed-edge detection.
- Reciprocal counting (wide dynamic range): combines edge count and reference time to reduce quantization at low rates while avoiding overflow at high rates.
Wide-range metering usually needs at least two regimes (low-flow vs high-flow) or a reciprocal primitive, otherwise accuracy collapses at one end.
Evidence fields (validation checklist)
- Clock basis: clk_src and clk_ppm(temp) (measured or bounded).
- Timing stability: jitter_histogram for timestamps or periods (not just mean).
- Reliability: missed_cap and overflow_rate under worst-case flow and power states.
If jitter is large, first revisit noise/shaping (noise_rms, edge_rise). If missed/overflow rises, first revisit interrupt/sleep boundaries and counter width.
Clocking & drift: oscillator choice, calibration, and temperature compensation
Design intent
Drift is a silent failure mode in gas metering: results can look stable while slowly biasing with temperature and time. The clock and compensation strategy should make drift measurable, traceable, and correctable using versioned calibration tables and self-test evidence.
Practical objective: a closed loop that turns temperature and calibration tables into clock correction and (for ultrasonic) speed-of-sound correction, verified by self-test logs.
Oscillator choice: what can (and can’t) be calibrated out
- MCU internal RC: higher drift vs temperature/voltage; usable when compensation tables and frequent validation exist. Evidence must include clk_ppm(temp) and self-test error tracking.
- XO: better stability with moderate cost/power; still benefits from temperature mapping and integrity checks.
- TCXO: lowest drift; simplifies the error budget, but still requires verification because “nominal ppm” is not a proof in the field.
Temperature sensing strategy: the compensation coordinate system
Compensation quality depends on whether temperature represents the right physical location. A clock correction table should use a temperature that tracks the oscillator environment, while ultrasonic corrections may also reference the gas/pipe environment depending on architecture.
- On-board sensing: follows PCB/oscillator temperature more closely (good for clock correction).
- External sensing: can represent ambient/gas but may lag the oscillator temperature (requires filtering and lag awareness).
Evidence fields should record temp_src and a bounded temp_lag or filter state, otherwise compensation errors are indistinguishable from sensor placement issues.
NVM schema: calibration must be versioned and integrity-checked
- Versioning: cal_ver, build_id, algo_id to tie data to firmware.
- Integrity: cal_crc and size/field bounds to detect partial writes or corruption.
- Provenance: commit_reason (factory/field/self-test) and timestamp of last update.
- Tables: clk_corr_table and (ultrasonic) sos_corr_table with temperature points.
Without version + CRC, field failures cannot be reproduced: a “drift bug” may be a calibration mismatch or corrupted table.
Field-proof checklist (make drift diagnosable)
- Record clk_src, temp, cal_ver, cal_crc in every diagnostic snapshot.
- Bound drift with selftest_err_ppm and a timestamped last self-test.
- Reject operation when calibration integrity fails (CRC mismatch) or drift exceeds a safe bound.
A stable-looking waveform cannot prove correctness; versioned tables and self-test evidence can.
Low-power MCU I/O: wake/sleep, edge capture, and “always-on” front-end
Design intent
Aggressive sleep saves energy but breaks capture first: wake latency tails, stopped clocks, and sleep transitions can create missed edges or distorted timestamps. A reliable low-power design keeps the capture path valid before the CPU is awake, then processes results in batches.
Practical objective: capture should survive sleep transitions using an always-on front-end, hardware events, and timestamp storage, proven by wake_latency_hist and missed_edge_cnt.
Always-on capture pipeline (what must stay awake)
- Front-end thresholding: comparator / Schmitt input should remain powered and stable to detect real edges without CPU involvement.
- Time base continuity: a low-power timer/RTC or asynchronous counter should remain running in sleep modes to preserve timestamp meaning.
- Event path: edge → event/wake should be hardware-routed to avoid software latency.
- Capture storage: timestamps/edge counts should be written to a FIFO/DMA buffer so wake-up only changes “when processing starts,” not “whether data exists.”
Design boundary: capture must not depend on the CPU being awake. CPU should read buffered captures and clear flags after wake.
Wake on edge: treat wake latency as a distribution
Averages are not sufficient. Missed edges are usually caused by the long-tail of wake latency during deep sleep or clock ramp. Evidence should track the latency distribution and correlate it with capture loss during transitions.
- Wake latency: wake_latency_hist (p50/p95/p99 or histogram).
- Transition losses: missed_edge_sleep_transitions (count only inside defined sleep-enter/exit windows).
- Time-base state: timer_run_mode (which clock domain was active during capture).
DMA / event systems: capture without CPU
Hardware capture should write timestamps or counts directly into a buffer. This reduces dependency on interrupt latency and prevents “CPU asleep” from turning into “data lost.”
- FIFO/DMA overflow: log cap_overflow_cnt and peak cap_fifo_level_max.
- Drop detection: log dma_drop_cnt (or equivalent) if available.
- Atomicity: use a simple producer/consumer boundary: hardware writes, firmware reads after wake, then advances a read index.
If missed_edge_cnt rises while cap_overflow_cnt stays zero, the root cause is usually wake/clock continuity, not buffer capacity.
Ultrasonic vs turbine: sleep strategy differences
- Ultrasonic (burst + echo): gate activity around a measurement window; keep the time base continuous; verify echo-window validity using out_of_window_hit and saturation evidence.
- Turbine (continuous pulses): preserve long-term edge continuity; rely on always-on thresholding and hardware counting; verify using pulse_cnt_sleep and missed_pulse_cnt.
Brownout / UVLO: what it corrupts first
Brownout and UVLO events can silently corrupt time meaning and persistent data. The most dangerous failures are partial commits (incomplete NVM writes) and state variables that are assumed valid after reset.
- Timestamp integrity: clock domain changes and resets can invalidate deltas if not logged (reset_reason, clk_src).
- NVM writes: partial table writes must be rejected using cal_ver + cal_crc + commit_state.
- Measurement snapshots: store a “last-known-good” copy and a commit marker to prevent half-updated diagnostics.
Evidence fields should include uvlo_event_cnt, brownout_reset_cnt, and a persistent last_good_cal_ver.
Robustness: EMI, ESD, surge, and ground loops (what breaks counters first)
Design intent
Timing integrity usually fails before algorithms do. Board-level noise paths can distort edges, shift baselines, or move comparator thresholds with common-mode interference. Robustness is achieved when counter inputs remain stable under EMI/ESD/surge and when failures become visible in evidence fields.
Practical objective: preserve edge_rise and threshold stability under worst-case scenarios, validated by repeatable stress tests.
What breaks counters first (failure paths)
- Protection-induced edge distortion: poorly placed protection networks add capacitance/series impedance and create ringing or slow edges that cause extra crossings. Evidence: edge_rise, false_pulse_cnt.
- Common-mode noise into threshold: comparator reference and input do not move together; threshold becomes a moving target. Evidence: thresh_state, baseline_offset.
- Cable/connector ingress: long leads act as antennas; bursty interference produces sporadic false triggers and missed captures. Evidence: missed_pulse_cnt, jitter_histogram.
Layout priorities that preserve timing integrity
- Analog return: keep return paths short and controlled; avoid mixing noisy switching currents with comparator/TIA references.
- Reference routing: treat comparator reference as a signal; route it away from high dV/dt nodes.
- Guarding: use guard rings around high impedance inputs and sensitive nodes to reduce leakage and pickup.
- Ingress control: place protection close to connectors, but keep the “timing pick-off” node clean and fast.
Validation checklist (stress scenarios)
- Near VFD / motor: verify false_pulse_cnt, missed_pulse_cnt, baseline_offset, thresh_state remain bounded.
- Burst-mode interference (ultrasonic): verify transmit coupling does not create sat_flag, rising rail_hit_cnt, or out_of_window_hit.
- ESD zap: verify no latch-up or persistent baseline shift; track latchup_flag, baseline_offset_step, recovery_time, and reset_cnt.
If evidence fields do not settle after the stress stops, fix protection placement, return paths, and threshold stability before tuning algorithms.
Fault detection & self-test: proving measurement is trustworthy
Design intent
“Looks stable” is not proof. A trustworthy measurement chain exposes evidence fields that reveal signal viability, capture integrity, and physical plausibility. Self-test should classify results as Accept, Degrade, or Fail, then log the minimal evidence needed to diagnose root cause without scope creep.
Practical objective: every “bad reading” must explain itself via fields like confidence, sat_flag, cap_overflow, temp_range_flag, and rolling_offset_est.
Three trust layers: Signal, Capture, Plausibility
- Signal viability: is there a usable echo/pulse with enough margin? Evidence: snr_proxy, echo_window_hits, noise_rms.
- Capture integrity: were edges/timestamps captured without loss or overflow? Evidence: missed_edge_cnt, cap_overflow, wake_latency_hist.
- Plausibility: does the result fit physical bounds for pressure/temperature? Evidence: freq_env_flag, temp_range_flag, pressure_range_flag.
A plausibility failure with clean capture fields usually indicates sensor/cabling/EMI. A capture failure invalidates all results even if plausibility looks fine.
Ultrasonic faults: make echo quality observable
- No-echo: no credible event inside the echo window. Evidence: echo_window_hits=0, out_of_window_hit, rx_blank_time.
- Weak echo: echo exists but confidence is low. Evidence: snr_proxy, confidence, noise_rms_inband.
- Multipath suspicion: multiple competing peaks or unstable pick-off. Evidence: peak_count, peak_ratio, out_of_window_hit.
- Transducer mismatch: abnormal gain/drive needed to pass thresholds. Evidence: rx_gain_state, drive_level, snr_trend.
Confidence metrics should be logged as outputs, not treated as “magic.” If confidence drops, use noise and shaping evidence to decide whether the issue is analog margin or environmental coupling.
Turbine faults: edge truth and envelope checks
- Stuck high/low: no transitions for an abnormal duration. Evidence: level_stuck_time, thresh_state, rail_hit_cnt.
- Bounce / false crossings: extra edges caused by ringing or dirty thresholds. Evidence: false_pulse_cnt, debounce_reject_cnt, min_pw_violation.
- Sporadic dropouts: missing pulses correlated with sleep transitions or EMI. Evidence: missed_pulse_cnt, sleep_transition_miss_cnt, wake_latency_hist.
- Implausible frequency: frequency violates pressure/temperature envelope. Evidence: freq_env_flag, temp_range_flag, pressure_range_flag.
Minimal log outputs (fields that explain failures)
- Confidence and quality: confidence, snr_proxy, noise_rms.
- Integrity flags: sat_flag, cap_overflow, missed_edge_cnt.
- Range guards: temp_range_flag, pressure_range_flag, freq_env_flag.
- Zero-flow drift: rolling_offset_est (slow variable) + offset_temp_bin.
Rolling offset is a trend detector (windowed/filtered), not a single-shot correction. When it grows persistently with good integrity fields, a calibration workflow is justified (H2-10).
Calibration & NVM: what to store, when to update, how to avoid bricking data
Design intent
Field failures often come from silent calibration corruption, partial writes, and overwritten factory constants. A safe NVM strategy partitions data by writer and lifetime, then uses atomic commit with integrity checks so updates cannot brick data.
Practical objective: always be able to answer “which calibration is active and why” using cal_ver, crc_status, commit_state, monotonic_cnt, and last_write_reason.
Partition NVM by lifetime and ownership
- Factory calibration (factory-only): baseline constants, matched sensor parameters, initial compensation tables. Evidence: factory_cal_ver.
- Field trim (service/update): zero offset trims, temperature micro-adjustments, installation deltas. Evidence: field_trim_ver, last_write_reason.
- Runtime stats (limited-rate): rolling offsets, fault counters, self-test summaries. Evidence: stats_epoch, write_rate_guard.
Runtime stats should not overwrite calibration. Calibration writes should be gated by trust state (Accept) and power integrity.
Atomic commit: A/B slot + CRC + monotonic counter
Safe updates require three protections working together: A/B slots prevent partial updates from becoming active, CRC detects silent corruption, and monotonic counters prevent rollbacks or out-of-order selection.
- A/B slot: write into the inactive slot, validate, then switch the active pointer.
- CRC: store crc_status and reject invalid payloads at boot and runtime.
- Monotonic counter: select the highest valid monotonic_cnt to avoid stale data activation.
If brownout_during_commit_cnt increases, tighten write gating and reduce write duration or frequency.
When to update: periodic vs on-demand (avoid wear and bad writes)
- Periodic recal: trigger only when temperature traverses multiple bins or time since last good calibration exceeds a policy limit. Evidence: temp_bin_coverage, last_cal_ts.
- On-demand recal: trigger when persistent drift is proven by self-test and rolling offset evidence under good integrity conditions. Evidence: rolling_offset_est, selftest_state, cap_overflow=0.
Never update calibration when capture integrity is degraded (missed edges/overflows) or when power integrity is uncertain.
Evidence fields (must be queryable)
- Identity: cal_ver, partition_id, last_good_slot.
- Integrity: crc_status, commit_state, monotonic_cnt.
- Provenance: last_write_reason, last_write_ts.
- Power safety: brownout_during_commit_cnt, uvlo_event_cnt.
If integrity fields fail (CRC/commit), self-test should return Fail immediately. Calibration must never be “trusted by default.”
Validation playbook: what to measure on the bench and in the field
How to use this playbook (evidence-driven)
Every test produces: Evidence (waveforms/log fields), Pass/Fail signature, and Fix owner (which chapter to change). This prevents “try random tweaks” and forces each failure to explain itself through the evidence fields.
- Evidence fields must exist first: noise_rms, snr_proxy, confidence, sat_flag, cap_overflow, missed_edge_cnt, wake_latency_hist, temp_range_flag, freq_env_flag.
- Stop rules: if crc_status/commit_state fails → fix H2-10 before testing further. If cap_overflow or missed_edge_cnt is non-zero on bench → fix H2-5/H2-7 before field trials.
Suggested MPNs below are representative building blocks for the electronics chain (AFE/comparator/counters/clock/NVM/protection). Validate availability and pin/package against the target design.
Bench 1 — Noise floor & gain sweep (win SNR before counting)
Goal: prove the in-band noise floor and headroom across gain settings; confirm that SNR rises with input level without early saturation.
Evidence to capture: noise_rms_inband, snr_proxy, sat_flag, rail_hit_cnt, rx_gain_state.
Pass/Fail signature:
- Pass: noise floor follows expected gain scaling; sat_flag=0 at intended operating range; confidence improves with input.
- Fail: noise floor jumps at certain gains; saturation appears early; confidence does not improve with input.
Fix owner: H2-3 (noise buckets) + H2-4 (band-limiting/shaping).
Example MPNs (signal-chain building blocks):
- Low-noise op-amp: TI OPA320, TI OPA828, ADI ADA4625-1
- Fast TIA / wideband amp (if needed): TI OPA857, ADI ADA4817
- Precision resistors (noise + drift control): Vishay VHP / Susumu RG series (application-dependent)
Bench 2 — Timing jitter histogram (repeatability, not averages)
Goal: measure capture repeatability as a distribution (p50/p95/p99), and prove that tails do not grow with sleep/interrupt load.
Evidence to capture: timestamp_jitter_hist, capture_timestamp_var, missed_edge_cnt, cap_overflow, wake_latency_hist.
Pass/Fail signature:
- Pass: histogram remains single-mode and bounded; missed_edge_cnt=0; overflow stays zero.
- Fail: long tails or multi-modal histograms; missed edges appear during sleep transitions; overflow spikes under bursts.
Fix owner: H2-5 (measurement primitives/windowing) + H2-7 (sleep-safe capture).
Example MPNs (timing primitives):
- TDC: TI TDC7200 (time interval), TI TDC7201 (variant family)
- MCU (low-power + capture/event/DMA): ST STM32L432/STM32L452, TI MSP430FR2433, NXP LPC55Sxx (as architecture examples)
- High-speed comparator (clean edges): TI TLV3501, MAXIM MAX9010, ADI/LTC LTC6752
Bench 3 — Temperature sweep (drift curve + compensation proof)
Goal: turn drift into a measurable curve; prove that compensation reduces error within bounds across temperature bins.
Evidence to capture: clk_ppm(temp), selftest_err_ppm, rolling_offset_est, temp_bin, cal_ver, crc_status.
Pass/Fail signature:
- Pass: drift is smooth and predictable; compensation flattens error; NVM integrity remains clean through the sweep.
- Fail: unexplained jumps; compensation ineffective; CRC/commit anomalies; offsets correlate with supply events instead of temperature.
Fix owner: H2-6 (clocking/compensation) + H2-10 (safe NVM schema and commit).
Example MPNs (clock + temperature + NVM):
- TCXO (ppm stability): Epson TG2520SMN family, Abracon ASTX-H11 family (choose frequency/package as required)
- Digital temperature sensor: TI TMP117, Maxim MAX30205, Microchip MCP9808
- FRAM (robust writes): Fujitsu MB85RC256V, Cypress/Infineon FM24CL64B
- EEPROM (simple cal storage): Microchip 24AA02/24LCxx families (size per needs)
Bench 4 — Injected interference (conducted/radiated) tied to counter failures
Goal: prove that EMI/ESD/surge does not silently distort thresholds or create false edges; system must degrade gracefully using flags.
Evidence to capture: false_pulse_cnt, baseline_offset, thresh_state, sat_flag, cap_overflow, reset_reason.
Pass/Fail signature:
- Pass: occasional disturbance flags appear, but the chain returns to baseline; no persistent offset step; counters do not run away.
- Fail: threshold drifts; baseline steps and never returns; repeated false pulses; capture overflow; latch-up/reset storms.
Fix owner: H2-8 (hardening/layout) + H2-9 (fault classification and fail-safe outputs).
Example MPNs (protection + hardening):
- ESD TVS (signal): Nexperia PESD5V0S1UL, ST ESDALC6V1 (choose working voltage/capacitance)
- Surge TVS (power): Littelfuse SMBJ / SMCJ series (select voltage/power per rail)
- Low-noise LDO (quiet analog rails): TI TPS7A02, ADI LT3042, Microchip MCP1700 (tradeoffs apply)
Field 1 — Low-signal boundary: low-flow stability (turbine) / low-SNR echoes (ultrasonic)
Goal: validate the hardest boundary where algorithms cannot save missing evidence; system must maintain stable behavior or downgrade cleanly.
Evidence to capture:
- Ultrasonic: echo_window_hits, snr_proxy, confidence, out_of_window_hit
- Turbine: missed_pulse_cnt, false_pulse_cnt, freq_env_flag, rolling_offset_est
Pass/Fail signature:
- Pass: stable low-signal operation; if confidence drops, output transitions to Degrade with evidence fields explaining why.
- Fail: “zero flow non-zero” grows without corresponding evidence; confidence collapses with no noise/capture explanation; envelope violations spike randomly.
Fix owner: H2-3/H2-4 (margin) + H2-9 (diagnostics) + H2-10 (offset handling and safe updates).
Field 2 — Installation variation at the electronics level (cable/grounding/nearby noise)
Goal: ensure changes like cable length/connector/grounding point do not destabilize thresholds or create counter failure modes.
Evidence to capture: baseline_offset_step, thresh_state, false_pulse_cnt, missed_edge_cnt, vfd_test_tag.
Pass/Fail signature:
- Pass: variation changes noise/baseline slightly but stays bounded; any degradation is visible and reversible.
- Fail: persistent baseline steps; sudden false-pulse bursts; missed edges track grounding/cable changes.
Fix owner: H2-8 (ingress/return/shielding/protection placement) + H2-4 (hysteresis/shaping robustness).
Evidence checklist (quick reference)
Output artifacts (what to save per test)
- Waveforms: input node + shaper output + capture/timestamp markers (where applicable).
- Field snapshots: one log line per run containing: confidence, snr_proxy, sat_flag, cap_overflow, missed_edge_cnt, temp_range_flag, freq_env_flag, plus cal_ver/crc_status/commit_state.
- Decision state: Accept/Degrade/Fail and the first fix owner (chapter mapping).
If a failure cannot be explained by the evidence fields, the playbook requires adding observability before continuing—do not compensate blindly.
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FAQs (Troubleshooting) — evidence-first answers
How these FAQs avoid scope creep
Each answer is constrained to: what to measure, first fix, and chapter/subsystem. If the evidence fields cannot explain the symptom, add observability first (H2-9/H2-11) instead of compensating blindly.
Zero flow still reads non-zero — offset drift or comparator threshold shift?
→ H2-3/H2-4/H2-10
- rolling_offset_est vs temp_bin (trend, not a single sample)
- Comparator thresh_state and baseline_offset step after noise events
- NVM integrity: crc_status, commit_state, cal_ver
- Increase hysteresis / stabilize reference at the shaper; use a low-propagation comparator such as TLV3501 or LTC6752 as a clean-edge baseline.
- If drift is monotonic and temperature-correlated, tighten H2-10 atomic commit (A/B + CRC) so offset tables cannot partially update.
Works in lab, fails near inverter/VFD — AFE saturation or CM noise?
→ H2-8/H2-3/H2-4
- AFE headroom: sat_flag, rail_hit_cnt during disturbance
- False edges: false_pulse_cnt, cap_overflow
- Baseline shift: baseline_offset_step when VFD turns on/off (vfd_test_tag)
- Harden ingress: place low-capacitance ESD diode at the connector (e.g., PESD5V0S1UL or ESDALC6V1) and keep the shaper threshold node short/guarded.
- Reduce bandwidth and add controlled hysteresis so CM bursts cannot toggle edges; confirm the fix by re-running jitter/false pulse counters.
Ultrasonic echo disappears after temperature change — compensation table or gain/AGC?
→ H2-6/H2-3/H2-9
- Echo evidence: echo_window_hits, snr_proxy, confidence
- Gain state: rx_gain_state, plus in-band noise noise_rms_inband
- Compensation validity: temp_bin, cal_ver, crc_status
- If confidence collapses while noise stays normal, prioritize clock/temperature mapping correctness (H2-6). A stable sensor such as TMP117 can reduce temp-bin ambiguity.
- If noise rises with gain, re-tune the AFE noise bucket and band-limit (H2-3) before changing tables.
TOF jitter is huge — clock ppm, shaper hysteresis, or multipath gating?
→ H2-5/H2-6/H2-4
- Distribution, not average: timestamp_jitter_hist (tail/multi-peak)
- Clock drift indicators: clk_ppm(temp), selftest_err_ppm
- Multipath evidence: peak_count, peak_ratio, out_of_window_hit
- If the histogram has long tails, tighten gating/windowing and hysteresis first (H2-4), then re-check tails.
- If resolution/linearity is the limit, evaluate a dedicated TDC (e.g., TDC7200) instead of pure timer-capture.
Turbine pulses miss at high flow — counter overflow or input edge too slow?
→ H2-5/H2-4/H2-7
- Overflow and lost capture: cap_overflow, missed_edge_cnt
- Pulse-width violations: min_pw_violation and edge slope at shaper output
- Sleep interaction: wake_latency_hist vs event rate
- Improve edge conditioning with a fast comparator (e.g., MAX9010 / TLV3501) and ensure hysteresis is sufficient for noisy edges.
- If event rate exceeds ISR capacity, move capture to hardware event/DMA mode (H2-7) or switch to frequency-in-gate counting (H2-5).
Low-flow accuracy is terrible — period measurement vs gate counting choice?
→ H2-5/H2-2
- Low-flow: period-to-period variance (period_var) and missed edges (missed_edge_cnt)
- High-flow: gate-count stability (gate_count_var)
- Use period/reciprocal counting at low flow, and gate-count at high flow; add a hysteretic crossover to avoid mode-chatter (H2-5).
- If clock stability is limiting low-flow period accuracy, consider a TCXO family option (e.g., ASTX-H11 family) before tuning algorithms.
After firmware update, flow shifts slightly — clock calibration or NVM schema change?
→ H2-6/H2-10
- Clock calibration: clk_ppm(temp), selftest_err_ppm
- NVM provenance: cal_ver, monotonic_cnt, last_write_reason
- Integrity: crc_status, commit_state, brownout_during_commit_cnt
- Lock schema compatibility: treat calibration as versioned payload; reject unknown versions and keep last-good slot active (H2-10).
- If updates require frequent writes, move calibration/state to robust memory such as FRAM (MB85RC256V / FM24CL64B) to reduce partial-write risk.
ESD event causes long recovery — latch-up in AFE or MCU capture lock?
→ H2-8/H2-7/H2-9
- After-zap behavior: reset_reason, thresh_state, baseline_offset_step
- Capture recovery: missed_edge_cnt persistence and whether timers are running in low-power mode
- Fault classification: confidence drop with sat_flag/cap_overflow
- Strengthen ESD protection at the connector using a low-cap diode (e.g., ESDALC6V1) and ensure analog rails have fast recovery/decoupling.
- Add a post-ESD re-initialization sequence that re-arms capture hardware and forces a self-test classification (H2-9).
Battery life worse than expected — always-on AFE or wake frequency?
→ H2-7/H2-3/H2-11
- Cycle current profile (bench): sleep, burst, capture, logging segments (current_profile)
- Wake cadence: wake_rate and wake_latency_hist
- AFE bias draw: rail current vs gain state (rx_gain_state)
- Gate the AFE to “measurement windows” and keep only the comparator/event system alive; use a low-IQ LDO for analog domain such as TPS7A02 where applicable.
- Reduce log/write frequency; confirm by rerunning H2-11 bench current profile and wake distribution.
Data looks “stable but wrong” — calibration corruption or wrong sensor fusion (temp/pressure)?
→ H2-10/H2-6/H2-9
- NVM truth: crc_status, commit_state, monotonic_cnt, cal_ver
- Comp inputs: temp_range_flag, pressure_range_flag, and binning consistency (temp_bin)
- Plausibility: freq_env_flag with “stable” signal metrics
- Fail-safe selection: choose last-known-good slot when CRC/commit is questionable; log a hard diagnostic code (H2-10).
- Verify temperature sensing and mapping; a stable sensor like MCP9808 can reduce wrong-bin errors before changing calibration math.
Echo present but timestamp wrong — threshold crossing bias or clock domain crossing?
→ H2-4/H2-5/H2-6
- Bias vs jitter: does error stay constant (bias) or spread (jitter_hist)?
- Threshold sensitivity: timestamp vs hysteresis/threshold settings (thresh_state)
- Clock-domain evidence: capture clock source and correction state (clk_ppm(temp), corr_applied)
- If bias tracks amplitude, stabilize the crossing method (envelope-gated zero-cross vs raw threshold) and use a fast, consistent comparator such as TLV3501.
- If bias changes with temperature, prioritize clock calibration (TCXO family option like TG2520SMN family) before retuning the shaper.
Intermittent dropouts only on long cable — protection placement or input filtering?
→ H2-8/H2-4
- Edge degradation: shaper output rise/fall vs cable length; min_pw_violation
- Protection side effects: added capacitance causes slow edges → missed_edge_cnt
- Noise ingress: false_pulse_cnt and baseline steps
- Move/choose low-cap ESD at the connector (e.g., PESD5V0S1UL) and keep the threshold node local; avoid placing high-cap clamps directly on the timing node.
- Re-tune RC/hysteresis for the new edge rate; validate by re-running missed-edge counters at max cable length.
