TC/RTD Multi-Channel Card (CJC Arrays, 24-Bit ADCs)
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Core idea: A TC/RTD multi-channel card becomes “precision-grade” only when switching/settling, leakage/guarding, and CJC placement are treated as first-class subsystems with measurable evidence fields. With calibrated coefficients and production-ready diagnostics (crosstalk + insulation + audit logs), each channel remains traceable, debuggable, and stable across humidity, wiring changes, and scan-rate updates.
H2-1. What This Card Is For (And What “Good” Looks Like)
A TC/RTD multi-channel card is a metrology-constrained temperature front-end, not merely a “24-bit ADC board”. The engineering challenge is to keep accuracy, channel-to-channel consistency, and scan determinism intact while switching among many high-impedance or excitation-based channels under real-world EMI, humidity, and wiring variability.
Card-level use cases (kept in-scope):
- Test racks & validation fixtures: repeatable ΔT comparisons across many points; emphasis on channel-to-channel delta and diagnostics.
- Chamber monitoring: long wiring, ground loops, and low-frequency disturbances; emphasis on drift, EMC robustness, and stability over time.
- Burn-in / screening: high channel count and sustained logging; emphasis on deterministic scan timing, fault flags, and long-run stability.
- Multi-point thermal mapping: many probes with tight relative accuracy; emphasis on gradient awareness (CJC spread, wiring symmetry, leakage control).
“Good” is defined by measurable success metrics:
- Absolute accuracy: bounded by an error budget (CJC gradient, front-end offset/drift, leakage, ADC noise, RTD excitation/reference terms).
- Channel-to-channel delta: repeatability of per-channel offset and gain; stability of “same input, different channel” comparisons.
- Scan throughput: useful samples per second after accounting for switching and digital filter settling (not the raw conversion rate).
- Time-to-stable after switching: the minimum delay until readings are valid post-MUX/relay change (dominates multi-channel credibility).
- Long-term drift: predictable offset movement with board temperature, humidity, and time; requires logging evidence fields.
- EMC robustness: tolerance to ESD/surge/RF events without permanent offsets, latch-ups, or unexplained step changes.
H2-2. Sensor + Wiring Fundamentals You Must Lock Down (TC vs RTD)
Multi-channel temperature accuracy is determined early by sensor physics and wiring constraints. Thermocouples are tiny differential voltages that amplify leakage and common-mode coupling mistakes. RTDs are excitation-based resistance measurements where self-heating and lead resistance become first-order error terms. The card must treat TC and RTD as different measurement chains, not as a single “config option”.
Thermocouples (TC): minimum physics that drives architecture
- Signal scale: µV–mV. Any parasitic leakage or injected charge can map directly to temperature error.
- High-impedance sensitivity: humidity, flux residue, connector contamination, and PCB surface leakage can dominate low-level stability.
- CJC dependency: TC measures “hot junction minus cold junction”. CJC sensors and their thermal placement are part of the measurement, not accessories.
- Linearization requirement: TC voltage-to-temperature is nonlinear; a defined linearization standard/version (e.g., ITS-90 polynomial set) prevents silent mismatches.
RTDs: minimum physics that drives architecture
- Resistance chain: performance depends on excitation current stability, reference resistor quality (if ratiometric), and wiring symmetry.
- Excitation tradeoff: higher current reduces noise impact but increases self-heating. Self-heating varies with mounting, airflow, and thermal contact.
- Lead resistance: 2-wire embeds lead resistance as error; 3-wire assumes matched leads; 4-wire provides the most predictable cancellation at the cost of wiring.
- Fault detectability: open/short and intermittent contact resistance require deliberate test timing and thresholds to avoid false alarms.
Wiring modes and what they imply for a multi-channel card
- RTD 2/3/4-wire: determines terminal density, scan strategy, and whether per-channel calibration must include lead mismatch terms.
- TC extension wire & connectors: mixed metals and thermal gradients at connectors can generate additional thermoelectric voltages.
- Long cables and ground loops: coupling paths increase; filtering and guarding strategy must anticipate common-mode movement and EMI pickup.
H2-3. Cold-Junction Compensation Architecture (CJC Arrays Done Right)
Cold-junction compensation in a multi-channel thermocouple card is a thermal subsystem, not a single sensor. Because thermocouples measure a temperature difference, cold-junction error maps 1:1 into the reported temperature. The goal is to make the connector/terminal region behave like a controlled isothermal zone, then use a CJC array to prove whether that zone is valid under airflow and load changes.
Isothermal strategy: make the terminal region a stable thermal reference
- Placement: mount CJC sensors as close as practical to the terminal/connector metal and the copper heat-spreader region, not near heat sources.
- Copper pour & thermal mass: use a dedicated copper “isothermal plate” to average local gradients and slow down transient disturbances.
- Thermal isolation boundary: separate the terminal zone from hot components (ADC, DC/DC, isolators) using spacing and cut/slit features when needed.
- Airflow sensitivity: treat airflow as a test condition—step changes in fan speed or ducting can create CJC drift and spread.
CJC array: multiple sensors are for gradient detection and confidence
Multiple CJC sensors are not primarily for averaging noise; they are for verifying whether the cold junction environment is sufficiently uniform. A single sensor cannot demonstrate that the terminal region is isothermal.
- Spread as evidence: track CJC min/max spread to detect gradients that invalidate absolute temperature claims.
- Weighted aggregation: prefer sensors thermally bonded to the copper isothermal region; treat “air-exposed” sensors as disturbance indicators.
- Outlier logic: detect sensor decoupling or localized cooling by identifying persistent deviation from neighboring CJC nodes.
Dominant error sources and the symptoms they create
- Terminal gradients: different channels show systematic offset vs terminal position; CJC spread correlates with channel-to-channel delta.
- Connector thermal EMFs: mixed metals and local temperature differences generate additional thermo-voltages; offsets may appear after rework or reseating.
- Transient airflow: temperature readings drift or step during fan/door events; CJC response shows a clear first-order time behavior.
Evidence fields to log (minimum set)
Quantifies isothermal validity; large spread implies reduced confidence in absolute temperature.
Fast screening for invalid time windows; enables “degraded mode” labeling in logs.
Detects airflow/thermal disturbances and distinguishes drift from electrical noise.
H2-4. Multi-Channel Front-End Topology (MUX vs Per-Channel AFE)
The front-end topology is a decision about valid samples per channel, not raw conversion speed. In multi-channel scanning, switching introduces charge injection, memory effects, and filter settling that can dominate the effective resolution. Topology selection should start from three constraints: channel count, required per-channel update rate, and allowable settle window after each switch event.
Architecture choices and what they buy
- Per-channel PGA/ADC (dedicated): minimizes switching artifacts, improves isolation, and simplifies channel-to-channel consistency—at higher cost and power.
- Shared PGA/ADC + MUX/scanner: reduces BOM and area, but requires disciplined switching, settling, and sample-discard policies to remain credible at high impedance.
Switching fundamentals that dominate multi-channel credibility
- Break-before-make: prevents direct channel shorting and reduces memory coupling, especially with different source impedances.
- Charge injection and input capacitance: creates transient offsets that decay with the analog time constant; high-Z TC sources are the most sensitive.
- Source impedance sensitivity: identical switching hardware behaves differently when one channel is long-cable TC and the next is low-Z reference or RTD node.
- Digital filter settling: ΔΣ ADC sinc filters require stable input; switching forces either longer delays or discarding early samples.
Relay vs analog switch: the practical trade space
- Reed/mechanical relay: extremely low leakage and strong isolation (good for TC high-Z), but introduces thermo-EMF and has speed/lifetime limits.
- Analog switch: fast and compact, but leakage and injection can dominate low-level TC stability; careful guarding and timing become mandatory.
Rule set: when to dedicate “hot channels” vs scanning
- Dedicate the most accuracy-critical or most sensitive channels (very low-level TC, long cables, harsh EMI) to minimize switching artifacts.
- Scan slow-varying and tolerant channels where longer settle/discard budgets are acceptable.
- Control scan order: avoid placing large-step or low-impedance channels immediately before high-Z TC channels; sequence design reduces ghosting.
- Validate with evidence: step one channel and quantify the first-valid-sample error on adjacent channels to measure real crosstalk/settling impact.
H2-5. Multi-PGA Front-End Design (Noise, Drift, Bias, and Protection)
The multi-PGA analog front-end is the limiting factor for mK-level stability because it directly sets input-referred noise, low-frequency drift, and leakage sensitivity. In scanned multi-channel systems, front-end design must be evaluated together with switching behavior and settling budgets, otherwise “high resolution” collapses into correlated errors that resemble drift or channel coupling.
PGA selection criteria: what actually matters at µV and Ω
- Input bias current: dominates thermocouple accuracy because bias/leakage across high impedance creates an input-referred offset.
- Offset drift: sets long-term stability; drift with board temperature can masquerade as real temperature movement.
- 1/f noise: limits low-frequency averaging; slow wave-like motion at steady temperature is often 1/f dominated, not ADC-limited.
- Chopper artifacts: chopper ripple and transient behavior can interact with RC networks and scanned switching, producing periodic patterns.
Input filtering: anti-alias/EMI vs settle-time budget
- RC placement: the location of series-R and shunt-C changes how switching injection and cable pickup couple into the amplifier input.
- Anti-alias vs settling: larger time constants reduce HF pickup but extend the time before readings become valid after switching.
- Scanned systems: a filter is only acceptable if the valid window remains large enough after analog and digital settling.
Input protection that does not leak
- Leakage awareness: protection devices can add temperature-dependent leakage that is invisible in DC lab tests but dominates field stability.
- Series impedance strategy: series resistors shape surge energy and ESD current, but also affect noise, source impedance, and settling.
- Clamp path discipline: where the clamp returns (analog ground vs rails) determines common-mode injection and recovery behavior.
Thermocouple-specific: impedance and leakage dominate at µV signals
- High impedance reality: humidity, flux residue, and connector contamination can create surface leakage that becomes an input-referred offset.
- Symptom patterns: offsets that track humidity or cleaning/rework events often indicate leakage or protection network drift.
- Acceptance evidence: shorted-input offset and noise should remain stable across temperature and humidity classes.
H2-6. 24-bit ADC + Digital Filtering (Resolution vs Reality)
“24-bit” is an internal numeric format, not a guarantee of system-level performance. In scanned multi-channel cards, the limiting behavior is typically switching step response and digital filter settling, not quantization. Real performance is defined by the noise-free output achieved within the available valid time window per channel.
Delta-sigma basics (only what impacts design)
- OSR (oversampling ratio): higher OSR reduces in-band noise but increases conversion latency and reduces throughput.
- sinc filters: common decimation filters that provide strong notches but have long settling tails after input steps.
- 50/60 Hz notch: useful for mains interference, but it increases group delay and extends time-to-valid in scanned operation.
- Latency matters: group delay determines the earliest sample that can be treated as stable after switching.
Switching + sinc settling: why early samples are not valid
- Channel switching creates a step: injection and RC memory create transient offsets that the digital filter “remembers”.
- sinc tail response: early output samples contain contributions from the previous channel, appearing as ghosting or drift-like bias.
- Discard policy: define and log how many post-switch samples are discarded before a valid sample is accepted.
Mapping performance: throughput → noise-free bits → effective temperature resolution
- Raw output rate is reduced by settling and discard; valid rate is what determines real per-channel updates.
- Noise-free behavior should be evaluated as RMS code noise within the valid window, not as a headline “bits” number.
- Temperature resolution is computed from input-referred noise and sensor sensitivity (TC type or RTD excitation/reference chain).
Evidence fields to log (minimum set)
Separates random noise from correlated errors; rising RMS indicates interference or incomplete settling.
Captures 50/60 Hz rejection mode; required to interpret latency and settling behavior.
Defines when a sample can be considered stable after switching.
Defines the first-valid-sample index; the core control knob in scanned systems.
H2-7. Guarding, Leakage, and Crosstalk Control (PCB + Layout Playbook)
In high-impedance temperature inputs, the limiting factors are often leakage and coupling, not ADC resolution. A credible multi-channel card needs a layout playbook that controls electric fields around sensitive nodes, prevents humidity-driven surface leakage, and makes crosstalk mechanisms measurable with repeatable tests.
Driven guards: where guarding helps vs hurts
- Where it helps: TC/PGA inputs, high-impedance RC nodes, MUX-side sensitive nets, and connector-adjacent traces where surface leakage dominates.
- Guard must be quiet: a driven guard that carries switching noise or ripple can capacitively inject interference directly into the input node.
- Parasitic trade: excessive guard coverage can add capacitance, slowing settling and aggravating scanned “memory” artifacts.
- Boundary rule: keep guard return and drive references consistent with the sensitive node’s reference domain to avoid creating coupling loops.
Leakage paths: how humidity, residues, and connectors become offsets
- Flux residue & contamination: ionic residues create humidity-dependent surface conduction that looks like temperature drift.
- Connector contamination: dust, oils, and plating wear can form leakage and contact-EMF behaviors that change after handling or rework.
- Conformal coat trade: coating can suppress moisture films, but poor material choice or aging can create stable leakage paths and complicate rework.
Crosstalk mechanisms (three-path model)
- Capacitive coupling: adjacent traces/layers and long parallel routes transfer switching edges and step responses between channels.
- Ground-impedance coupling: shared return currents and reference drops create correlated errors across channels during digital activity.
- Cable coupling: external harness grouping and routing can couple channels even if the PCB is clean; terminal zone shielding matters.
Layout rules (card-level, actionable)
- Spacing & routing: maximize spacing of high-impedance nets, minimize parallel runs, and keep sensitive nodes short and compact.
- Analog islands: keep sensitive analog regions isolated from high di/dt paths; define a clear return path and avoid ground loops.
- Star points (card-level): use a disciplined card-level reference tie to prevent shared impedance coupling through long returns.
- Shield strategy: shield where it reduces coupling without forming capacitive injection paths into the highest impedance nodes.
Verification tests that expose real weaknesses
Reveals contamination and moisture films; tracks leakage-driven drift.
Artificially adds a controlled leakage path to validate guard effectiveness and tolerance margins.
Quantifies capacitive + reference coupling; measures first-valid-sample error after a step event.
H2-8. RTD Excitation, Ratiometric Measurement, and Lead-Error Cancellation
RTD performance becomes predictable when excitation, reference strategy, and lead-wire assumptions are made explicit. The design goal is to maintain stable accuracy across wiring modes (2/3/4-wire), cable length, and ambient changes while controlling self-heating and providing reliable open/short diagnostics without false alarms.
Excitation strategies: constant-current vs ratiometric
- Constant-current excitation: simple mapping from resistance to voltage, but performance depends on current stability and drift.
- Ratiometric measurement: uses a precision reference resistor so shared excitation/measurement drift terms cancel in the ratio.
- Reference placement: reference resistor thermal gradients and routing asymmetry can reintroduce error if not treated as a first-class element.
3-wire cancellation: what it assumes and what it cannot cancel
- Assumption: two lead resistances are equal and track each other with temperature.
- Mismatches: unequal lead resistance, connector contact variation, and temperature gradients create a residual term.
- Field evidence: swapping leads or harnesses that changes the offset indicates mismatch-dominated error rather than sensor drift.
Self-heating: model and control
- Power: P = I²·R creates sensor heating; the temperature rise depends on the probe’s thermal resistance to its environment.
- Duty-cycling: short excitation windows reduce average heating while preserving measurement SNR in the sampling interval.
- Stability lens: the “best” excitation current is the one that meets noise requirements without creating a drift-like self-heating signature.
Open/short detection without false alarms
- Diagnostic currents: use small or time-gated diagnostic stimulus to detect opens/shorts without perturbing normal readings.
- Threshold timing: evaluate diagnostics only after analog + digital settling to avoid triggering on post-switch artifacts.
- Evidence fields: capture fault duration, repetition count, and whether it occurs immediately after switching.
H2-9. Thermocouple Linearization + Burnout/Open Detection
A thermocouple channel is only “temperature-ready” after three layers are enforced: ITS-90 linearization, cold-junction compensation validity, and open/burnout detection with controlled false positives. Robust implementation treats linearization and diagnostics as configuration assets with explicit versioning and evidence fields.
ITS-90 / polynomial linearization: what to implement vs what to store
- Implementation options: segmented polynomial evaluation or table + interpolation; choose based on compute budget and deterministic behavior.
- Configuration assets: TC type selection, linearization method, coefficient/table version, and input scaling (µV/LSB) must be explicit.
- CJC binding: the TC temperature output must carry CJC validity; if CJC is invalid, the result must be flagged or degraded.
Burnout / open detection: biasing method and its measurement impact
- Bias injection: a weak pull-up/pull-down defines an open-circuit state, but it also introduces an offset mechanism and noise coupling path.
- Noise and offset impact: bias networks have their own leakage/temperature behavior; in µV regimes, these effects can dominate.
- Long-cable false positives: cable capacitance and EMI pickup can create transient threshold crossings, especially near channel switching events.
- False-alarm control: use settle-aware timing gates, multi-sample confirmation, and a confidence score rather than a single hard bit.
Connector and material thermoelectric pitfalls (action-focused)
- Mixed materials: unintended junctions (Cu/Ni, dissimilar metals) create real thermo-EMFs that appear as temperature offsets.
- Terminal gradients: airflow and uneven copper mass can form gradients across terminals, corrupting CJC and TC readings.
- Practical control: keep terminal regions isothermal, maintain material consistency, and minimize handling/contamination effects.
Evidence fields to log (robust channel semantics)
Open/burnout indication computed with settle-aware gating and confirmation rules.
Confidence score derived from persistence, magnitude, and repetition; helps separate true opens from transient EMI.
Marks whether CJC inputs are usable; required for interpreting the TC temperature output.
Optional but powerful: indicates whether detection occurred immediately after switching (false-positive risk zone).
H2-10. Calibration, Error Budget, and Traceability (What to Calibrate, How Often)
Calibration is a controlled workflow that turns error sources into a predictable budget and converts results into traceable assets. The objective is not “lab theory,” but an actionable card-level procedure: define the error budget, choose per-card vs per-channel calibration depth, enable field verification, and store all results with enough context to reproduce performance and drift history.
Error budget structure (channel + correlated terms)
- Channel terms: offset, gain, noise, drift, and configuration-dependent latency/settling artifacts.
- TC-specific terms: CJC gradient and CJC validity; burnout bias-induced offsets.
- RTD-specific terms: lead-wire mismatch (3-wire residuals), excitation/reference drift, self-heating effects.
- Environment/layout terms: leakage (humidity/residue), crosstalk coupling, and shared reference impedance.
Calibration types: per-card vs per-channel, 2-point vs multi-point
- Per-card: calibrate shared elements (reference, shared conversion chain) to establish global stability.
- Per-channel: compensate channel deltas caused by switching paths, routing, leakage sensitivity, and small gain/offset differences.
- 2-point: correct offset + gain; the default for scalable deployment.
- Multi-point / temperature-dependent: use when residual nonlinearity or temperature-driven behavior dominates the error budget.
Field recal / verification: keep drift visible without lab rework
- Known references: use stable references to verify slope/offset drift trends rather than performing full recalibration on every cycle.
- Relay loopback: switch inputs to an internal known state to detect front-end drift and leakage changes (requires low-EMF, low-leak loopback design).
- Golden channel: reserve a protected reference channel to monitor long-term drift and isolate correlated errors.
What to store (traceability assets)
Per TC type / RTD wiring mode, including PGA range, notch/OSR settings, and scaling used during calibration.
Enough metadata to reproduce results and compare drift across firmware/procedure changes.
Record uncertainty assumptions and the decision threshold used for acceptance.
Residual offset/gain, RMS noise, and any flags (CJC spread, leakage indicators, discard count) at the time of pass.
H2-11. Diagnostics, Production Test, and Field Debug Evidence
At scale, the card must be auditable: every major failure mode needs a deterministic test path, clear pass/fail criteria, and minimal evidence fields that explain why a channel is trusted or flagged. The goal is fast isolation of wiring faults, leakage/crosstalk regressions, and configuration/settling mistakes without relying on subjective interpretation.
Built-in self-test (BIST): fault modes and measurable criteria
Inject a small diagnostic stimulus and confirm the input node cannot rise above a threshold after settle. Record duration + repetition count.
Enable excitation window and verify return voltage/current is within limits; flag if abnormally high or stuck near rails.
Use weak bias / time-gated detection and compute a confidence score. Evaluate only after post-switch settle to prevent false alarms.
Sample Rref path independently (or via loopback) and compare to baseline + temperature compensation window; flag drift/out-of-family.
Crosstalk characterization test: step one channel, watch neighbors
- Stimulus: apply a deterministic step on CH-A (known input or loopback reference) with fixed PGA/OSR/notch configuration.
- Observe: capture CH-A settle curve and CH-B/C/D responses over the same scan window.
- Key metrics: neighbor first-valid-sample error, tail length (time/frames to recover), normalized coupling coefficient.
- Pass criteria: defined per range and scan rate; store the configuration snapshot used for the test.
Guard/leakage verification: catching humidity and contamination regressions
- GΩ insulation test: measure equivalent insulation between sensitive nodes and guard/ground under controlled test voltage; log temperature/humidity context.
- Humidity screening (spot or batch): short input → track offset drift vs RH; detect “leakage slope” and recovery time constant.
- Leakage injection check: introduce a controlled leakage path (test fixture or onboard network) to confirm guard policy provides margin.
Minimal logging schema (small but sufficient)
Logging should be minimal, structured, and configuration-aware. The following keys are enough to make most field issues diagnosable:
{
"scan": {
"scan_rate_sps": 200,
"settle_discard_n": 2,
"settle_residual_uV_rms": 1.8,
"outlier_count": 1,
"config_hash": "PGAx16_OSR1024_notch50"
},
"cjc": {
"cjc_valid": true,
"cjc_min_C": 24.10,
"cjc_max_C": 24.34,
"cjc_spread_C": 0.24
},
"ch": [
{"id": 1, "mode": "TC-K", "value_C": 73.2, "noise_uV_rms": 2.1, "burnout_flag": false, "open_conf": 0.02},
{"id": 2, "mode": "RTD-3W", "value_C": 72.9, "rref_ok": true, "short_exc_flag": false}
],
"fault_counters": {"open": 0, "short_gnd": 0, "short_exc": 0, "burnout": 0}
}
Example MPNs for scalable diagnostics and test paths examples
The part numbers below are commonly used building blocks for implementing BIST, loopback, crosstalk tests, insulation measurements, and robust logging. Final selection depends on input range, leakage budget, and scan rate.
| Subsystem | Purpose in H2-11 | MPN examples | Notes (why it fits) |
|---|---|---|---|
| Low-leakage analog switch / MUX | BIST routing, loopback paths, neighbor-step test switching | ADG1208, ADG1219, ADG5408F | Low leakage families; fault-protected variants help survive miswires during production. |
| Reed relay (low thermal EMF switching) | Precision loopback / reference routing without adding large leakage | HE3621A0510 (Hamlin/Littelfuse), SIP-1A05 (Coto) | Reed relays can reduce leakage and charge injection; select for low EMF and life. |
| Electrometer / ultralow bias amplifier | GΩ insulation measurement front-end (leakage verification) | ADA4530-1 | Designed for femtoamp-class bias currents; useful for high impedance/leakage instrumentation. |
| Precision reference resistor (Rref) | Ratiometric RTD validation and reference path check | Vishay VHP series (foil), Susumu RR series (precision thin-film) | Choose low TCR and low long-term drift; placement must minimize thermal gradients. |
| 24-bit delta-sigma ADC (multi-channel) | Production test repeatability; logs include OSR/notch/latency context | AD7124-8, ADS124S08 | Integrated features simplify deterministic conversions; verify switching/settling behavior per scan rate. |
| Isolator (digital) | Robust field logging/communications isolation (audit trail integrity) | ADuM141E, ISO7741 | Helps separate noisy domains; improves diagnostic signal integrity in harsh environments. |
| MCU for logging + counters | Minimal logging schema, fault counters, config snapshots | STM32G431, STM32F303 | Enough compute for deterministic scan orchestration + evidence recording; choose per I/O needs. |
| ESD / surge protection (inputs) | Reduce production/field handling damage; supports stable diagnostics | SM712 (RS-485 style TVS), SMBJ series TVS | Pick for leakage and clamping behavior appropriate to µV-level measurement paths. |
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H2-12. FAQs (Troubleshooting, Evidence-First)
Each answer follows a fixed format: 1-sentence conclusion + 2 evidence checks + 1 first fix, and points back to the relevant chapters.
TC readings drift when humidity rises—leakage path or CJC gradient? Maps to: H2-3 / H2-7
Conclusion: Humidity-driven TC drift is most often caused by leakage and contamination changing input bias conditions, not true sensor change.
Evidence #1: Compare shorted-input baseline drift vs RH (or insulation/GΩ metric) and look for a monotonic offset shift correlated with humidity.
Evidence #2: Check CJC spread (min/max) and gradient flags; if CJC spread stays flat while TC shifts, the primary culprit is leakage.
First fix: Improve guarding/cleanliness (remove flux residue, restore guard continuity) and re-run a humidity drift screen to confirm margin.
Adjacent channels “shadow” each other after switching—MUX charge injection or filter settling? Maps to: H2-4 / H2-6
Conclusion: Channel shadowing is usually a settling artifact amplified by digital sinc filtering after switching, with MUX injection as the trigger.
Evidence #1: Inspect post-switch frames (discard count, residual error) and confirm the error decays over a predictable number of conversions.
Evidence #2: Run a neighbor step test (CH-A step, watch CH-B/C) and quantify tail length; long tails indicate filter-memory settling dominance.
First fix: Increase settle budget (discard N samples or slow scan rate) and reduce injection (break-before-make, source impedance control).
24-bit ADC but effective noise is worse—ground coupling or OSR/notch setup? Maps to: H2-6 / H2-7
Conclusion: “24-bit” rarely means noise-free; poor OSR/notch configuration and ground/impedance coupling often dominate observed RMS codes.
Evidence #1: Log ADC codes RMS with a fixed shorted input and compare across OSR/notch modes; if RMS changes strongly with configuration, filtering is the lever.
Evidence #2: Correlate noise increases with neighbor activity or scan rate; sensitivity to other channels indicates coupling (ground impedance or capacitive paths).
First fix: Choose OSR/notch for the target bandwidth (e.g., 50/60 Hz rejection) and tighten return paths/guarding to reduce coupling.
RTD reads high after wiring change—3-wire mismatch or excitation self-heating? Maps to: H2-8
Conclusion: A post-wiring-change RTD high reading is most commonly 3-wire mismatch or a lead compensation assumption violated, not sudden sensor physics.
Evidence #1: Compare readings between 3-wire and 4-wire (or swap lead pairs) and compute residual mismatch; a stable offset points to lead imbalance.
Evidence #2: Check excitation current and duty cycle; if temperature rises with longer on-time or higher current, self-heating is the contributor.
First fix: Reduce excitation duty/current and re-validate 3-wire assumptions (matched lead resistance, consistent routing) or migrate to 4-wire where needed.
Deep negative TC spikes on relay switching—thermo-EMF at contacts or RC placement? Maps to: H2-4 / H2-5
Conclusion: Large negative spikes during relay events usually come from switching transients and contact-related thermo-EMF interacting with input RC and bias paths.
Evidence #1: Compare spikes with relay actuation timing and post-switch sample index; if the spike lands in early frames, it is a settle/RC interaction.
Evidence #2: Repeat the test with a low-EMF relay option or a static short input; if spikes reduce without sensor changes, contact EMF is implicated.
First fix: Move/retune RC to control settling at the ADC input and use a low-thermal-EMF relay/switch path for TC channels.
CJC looks stable but absolute temperature is off—sensor placement or connector gradients? Maps to: H2-3
Conclusion: Stable CJC readings can still be wrong if sensors are not isothermal with the terminal junction, or if connector gradients create hidden offsets.
Evidence #1: Log CJC min/max spread across the array and compare to airflow/handling changes; gradients may be small but persistent near terminals.
Evidence #2: Measure a known reference junction condition and compare with expected TC output; consistent bias indicates placement/gradient rather than noise.
First fix: Move CJC sensing closer to the terminal thermal mass and increase isothermal copper/thermal coupling while reducing airflow sensitivity.
Burnout detect triggers randomly—bias network too strong or cable capacitance? Maps to: H2-9 / H2-5
Conclusion: Random burnout flags usually indicate a bias network interacting with long-cable capacitance and post-switch settling, not a true open circuit.
Evidence #1: Compare burnout events to switching timing and look for clustering immediately after channel changes or scan-rate increases.
Evidence #2: Temporarily reduce bias strength or add a controlled discharge path and observe whether the open-confidence score collapses.
First fix: Gate burnout evaluation until after settling and tune bias for minimal measurement impact while keeping open detection margin.
One channel is noisier than all others—guard ring discontinuity or contamination? Maps to: H2-7
Conclusion: A single noisy channel is often a localized leakage/guarding issue (breaks, residue, contamination) rather than global ADC performance.
Evidence #1: Run a high-impedance leakage test (or humidity spot test) on that channel versus neighbors; large deltas indicate leakage dominance.
Evidence #2: Inspect neighbor-step response and ground coupling; if only one channel is affected independent of neighbor activity, focus on guard continuity/residue.
First fix: Rework cleaning and restore guard ring continuity/shielding for that channel, then re-verify with the same scan configuration.
RTD open/short detection misses intermittent faults—thresholding or test current timing? Maps to: H2-8 / H2-11
Conclusion: Intermittent RTD faults are typically missed due to timing (test current window) and overly static thresholds, not because the sensor “looks fine.”
Evidence #1: Correlate fault occurrence with scan schedule; if missed faults align with short excitation windows, the diagnostic is sampling at the wrong time.
Evidence #2: Add a counter for near-threshold events and log the distribution; intermittent contacts often show a growing tail before hard faults.
First fix: Move detection into a controlled timing gate and use multi-hit confirmation with counters rather than a single-frame threshold.
Calibration passes at room temp but fails hot—drift model or reference resistor tempco? Maps to: H2-10
Conclusion: Temperature failures after room-pass calibration usually indicate unmodeled drift (PGA/ADC/reference) or Rref temperature behavior outside assumptions.
Evidence #1: Compare hot vs room residuals and identify whether error scales like gain or offset; scaling points to reference/PGA drift rather than random noise.
Evidence #2: Log Rref check metrics and CJC spread at temperature; correlated shifts suggest reference temperature coefficient or gradient exposure.
First fix: Add temperature-dependent calibration points (or tighten reference selection/placement) and store coefficients with temperature context and uncertainty.
Scan rate increase breaks accuracy—settling budget or digital filter latency? Maps to: H2-6 / H2-4
Conclusion: Higher scan rate typically breaks accuracy because the settling budget shrinks below what the MUX + sinc filter requires, not because the sensor changed.
Evidence #1: Track settle residual and discard count versus scan rate; if residual grows and stabilizes at a higher floor, settling is insufficient.
Evidence #2: Confirm latency/OSR changes; if the digital filter pipeline length increases relative to per-channel time, effective “memory” leaks between channels.
First fix: Reduce scan rate or increase discard/settle windows, and re-balance OSR/notch settings to preserve noise-free resolution at the new throughput.
ESD event causes new offset—input protection leakage or damaged front-end bias path? Maps to: H2-5 / H2-7
Conclusion: A post-ESD offset shift most often comes from increased leakage in protection devices or subtle damage that alters bias currents in the front-end.
Evidence #1: Compare channel offset with shorted input before/after ESD and run a GΩ insulation/leakage check; leakage-driven offsets usually persist.
Evidence #2: Check whether the offset is range-dependent (PGA setting) and whether neighbor activity modulates it; bias-path damage often shows configuration sensitivity.
First fix: Inspect/replace suspect protection components on the affected channel and re-verify guarding/cleanliness to restore leakage margin.
