Power Security / Authenticator ICs for Battery, Adapter, and Accessory Protection
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Why power authentication matters
Counterfeit batteries and unauthorized adapters increase risks of overheating, field failures, warranty disputes, and recalls. A power-side authenticator blocks unauthorized power-ups and enforces channel control.
Typical incidents include packs with under-spec protection FETs, low-grade cells, or unsafe adapters bypassing power limits—leading to thermal events and costly returns. By verifying identity before enabling the power path, OEMs reduce unsafe usage, confine after-sales boundaries, and meet traceability expectations in regulated markets.
Key benefits: anti-cloning service boundary grey-market control traceability.
Still unsure which power authenticator fits your pack or adapter? Submit your BOM for a 48h cross-brand recommendation (see Resources).
Architecture — placement, signals, and permission strategies
Placement (where)
- Battery pack (cell-pack PCB) — Auth IC resides on the pack; host verifies identity over One-Wire or I²C before enabling charge/discharge path.
- Adapter / E-Marker — Adapter-side auth gates allowed voltage/current; PD policy runs separately.
- Replaceable accessory — Module-level auth prevents unauthorized hot-swap from powering sensitive rails.
Signals & behaviour (how)
- EN — Hardware enable goes high only after successful challenge–response (no software bypass).
- PG (Power-Good) — Mirrors permitted state to the host/PMIC for sequencing and logging.
- ALERT / FAULT — Flags failed auth, replay, timeout, or tamper events.
- PROCHOT / LIMIT — Applies power cap or throttling when partial authorization is allowed.
Permission strategies
- Full disconnect — safest; block charge/discharge or source path until identity verified.
- Limited current / trickle — allow minimal current for maintenance/safe handling.
- Power cap (maintenance) — cap voltage/current; enable only essential low-power functions.
Working Principle — symmetric / asymmetric / PUF & anti-replay
The host issues a nonce, the authenticator computes a response (symmetric HMAC-SHA-256 or asymmetric ECC signature, optionally derived from PUF), the host verifies, and only then the power path is enabled.
Symmetric (HMAC-SHA-256)
Lower device cost and latency; works well over One-Wire / I²C. Demands strict key provisioning and custody. Use per-unit counters and unique IDs to reduce cloning risk.
Asymmetric (ECC)
Private key on device; host verifies with public key—scales easily to large fleets and is harder to clone. Compute time is higher; preserve session integrity during brownout.
PUF (Physically Unclonable Function)
Derives device-unique secrets from silicon variability, shrinking the key-injection attack surface. Requires reconstruction helper data and environment drift compensation.
Anti-Replay
Use unpredictable nonces, rolling counters, time windows, retry limits and fault-injection checks (bad MAC/signature timing). Log failed attempts for traceability.
Design Rules — key provisioning, bus choice, hardening & enable gating
Treat provisioning, buses, physical protections and enable gating as a single system. Tie authentication to hardware EN so software alone cannot bypass the decision.
Key provisioning & custody
- Use an isolated, whitelisted programming station; log operator, station, and timestamp.
- Bind unique SN / lot / counter per unit; maintain an auditable whitelist database.
- Partition secrets and access: production vs. service vs. RMA; define re-write limits and scrap rules.
- Plan key rotation / revocation playbooks for leakage, rework or recall scenarios.
Interface choice — One-Wire vs I²C
- One-Wire: minimal wiring, ideal for battery packs; control line length and EMI; size pull-ups conservatively.
- I²C: higher throughput and bus sharing; check address conflicts, pull-up strength, long-trace capacitance and hot-swap behavior.
Physical design
- Harden against probing: conformal coating / resin, shield cans, tamper switches.
- Isolate from high-voltage paths; ensure robust ESD / surge protection and return routing.
- Keep sensitive nets away from switching nodes; control ground references with clear star points.
Power permission (enable gating)
- Assert EN only when auth is OK; otherwise block or degrade power.
- Define fail modes: full disconnect, limited current / trickle, or maintenance power cap.
- Use PG/ALERT/PROCHOT to reflect state and throttle when partial authorization is allowed.
Bring-up checklist: verify challenge→response loop first, then wire EN; inject bad MAC/signature, replay and timeout to confirm every failure branch is safe and logged.
Validation & Debug — capture, fault injection, production records
Validate the nonce, response and window, then force failures to verify safe behavior. Keep production logs to make the system auditable and traceable.
Bus capture (One-Wire / I²C)
- Use a logic analyzer with One-Wire/I²C decoding; scope edges for timing margins.
- Check nonce length, rolling counter, response length (MAC/signature) and round-trip latency.
- Confirm ACK retries and timeout thresholds per bus speed and trace length.
- Baseline script: power-up → send nonce → receive response → verify → assert EN.
Fault injection
- Bad key: wrong MAC/signature; Replay: old nonce + non-incremented counter.
- Brownout/interrupt: break the session mid-exchange; jitter: bit errors.
- Observe: EN must not assert; raise ALERT/FAULT; keep PG inhibited.
- Rate-limit retries and set a cool-down; log failure type, timestamp, counter and action.
Production line (traceability)
- Serialize: bind unique SN / lot / counter; maintain a whitelisted database.
- Record: programming station/operator/timestamp, image version, key partitions, rewrite limits.
- Sampling & re-verification SOP; secure export of audit logs.
- Emergency: key revocation/rotation, blacklist update, degraded power policy and recall criteria.
Applications — battery pack, adapter/dock, replaceable modules
Three common placements that tie authentication to power permission (enable, disconnect or limited power).
Battery pack (tools, portable medical, replaceable consumer)
- One-Wire preferred (minimal wiring); co-located with Fuel Gauge—mind grounds and routing.
- Harden against probing: coating/shield; validate hot-plug transients and ESD.
- Permission: Auth OK → enable charge/discharge; FAIL → disconnect or maintenance current.
- Line: bind SN + counter; verify counter increments on field replacement.
Adapter / dock (auth → power allowance)
- Authenticator on adapter side; upon success, allow target voltage/current limits.
- Decouple from PD policy: PD negotiates profile, auth decides “whether/how much”.
- EMC: long I²C runs—pull-ups, capacitance and surge/lighting protection at the front end.
- Failure: cap power or refuse to enable; log reason for service analysis.
Replaceable modules (fan, sensor, audio front-end)
- Module-side auth; ensure session integrity during hot-swap bounce.
- PG/ALERT feed back to host for throttling and logging.
- Permission: OK → power sub-rails/bias (e.g., mic array bias); FAIL → cut or cap.
- Maintenance: sync SN and counters with asset records after replacement.
Tip: keep copy short and actionable; link to sibling pages only by name (no deep technical overlap).
IC Selection — interface, algorithms, secure resources & standards
Shortlist parts by these factors: Interface (One-Wire / I²C / SMBus) Algorithms (HMAC-SHA-256 / ECC / PUF) Secure memory & monotonic counters Enable-gating hooks (EN/PG/ALERT) AEC-Q100 & package/cost.
Texas Instruments (TI)
- BQ26100 — SDQ single-wire battery authentication (HMAC-SHA-1) for packs and accessories.
- BQ26150 — battery pack security/authentication with CRC-based challenge–response.
- TMP1827 — 1-Wire temperature sensor with 2Kb EEPROM and HMAC-SHA-256 authentication (sensor+auth combo).
STMicroelectronics
- STSAFE-A110 — secure element for consumable/accessory authentication (ECC/SHA-256).
- STSAFE-A120 — next-gen A-series secure element for local host authentication and data services.
- STSAFE-L series — cost-optimized authentication for peripherals and accessories.
NXP
- EdgeLock SE050 — plug-and-trust secure element for authentication and credential storage.
Renesas
- ISL6296A — FlexiHash battery authentication IC with challenge–response and ID/OTP storage.
onsemi
- N24S64B — I²C EEPROM with block-level protects (for serial/whitelist data; not an authenticator).
- Integration tip — combine with a secure element (e.g., ATECC608A) and gate EN via PMIC/eFuse.
Microchip
- ATSHA204A — low-cost SHA-256 authenticator (single-wire/I²C variants).
- ATECC608A — ECC P-256 authenticator with secure storage and counters for anti-replay.
Melexis
- Integration tip — use an external authenticator (e.g., ECC/PUF SE) to permit power for Melexis-based modules (sensors/actuators) via EN/PG.
Notes: validate counter behavior, latency budget (One-Wire vs I²C), and EN/PG/ALERT wiring before locking BOM; check AEC-Q100 and temperature grades for automotive.
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FAQs
One-Wire vs I²C for battery pack authentication?
One-Wire minimizes wiring and suits pack PCBs; it trades bandwidth for simplicity. I²C scales to multi-device busses and faster sessions but needs careful pull-ups, address planning and capacitance control. For long leads or noisy paths, budget tighter nonce/timeout windows and add retries.
SHA-256 vs ECC — security level and production impact?
SHA-256/HMAC offers low device cost and fast responses but demands strict key custody. ECC puts the private key on the device and uses a host public key, easing fleet-scale verification and resisting cloning at the cost of longer compute times and stricter session handling.
Can PUF replace key injection?
PUF derives per-device secrets from silicon variation, shrinking the injection attack surface. It still needs helper data, stabilization across temperature/aging, and secure enrollment. Evaluate reconstruction latency and error-correction fit for your bus speed and boot window.
How do I prevent replay and EN bypass?
Use unpredictable nonces, monotonic counters and narrow time windows. Tie the auth result to a hardware EN path (not just firmware) and expose PG/ALERT to the host. Rate-limit retries and log failures for forensics.
What is a safe degraded-power policy after failed auth?
Prefer full disconnect for traction rails. If service access is required, use trickle current or a strict power cap with time limits. Ensure PROCHOT/LIMIT communicates throttling to the host and that maintenance modes cannot enable hazardous loads.
How do I keep production writes and whitelists auditable?
Bind unique serial/lot/counter per unit, record station/operator/timestamp, and store signed logs. Enforce rewrite limits and maintain black/white lists. Sample devices each lot to re-verify challenge-response and counter increments.
How to preserve session integrity across brownouts?
Define transaction boundaries: send nonce only after power-good, verify within a bounded window, and reset state on brownout interrupts. Keep retries idempotent and record partial sessions to prevent accidental EN assertion.
Do I need AEC-Q100?
Require it for automotive modules and harsh environments; otherwise, industrial/consumer grades may suffice. Match temperature grade, ESD level and diagnostic coverage to your hazard analysis and safety goals.
Merge authenticator with fuel gauge or keep separate?
Co-location reduces wiring but couples lifecycles and RMA paths. Separate devices improve serviceability and let you upgrade security independently. In either case, treat grounds/routing carefully to avoid switching noise corrupting bus timing.
How to decouple USB-C PD policy from authentication?
Let PD negotiate profiles while the authenticator decides “if/upper limits.” Gate allowed voltage/current after successful auth; on failure, cap or block the power path. Keep logs unified even if state machines are separate.
Does conformal coating or tamper switches hurt serviceability?
They raise attack cost but complicate repair. Document access points, provide seals that can be replaced, and ensure tamper events latch ALERT without bricking legitimate service operations.
How to migrate keys/scripts across brands for small batches?
Create an abstraction layer for bus/commands and store identities in a normalized format. For ECC, keep host public-key verification stable while swapping device SKUs. Update provisioning scripts and re-issue whitelists with versioned logs.
How do I integrate MCU crypto accelerators?
Use MCU SHA/ECC engines for host-side verification to reduce latency. Isolate secrets, verify responses in constant-time code, and dedicate IRQs for ALERT/PROCHOT to avoid timing drift on busy systems.
How do aging and temperature drift affect timing?
Longer compute at cold corners and added bus retries can stretch windows. Budget extra time for ECC devices, test counters across temperature, and keep watchdog limits aligned with worst-case latency.
Field repair: what if a genuine pack is rejected?
Provide a secure override path: verify serial and counters against the whitelist, then issue a signed one-time unlock token with audit logging. Never bypass EN hardware paths; use a maintenance cap with strict timeouts.
