← Back to Low Dropout Regulators (LDOs)
1) Introduction & Background
In modern power designs, output capacitor (COUT) and its ESR window are part of the loop compensation, not an afterthought. Many LDOs, buck converters, and automotive rails are specified as “stable with ceramic”, but the datasheet assumes a minimum COUT and a certain ESR or zero to keep phase margin.
The problem engineers hit in real builds is simple: they replace an electrolytic or higher-ESR part with a very low-ESR MLCC and suddenly the regulator shows oscillation, startup overshoot, or poor transient behavior. This page explains why that happens and how to pick a COUT that keeps the regulator stable across input, load, and temperature.
Search intent covered here: users asking for “minimum output capacitor for LDO/buck”, “ESR requirement for LDO”, “can I use ceramic cap”, and “why my regulator is unstable with ceramic”. Later sections can extend to feed-forward caps (CFF) and validation playbooks.
2) Minimum COUT and how to select it
A regulator is usually compensated for a range of output capacitance, not for “anything you solder on”. When you go below the minimum, the loop loses its intended pole–zero placement and you get ringing or outright oscillation. When you go far above the maximum, startup and transient can slow down or trigger protection.
To pick a working COUT for buck, boost, or LDO:
- Start from the datasheet “Output capacitor / Stability” table. Many LDOs explicitly say “stable with 1 µF / 2.2 µF / 10 µF ceramic”.
- Apply real-world derating: MLCCs lose capacitance with DC bias, temperature, and aging. A “10 µF” X5R can be 4–6 µF in-circuit.
- Check whether the device needs a bit of ESR to place a zero. If yes, using only ultra-low-ESR MLCCs may require a feed-forward cap or a small series resistor.
- Match COUT to the transient shape: LED, MCU wake-up, or camera load will dictate the minimum energy you must store at the output.
Different topologies react differently: buck converters mostly use COUT to control output ripple and to help the loop; boost converters need it to hold the voltage during load steps; LDOs can be the most picky, since their internal error amp expects a certain COUT+ESR combination.
COUT / ESR-aware parts from the 7 key vendors
Below is a vendor-neutral view. Always confirm the exact COUT/ESR window in the latest datasheet before replacing cross-brand.
TI
Typical: “stable with 2.2 µF or 4.7 µF ceramic”, some parts give ESR < 200 mΩ.
Use for: battery/buck post-LDO rails.
ST
Many automotive LDOs list COUT = 4.7…47 µF with MLCC allowed.
Watch low-temp MLCC derating.
NXP
Often used in body/cluster modules; datasheets are explicit on stability range.
Check CAN/MCU rails.
Renesas
Automotive-grade LDOs give COUT window + temp range.
Good for AEC-Q100 flows.
onsemi
Some legacy parts still require an ESR window; read the stability note.
Use when replacing older BOMs.
Microchip
Industrial/embedded LDOs often list “ceramic OK” if COUT ≥ 1 µF.
Check for MCU + RF rails.
Melexis
Often tied to sensors/lighting, pays attention to harness length and EMI.
Verify COUT for lamp/LED bias.
3) ESR Role & Its Impact on Stability
For many LDOs and internally compensated buck converters, the output capacitor ESR is not just a parasitic value. It can create a helpful zero in the loop, improving phase margin. If ESR becomes too low (typical when replacing electrolytics with multiple small MLCCs), this zero disappears or moves, and the regulator can show ringing or even oscillation.
On the other hand, if ESR is too high, output ripple increases and transient recovery gets worse. That is why many datasheets specify an ESR window (e.g. 10 mΩ–200 mΩ) together with the capacitor value. The ESR window is part of the stability design.
Practical rule: if you cross-replace a part from TI/ST to onsemi/Microchip/older Renesas and see “ESR ≥ xx mΩ” in the new datasheet, follow it. If you must go ceramic-only, plan to add a small series R or a feed-forward capacitor in the feedback path (covered in later sections).
4) Ceramic Capacitors: Stability & How to Choose
Ceramic capacitors (MLCC) are attractive because they are small, low-loss, automotive-grade, and have very low ESR. However, very low ESR is exactly what breaks stability for some regulators. On top of that, MLCCs lose capacitance under DC bias and at high temperature. So “10 µF ceramic” on the BOM may be only 4–6 µF in real operation — which can drop you below the regulator’s minimum COUT.
That is why many “stable with ceramic” LDOs still write a minimum COUT and sometimes even “use X7R / X8R, rated higher than VOUT, place close to device”. The chip can work with ceramics, but only if you keep the effective capacitance and ESL within the tested window.
Selection shortcut for this page: use X7R/X8R, 2× the required voltage rating, and place as close as possible. If the regulator still shows peaking, enable the part’s feed-forward option or add a small R in series with the output cap to bring ESR back into the stable band defined in the datasheet.
Different vendors specify ceramic stability differently. TI / ST often say “stable with 1–10 µF ceramic”; NXP / Renesas add bias notes; onsemi / Microchip may keep an ESR range for legacy parts; Melexis ties it to sensor/lighting harness. When cross-branding, always re-check the COUT + ESR paragraph.
5) Feed-Forward Capacitor (CFF): Application & Benefits
When an LDO or DC-DC converter uses very low-ESR ceramic output capacitors, the loop can become slower or slightly under-damped. A small feed-forward capacitor (CFF) from VOUT to the FB node gives the error amplifier a faster path.
Typical use: ceramic-only output, long harness / high temperature, or fast digital loads. CFF is a low-cost PCB fix.
Design flow: start from datasheet CFF → measure worst-case load step → tune ×0.5…×2 → lock BOM with note “CFF mandatory with ceramic COUT”.
6) LDO ICs from 7 Key Vendors (COUT / ESR Sensitive)
Use this block to map application → brand → COUT / ESR requirement → safe replacement when doing automotive or lighting LDOs.
Texas Instruments (TI)
Ceramic-stable LDOs.
- TPS7A16-Q1 — 10 µF X5R/X7R, AEC-Q100.
- TPS7A02 — 1 µF ceramic OK, ultra-low Iq.
- TPS7A88-Q1 — dual rails, 10 µF each, CFF ok.
STMicroelectronics
Automotive & low-noise LDOs.
- L99VR03 — 4.7–10 µF ceramic.
- LDLN025 — 1–2.2 µF ceramic.
- LDK130 (auto) — 4.7 µF min.
NXP
In SBC / PMIC, ceramic defined.
- VR5510 LDOs — 4.7 µF.
- S08D/E LDOs — 4.7–22 µF, X7R.
- Gateway/SBC LDO — follow table.
Renesas
Datasheet says “ceramic OK if …”.
- ISL78307 — 10 µF ceramic.
- ISL78310 — 10 µF ceramic.
- ISL78301 — fixed, 10 µF.
onsemi
1 µF/1 µF designs.
- NCV8163 — 1 µF/1 µF, 250 mA.
- NCP163/161 — check stability graph.
- NCV1117 — needs some ESR.
Microchip
Very clear cap tables.
- MCP1700 — 1 µF, ESR 0–2 Ω.
- MCP1792/93 — 55 V, ceramic.
- MCP1703A — 1–2.2 µF.
Melexis
LIN / lighting / sensor.
- MLX80050 — local 5 V LDO.
- MLX81117 — lighting driver, follow COUT.
- MLX90395 path — keep sensor COUT.
Frequently Asked Questions on Stability & Output Capacitors
How do I choose the right output capacitor value for an LDO or DC-DC?
Start from the regulator’s stability section, not from ripple equations. Many parts require 1–10 µF ceramic, some automotive parts need a fixed 10 µF X7R. Then check DC-bias loss and temperature so that your effective COUT is still above the minimum.
Is using a larger capacitor always safer for stability?
Not always. Extra-large COUT can slow start-up, create bigger inrush, and push the loop outside the range the vendor tested. Large values are fine if the datasheet says “no upper limit,” otherwise increase in small steps and re-measure load transients.
What if the datasheet just says “ceramic stable” but gives no exact value?
Use the capacitor value shown in the typical application circuit, then derate it for DC bias (often 30–60%). If the circuit shows 4.7 µF, place 2× 4.7 µF 25 V X7R in parallel or one 10 µF X7R to guarantee you stay above the true minimum.
Do I need to re-verify stability if I swap electrolytics to MLCCs?
Yes. Replacing electrolytics with MLCCs pulls ESR down and removes the zero some regulators rely on. Run a load-step test and a cold-start test. If you see ringing, add a small series R to COUT or use a feed-forward capacitor.
Is lower ESR always better for power-supply stability?
No. Many internally compensated regulators expect a small ESR window (for example 10–200 mΩ) to place a zero. If ESR is too low, damping is lost and the output can oscillate. Always compare your capacitor’s ESR at the switching/loop frequency to the datasheet range.
What happens if my capacitor ESR is below the minimum requirement?
You may see small periodic ripples, audible or visible oscillation, or very slow settling after a load step. A cure is to add a few tens of milliohms in series with COUT, or enable the device’s feed-forward option to restore phase margin.
Can I parallel several MLCCs to get more capacitance?
You can, but parallel MLCCs make ESR even lower and may break the original ESR window. If you need multiple MLCCs, place them close to the IC and, if ringing appears, add one capacitor with a small series resistor to re-introduce damping.
How do layout and ESL affect a “ceramic-stable” regulator?
Long traces or vias add ESL that shifts the capacitor’s effective impedance. Even if the part is “ceramic stable,” place the capacitor right at the OUT/GND pins. Extra ESL can look like low ESR to the loop and cause peaking.
Why does a 10 µF ceramic not behave like 10 µF on the board?
MLCCs lose capacitance with DC bias, temperature, and package size. A 10 µF 0805 at 5 V can drop to 4–6 µF. Always look at the capacitance-vs-bias curve and leave at least 2× margin over the datasheet’s stated minimum COUT.
Are X5R and X7R both OK for high-frequency or automotive use?
For high-temperature or under-hood locations, X7R or X8R is safer because the capacitance stays more stable. X5R may be used only if you oversize the value. In any case, pick a voltage rating higher than the rail to reduce DC-bias loss.
What is the impact of using only ceramic capacitors in high-frequency converters?
All-ceramic outputs reduce ripple and improve EMI, but they also remove the ESR zero the loop designer counted on. If the converter was not explicitly tested for zero-ESR capacitors, add a feed-forward capacitor or a small RC damping branch.
Can a feed-forward capacitor improve transient response?
Yes. A 10–100 nF capacitor from Vout to the FB node speeds up the feedback path, especially when COUT is low-ESR ceramic. Start with the vendor’s recommended value and test at worst-case VIN and temperature before freezing the design.
When should I avoid using a feed-forward capacitor?
Avoid it when the FB trace is long or noisy, when the regulator already uses external compensation, or when the output carries switching ripple from another rail. In those cases, CFF might inject noise into FB. Try a small series R with COUT instead.
Do I need to re-test COUT/ESR when I switch to another vendor’s LDO?
Yes. TI, ST, NXP, Renesas, onsemi, Microchip, and Melexis do not define “ceramic-stable” in the exact same way. Always repeat load-transient, cold-start, and VIN dip tests and store the results in the BOM note for future replacements.
What is a quick on-board way to confirm the output is stable?
Apply a fast load step (for example 50 mA → 300 mA) close to the regulator, scope Vout with enough bandwidth, and repeat at hot and cold. Look for smooth settling within a few switching cycles and no sustained oscillation. If in doubt, submit your BOM (48h).
