← Back to Low Dropout Regulators (LDOs)
1) Introduction & Problem Patterns
Some LDO-based rails do not power up into an empty load. In real boards, the output node is often pre-charged by another source, a test fixture, or a previous run. If the LDO sinks that pre-biased voltage at start-up, the whole system may reset or a camera/display will flicker.
This section defines when an LDO must start gently: do not pull down existing voltage, make the rise predictable, and provide a clean PG/RESET to sequence the next rail.
Pre-charged / shared bias
Another on-board 3.3 V rail already feeds sensors or analog; LDO must not drag it to 0.
Fixture / camera powered first
Camera/MCU test jig is powered before the LDO starts; LDO must accept an existing Vout.
Warm / hot restart
Board did not fully discharge; second start must be pre-bias safe and still produce PG.
This page is limited to LDO start-up and pre-bias behavior. Noise, PSRR, LED bias thermal drift, and multi-rail master sequencing are covered in sibling LDO pages.
2) LDO Start-Up / Soft-Start Basics
Unlike most buck converters, many LDOs do not expose a dedicated SS pin. Their start-up profile is defined internally and only shown as a start-up waveform in the datasheet. For boards that must start into a partially charged load, you must review that waveform first.
Automotive and industrial LDO families often implement a current-limited or gain-limited soft-start. This slows the rise, reduces inrush, and makes VIN sources happier, but it also increases start-up time and must be coordinated with PG/RESET.
LDO vs DC-DC at start-up
DC-DC: external SS cap, predictable. LDO: often internal soft-start only, must read the waveform.
Slow-ramping VIN
LDOs must not chatter or re-start when VIN crawls. Verify stability under slow VIN slopes.
Procurement focus
Ask for start-up waveform, inrush spec, PG polarity, ability to disable active discharge.
Procurement and cross-brand notes
- Request the actual start-up waveform under your VIN profile.
- Confirm inrush/soft-start behavior when the output is already biased.
- Ask whether active discharge can be disabled if you need pre-bias safe start-up.
- For automotive use, verify PG/RESET polarity and open-drain vs push-pull before replacement.
3) Pre-Bias Safe Start-Up (Core)
Pre-bias means the output node VOUT already sits at 0.5–2.5 V when the LDO is enabled. Some LDOs sink this existing voltage at start-up due to their internal pass-device strategy or because active/quick output discharge is enabled.
Solution 1 — Choose the right LDO
Prefer parts that explicitly state “supports start-up into pre-biased loads / no reverse current at start-up” in the datasheet.
Solution 2 — Disable discharge
If available, disable active/quick output discharge so the LDO will not pull down a pre-charged rail during start-up.
Solution 3 — Board-level protection
Use external OR-ing / ideal diode / staged enables so an existing voltage is not hard-tied to the LDO OUT at turn-on.
BOM note: Board has pre-biased VOUT (0.5–2.5 V). LDO must not sink output during start-up.
4) PG / RESET from LDO
LDO PG typically asserts when VOUT reaches ~90–95% and stays stable for a short delay. RESET is often used for MCU/mixed-signal hold-off. With pre-bias protection active, PG can be later than the basic start-up spec—plan the sequencing accordingly.
LDO → next LDO
Use PG of the first LDO to drive EN of the second. Ensure PG polarity and output structure are compatible across vendors.
LDO → DC-DC / load switch
Tie PG to the enable of a buck or a load switch. If PG sink/source current is limited, add a buffer or use a supervisor.
Procurement checklist for PG/RESET
- PG assertion level and polarity (active-high/low); delay fixed or programmable.
- Output structure: open-drain vs push-pull; required pull-up; drive current capability.
- Logic compatibility with next stage EN (voltage domains across vendors).
- Behavior under crank/slow VIN and with pre-bias protection enabled (PG may be later).
BOM note: PG must be open-drain and 3.3 V compatible across vendors; confirm delay and polarity for daisy-chaining.
5) Start-Up with Non-Ideal VIN (for LDOs)
Real boards do not always present a clean supply. VIN may ripple, dip, or fall close to VOUT. Some LDOs will deassert PG earlier than the output actually collapses, especially when the device enters dropout. In automotive crank or cold-crank conditions, a non-automotive LDO can chatter its PG/RESET and disturb downstream sequencing.
To avoid this, pair your LDO with PG + UVLO + automotive-grade options and test with ramp-and-step VIN profiles.
VIN ripple / fast dips
Small VIN drops can make PG flutter even if VOUT still looks OK. Check PG deassert thresholds.
VIN ≈ VOUT + dropout
When VIN falls close to VOUT, the LDO enters dropout and PG may drop before the rail really dies.
Crank / cold crank
Use automotive LDOs with PG, UVLO, and documented crank behavior. Generic LDOs may chatter PG.
Test recommendation
- Generate a slow VIN ramp from 0 → nominal.
- Insert one or two VIN steps/dips to simulate crank or harness loss.
- Record VOUT, PG/RESET, and EN simultaneously.
- Accept only LDOs whose PG stays stable or has a documented delay during dips.
Automotive note: Prefer LDOs that are AEC-Q100, expose UVLO settings, and publish start-up / line transient waveforms.
6) IC Selection Pointers (7 Automotive-Capable Vendors)
Below are families from the seven vendors you. Always match actual part numbers to the latest datasheet to confirm pre-biased start-up, PG polarity/drive, and output discharge configuration.
Texas Instruments (TI)
TPS7Axx automotive / high-performance LDOs — EN + PG, controlled start-up, suitable for camera/MCU bias.
TLV7x / TLV758/759 families — fast start-up, often EN-capable; verify pre-biased start-up when the output is pre-charged.
Note: some TPS7A variants differ on output-discharge behavior — check the exact suffix.
STMicroelectronics (ST)
LD390 and LDLN series — low-drop, popular for analog/sensor rails; check start-up waveform.
AEK-xx automotive LDOs — with EN/diagnostic/PG functions; many allow active discharge to be disabled, which helps pre-biased start-up.
For pre-biased rails, disable output discharge if the part exposes it.
NXP
Automotive camera / radar / MCU supply LDO families with EN and PG. Use them when the bias may be already powered from the harness or test gear.
Request the current automotive datasheet to confirm start-up into pre-charged rails.
Renesas
Renesas (incl. ex-Intersil) automotive LDOs for MCU/logic rails often combine EN + PG + UVLO, validated for cranking profiles.
Confirm PG delay and dropout PG behavior before replacing TI/ST parts.
onsemi
Examples: NCV4276 / NCV4274 / NCV8730 / NCV8163 — automotive LDOs with enable and sometimes PG.
Some NCV devices include output discharge — disable it when the rail is pre-biased.
Microchip
MCP1755S / MCP1799 / MCP1826S / MCP1703A automotive-capable variants — small rails with EN; verify PG or supervisor pins if sequencing is required.
Prefer parts that publish start-up waveforms and PG conditions.
Melexis
For sensor/actuator nodes powered from existing modules, use Melexis LDO/regulator variants that state reverse-current protection or start-up into pre-charged nodes.
Pull exact PNs from the target sensor family BOM to avoid non-existing numbers.
Cross-brand reminder: When replacing across vendors, always re-verify start-up into pre-biased loads, PG/RESET timing, and output-discharge settings on the real board.
7) Validation & BOM Notes
Validation for start-up into pre-biased rails must capture the exact mixed condition: cold start, pre-charged output, and a downstream load waiting for PG/RESET. Without this waveform, cross-brand substitutions will be risky.
Waveform to capture
Cold start (VIN=0→on) + VOUT=0.5–2.5 V already + PG/RESET feeding a real load. Record VIN / VOUT / PG.
BOM must say discharge state
If the rail is pre-biased, write into BOM: “output discharge disabled”. If not, explicitly allow discharge.
Log PG/RESET values
For small-batch / cross-vendor swaps, log actual PG threshold and delay for this board. Next LDO can match it.
BOM note templates
- BOM-1: Rail is pre-biased (0.5–2.5 V). LDO must not sink output during start-up. Output discharge: disabled.
- BOM-2: PG used for sequencing. Log actual PG threshold (90–95%) and delay (xx ms) from oscilloscope capture.
- BOM-3: Replacements across TI/ST/NXP/Renesas/onsemi/Microchip/Melexis must re-verify start-up into pre-biased loads.
8) Frequently Asked Questions (LDO Start-Up & Pre-Bias)
Why does my LDO pull down an already powered sensor rail at start-up?
Because the LDO’s internal pass device or active/quick output discharge tries to “own” the node. Use an LDO that states “start-up into pre-biased loads” or disable discharge. See section 3.
How to choose an LDO with controlled start-up for camera/LED bias?
Pick parts with EN + PG, documented start-up waveform, and optional discharge disable. Then test with VIN ramp + pre-charged output. See sections 2 and 6.
Can I daisy-chain LDO PG pins from different vendors?
Yes, but only if PG polarity, output structure (open-drain vs push-pull), and voltage domain match the next EN. Re-verify after cross-brand replacement. See section 4.
What if my LDO has active discharge but I need pre-bias safe start-up?
First disable discharge (if the part exposes it). If not, select an LDO that is pre-bias capable, or add external OR-ing/staged enables so the node isn’t hard-tied. See section 3.
Do automotive LDOs always support start-up into pre-biased outputs?
No. Some are automotive only for temperature/EMI but still sink a pre-charged rail. Always check the start-up waveform and test under VIN dips. See section 5.
How do I test LDO PG chatter with a ramped VIN?
Make VIN a slow ramp and inject 1–2 steps (crank-like). Capture VIN, VOUT, and PG in one screenshot. Accept only devices whose PG stays stable or is delayed. See section 5.
Why does PG drop before the output voltage really falls?
Many LDOs deassert PG when they enter dropout or when VIN falls close to VOUT, even if the load still sees usable voltage. This is normal but must be documented for sequencing. See section 5.
Can I leave output discharge enabled if the rail is never pre-biased?
Yes. If the rail is always at 0 V before start-up, keeping discharge enabled improves power-down behavior. Just write the discharge state into the BOM so replacements do not change it. See section 7.
How much PG delay is safe for a pre-biased rail?
Typically tens of milliseconds is enough to let the LDO “take over” a pre-charged node. If the rail feeds another LDO or a DC-DC, match the delay to that device’s enable needs. See section 4.
What should I log for small-batch / cross-brand LDO validation?
Log: VIN profile used, pre-bias level (V), PG assert/deassert voltage and delay, discharge state, and whether downstream load was attached. This lets you swap TI ↔ ST ↔ onsemi later. See section 7.
Can I use an MCU GPIO instead of LDO PG for sequencing?
You can, but then the MCU must know the rail may be pre-biased and should not enable the next load until the LDO is clearly in regulation. Hardware PG is safer for cross-vendor swaps. See section 4.
Does every LDO with EN also have PG/RESET?
No. EN only means you can turn it on/off. If you need sequencing across camera/MCU/LED rails, pick parts that expose PG or RESET pins and document their levels. See sections 4 and 6.
How do I tell if the datasheet really supports pre-biased start-up?
Look for wording like “start-up into pre-biased output,” “no reverse current at start-up,” or “output discharge can be disabled.” If missing, test it on the bench with a pre-charged VOUT. See sections 3 and 6.
What happens if VIN rises slowly while the rail is already pre-biased?
Some LDOs will bounce between “on” and “off” during a slow VIN ramp. A pre-bias-safe LDO will just take over the node without sinking it. That’s why slow-ramp testing is mandatory. See section 5.
Can I replace a TI pre-bias LDO with an ST/onsemi one directly?
Only if you re-run the same validation: cold start + pre-bias + downstream load + VIN steps, and the new LDO shows the same PG/delay/discharge behavior. Always re-verify start-up into pre-biased loads. See sections 6–7.
