← Back to: eFuse / Hot-Swap / OR-ing Protection
Executive Summary
An eFuse gives programmable current limit (ILIM) and controlled dv/dt soft-start, applies fast/slow trip curves to pass benign inrush while tripping true shorts, blocks reverse current, and exposes PG/FAULT and I²C/PMBus telemetry for logging and field recovery—unlike one-time, unobservable fuses or high-drop Schottky OR-ing.
Do not equate traditional fuses or Schottky OR-ing with eFuses: they lack programmability, telemetry, and controlled start-up.
Two lethal substitutions: (1) Schottky for ideal-diode control → excessive drop/heat; (2) Non-telemetry eFuse for a telemetry-required BOM → no cloud observability.
BOM hook: Telemetry required; do-not-substitute with non-telemetry parts.
Mechanism & Block Interactions
Current sense → ILIM DAC → comparator → pass control forms the limiting loop. A programmable dv/dt ramp shapes start-up, protection comparators enforce SC/OV/OT, reverse blocking prevents backfeed when VOUT > VIN, and PG/FAULT plus I²C/PMBus provide observability and recovery hooks.
Inrush sizing: I_inrush ≈ C_load × dV/dt. Shape dv/dt to pass benign capacitive surge while avoiding upstream brown-out.
Conduction heating: P_cond ≈ I_RMS² × Rds(on), ΔT ≈ P_cond × θJA. Escalate to Hot-Swap if thermal headroom is marginal.
Reverse blocking: ensure V_rev_block ≥ |V_backup − V_main|_max and validate leakage cutoff during OR-ing transitions.
BOM hooks: ILIM = __A; dv/dt = __ V/ms; ttrip_fast ≤ __ µs; reverse block ≥ __ V; PG/FAULT to MCU; telemetry = status/ILIM/Vin/Vout/Isense/Temp/EventLog. Do not substitute telemetry-enabled parts with non-telemetry devices.
Key Parameters & Calculations
Set ILIM and dv/dt from the allowed inrush, then choose Fast/Slow trip windows to pass benign surge while tripping hard faults;
verify reverse blocking and thermal limits. Use I_inrush ≈ C_load × dV/dt, P_cond ≈ I_RMS² × Rds(on), ΔT ≈ P_cond × θJA.
ILIM flow: define I_inrush_limit from source/connector limits → compute dV/dt_max with C_load → choose working dV/dt & set ILIM ≥ I_inrush(working) but ≤ source capability.
Trip windows: Fast (µs) for shorts within copper/connector SOA; Slow (ms–s) for overload/foldback. Target = pass benign surge, trip harmful current.
Reverse blocking: ensure V_rev_block ≥ |V_backup − V_main|_max; measure reverse leakage and cutoff during OR-ing transitions.
BOM hooks: ILIM = __ A; dv/dt = __ V/ms; ttrip_fast ≤ __ µs; slow foldback = __ A @ __ ms; reverse blocking ≥ __ V; PG/FAULT to MCU; telemetry = status/ILIM/Vin/Vout/Isense/Temp/EventLog.
Telemetry & I²C/PMBus Minimal Schema
Substitution is allowed only if telemetry is aligned to a minimal cross-brand schema and validated. Required fields:
STATUS{SC,OV,OT,REV,RETRY,LATCH}, ILIM_SET, I_SENSE(avg/peak), VIN, VOUT, TEMP, and
EVENT_LOG(last_code, counter, timestamp).
Mapping flow: Brand registers → unit/LSB scaling → enum mapping → unified schema → validate with scripted faults → approve substitution.
Polling & events: Periodically read STATUS/Vin/Vout/Isense/Temp; on PG/FAULT, snapshot EVENT_LOG. Buffer uploads during disconnection.
Common pitfalls: LSB/offset mismatch; ILIM_SET is read-only mirror; non-exclusive event codes; no buffering causes lost incidents.
BOM hooks: Telemetry (I²C/PMBus) required: STATUS{SC,OV,OT,REV,RETRY,LATCH}, ILIM_SET, I_SENSE(avg/peak), VIN, VOUT, TEMP, EVENT_LOG. Cross-brand substitution allowed only after cloud mapper is updated and validated.
Latch vs Auto-Retry (Timing & Firmware Dependencies)
Choose Latch for high-safety systems to avoid oscillatory restarts and require human/firmware clearance. Choose Auto-Retry when faults are transient and self-recovery is desired—but cap retry cycles and duty to protect the upstream rail.
Latch: single fault → latched-off until cleared by human/FW. Suits high-risk domains; enables root-cause logging; prevents bounce.
Auto-Retry: auto recovery for transients; configure N_retry_max, t_retry_off, and duty_retry_max to avoid hammering the source.
PG/FAULT timing: debounce PG (0.5–2 ms) and FAULT (50–200 µs); ensure a log window ≥ debounce and I²C read time.
Validation scripts: (1) Step load→SC pulse: measure ttrip_fast, PG↓, FAULT↑; (2) ms overload: verify Latch vs Retry behavior; (3) repeated SC: confirm N_retry_max and upstream sag; (4) log integrity with EVENT_LOG.
BOM hooks: Mode={Latch|Auto-Retry}; N_retry_max=__; t_retry_off=__ ms; t_retry_on_ramp=__ ms; duty_retry_max=__%; PG debounce=__ ms; FAULT debounce=__ µs; Log=STATUS/Vin/Vout/Isense/Temp/EventLog.
Thermal & SOA Checks (When to Use Hot-Swap)
Check conduction loss and temperature rise in steady state, then validate pulse/short-circuit SOA. If margin is thin or repeated pulses approach SOA limits, upgrade to Hot-Swap (controller + external MOSFET).
Steady-state: P_cond ≈ I_RMS² × Rds(on), ΔT ≈ P_cond × θJA. Consider Rds(on) vs temperature and copper spreading.
Pulsed short: estimate E_pulse ≈ V_DS · I_D · t_pulse (rectangular approx) and map to SOA. Derate for repetition and duty.
Upgrade threshold: ΔT close to limit, SOA point near boundary, or upstream supply sags under retries → move to Hot-Swap.
Validation scripts: (1) Long-run I_RMS thermal soak to record ΔT; (2) Inject t_pulse/I_peak and compute E_pulse → map to SOA; (3) Repeated pulses with duty limits; (4) Auto-Retry heat run to monitor upstream sag/overheat.
BOM hooks: Rds(on) ≤ __ mΩ; θJA ≤ __ °C/W; ΔT_meas ≤ __ °C @ I_RMS = __ A; SOA pass @ V=__ V, I=__ A, t_pulse=__ ms, rep=__ Hz; Upgrade to Hot-Swap if Margin_T < __ °C or SOA ratio < __%.
Interface with Ideal-Diode / OR-ing (Low-Drop Switching)
Ideal-diode controllers provide low-drop priority switching; the eFuse adds current limiting, protection, and reverse blocking.
Calibrate the priority window ΔV_priority (typ. 30–80 mV, part-dependent), coordinate reverse blocking to avoid back-feed and “hiccup”.
Priority window: start with 30–80 mV and tune in hardware. Too small → oscillation; too large → delayed switchover & extra droop.
Reverse blocking: Ideal-diode governs forward paths; eFuse blocks reverse when VOUT>VIN. Use hysteresis/hold-time to prevent ping-pong.
No Schottky parallel: diode drop × current = heat; also breaks priority control and telemetry consistency. Prohibit in BOM.
BOM hooks: ΔV_priority = __ mV (calibrated); t_sw ≤ __ ms; I_backflow ≤ __ mA; Reverse blocking ≥ __ V; Schottky-parallel OR-ing = prohibited; Kelvin sense for gate/sense.
Test pointers: Sweep source delta to find switch points; fast drop/restore on Main to log Vout_min & t_sw; inject reverse step at Vout to verify cutoff and leakage.
Validation & Test Flow (Executable)
Run a scriptable matrix to cover inrush, fast trip, overload/thermal, reverse blocking, PG/FAULT timing, hot-plug repeatability, and event-log consistency. Record the minimal telemetry set: Vin, Vout, I_load, I_inrush_peak, t_trip_fast, t_slow, ΔT, I_rev_leak, t_sw, PG/FAULT edges, EVENT_LOG{code,counter,timestamp}.
Script cues: Use ≥200 MHz scope; SC edge < 200 ns; temperature at steady state and during pulses; log raw I²C/PMBus frames for traceability.
BOM hooks: I_inrush_limit=__ A; t_trip_fast ≤ __ µs; I_fold_slow=__ A@__ ms; V_rev_block ≥ __ V; I_rev_leak ≤ __ mA; PG=__ ms; FAULT=__ µs; t_sw ≤ __ ms; Hot-plug fail_rate ≤ __%; EVENT_LOG schema per telemetry chapter.
Small-Batch Procurement & Cross-Brand Alternatives (A→A / A→B / A→C)
Approve replacements only after threshold parity (ILIM, dv/dt, trip curves) and telemetry alignment. Prefer A→A (same brand, pin-compatible) → A→B (cross-brand, near footprint, mapping updated) → A→C (over-spec upgrade with layout/SOA recheck).
Validate these fields: ILIM range · dv/dt control · Fast/Slow Trip · Reverse block · PG/FAULT · Telemetry · Rds(on) · θJA
A→A (Same Brand, Pin-Compatible)
Zero-layout change. Verify parity using trip curves and dv/dt behavior.
- TI: TPS25947 ↔ TPS2595x; TPS25981 ↔ TPS25982
- ST: STEF05 ↔ same-family STEF variants; STEF12 ↔ same-family variants
- onsemi: NIS5020 ↔ NIS5021
- Microchip: MIC2545A ↔ MIC2549 / MIC20xx family
- Renesas: ISL6144 ↔ ISL6146 (family parity check required)
- NXP / Melexis: generic eFuse parts uncommon in this domain; A→A typically not applicable
A→B (Cross-Brand, Near-Footprint)
Mandatory: update BOM thresholds and telemetry mapping before release.
- 5 V port protection: TI TPS25947 ↔ ST STEF05 ↔ onsemi NIS5021 ↔ Microchip MIC2549
- 12 V load protection: TI TPS25982 ↔ ST STEF12 ↔ onsemi FPF2xxx
- 12–24 V controlled power-up: TI TPS25940/25980 ↔ Renesas ISL6144/6146
BOM note: Telemetry required; mapping updated (STATUS/I/VIN/VOUT/TEMP/EVENT_LOG). No Schottky OR-ing.
A→C (Over-Spec Upgrade / Layout Change)
If ΔT or SOA is tight, upgrade to Hot-Swap + external MOSFET and re-check layout.
- TI: eFuse → LM5069 / TPS24772 (Hot-Swap controller)
- Renesas: ISL6144 / ISL6146 (Hot-Swap)
- onsemi: NIS6350 / NIS6xxx (higher power domain)
- Microchip: MIC2549 → move to low-Rds(on) external FET solution if needed
- NXP / Melexis: not typical for generic eFuse in this page; handle at system level if brand must be present
Re-validate SOA (Ch.6) and ΔV_priority (Ch.7); accept layout changes.
BOM hooks: ILIM_set=__ A; dv/dt=__ V/ms; FastTrip=__ µs@__A; SlowTrip=__ ms@__A; V_rev_block ≥ __ V; I_rev_leak ≤ __ mA; PG=__ ms; FAULT=__ µs; Rds(on) ≤ __ mΩ@__°C; θJA ≤ __ °C/W; Telemetry fields present: STATUS/ILIM/I/VIN/VOUT/TEMP/EVENT_LOG.
Prohibit: non-telemetry parts for telemetry-required designs; Schottky OR-ing; release without cloud mapping update.
Layout & Implementation Guidelines (Reliable · Measurable · Thermally Safe)
Avoid “parameters OK but board fails” by focusing on five areas: Thermal copper, Measurement points, Surge loop minimization, Probe pads, and ESD/surge placement. Tie results to ΔT and SOA checks (Ch.6) and to priority window stability (Ch.7).
Thermal: solid copper under eFuse + via array; keep away from temp-sensitive parts; reserve contact copper to chassis. Target margin ≥ 15–20 °C.
Measurement: Kelvin points for current/voltage; short/clean PG/FAULT & I²C; place pull-ups near device; validate edges and I²C integrity.
Surge loop: place input capacitors tight to VIN/GND; use parallel traces and via curtains; limit hot-plug inductive loop area.
Probe pads: reserved pads for scope/load; keep I_SENSE and VIN/VOUT pads adjacent and labeled to avoid fly-wires.
ESD/surge: TVS close to connectors; short return; single-point tie of protection ground and signal ground; pre-check IEC 61000-4-2/-4-5.
Thermal/SOA linkage: ΔT_meas ≤ __ °C @ I_RMS=__ A; θJA ≤ __ °C/W; SOA pass @ V=__ V, I=__ A, t=__ ms, rep=__ Hz.
Switching stability: ΔV_priority tuned; no oscillation/hiccup; PG debounce=__ ms; FAULT debounce=__ µs.
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Pitfalls & Pre-Release Checklist (Launch Gate)
Parameters can look correct while systems still fail from brown-out, back-feed, thermal limits, or logging gaps. Treat the items below as must-pass gates. Only an all-green checklist qualifies for release.
Schottky in place of ideal-diode
Fixed drop → heat; priority window lost.
Gate: “No Schottky OR-ing” present in BOM; ΔV_priority preserved.
ILIM too high / Fast Trip too lax
Shorts overheat copper/connector.
Gate: t_trip_fast ≤ __ µs @ SC; copper ΔT ≤ __ °C.
dv/dt too fast
Upstream brown-out unseen during plug-in.
Gate: VIN sag ≤ __ mV across dv/dt sweep; no false trips.
Reverse blocking untested
Back-feed during dual-rail switching.
Gate: I_rev_leak ≤ __ mA @ Vout>Vin by __ V (temp corners).
PG/FAULT not wired or logged
Firmware retries lack evidence.
Gate: PG debounce=__ ms; FAULT debounce=__ µs; edges captured.
No hot-plug repeatability
Field-only hiccups or PG chatter.
Gate: ≥ __ cycles/min for __ min; fail rate ≤ __%.
Cross-brand mapping not updated
Cloud analytics and alarms break.
Gate: STATUS/ILIM/I/VIN/VOUT/TEMP/EVENT_LOG mapped.
Capture set: Waveforms {Vin, Vout, I_inrush, I_load, PG, FAULT}; Scalars {t_trip_fast, dv/dt, I_rev_leak, ΔT, θJA, t_sw, ΔV_priority}; Logs {code, counter, timestamp}; parity with cloud records.
BOM note 1: Telemetry required; non-telemetry parts are not allowed.
BOM note 2: No Schottky OR-ing; keep ideal-diode priority window and reverse-blocking intact.
BOM note 3: Release only after cloud mapping for STATUS/ILIM/I/VIN/VOUT/TEMP/EVENT_LOG is updated.
| Test | Threshold | Result |
|---|---|---|
| SC Fast Trip | t_trip_fast ≤ __ µs; ΔT ≤ __ °C | □ PASS □ FAIL |
| dv/dt Brown-Out | VIN sag ≤ __ mV (sweep) | □ PASS □ FAIL |
| Reverse Blocking | I_rev_leak ≤ __ mA @ ΔV=__ V | □ PASS □ FAIL |
| PG/FAULT Logging | PG=__ ms; FAULT=__ µs; edges logged | □ PASS □ FAIL |
| Hot-Plug Repeatability | ≥ __ cycles/min × __ min; fail ≤ __% | □ PASS □ FAIL |
| Priority Window (Ch.7) | ΔV_priority tuned; no ping-pong | □ PASS □ FAIL |
| Cloud Mapping (Ch.4) | STATUS/ILIM/I/VIN/VOUT/TEMP/EVENT_LOG mapped | □ PASS □ FAIL |
FAQ
Answers are written to match the JSON-LD schema verbatim. Keep visible text and structured data identical.
How should I set ILIM so inrush is allowed but shorts still trip fast?
Set ILIM from the allowed inrush: I_inrush_limit ≥ C_load × (dV/dt). Then validate short-circuit pulses so Fast Trip still interrupts within the copper/connector limits. Sweep dv/dt and C_load to confirm no false trips. Release only when inrush passes, short-circuit trips within t_trip_fast ≤ __ µs, and ΔT stays within margin.
When is slow foldback safer than a strict fast trip?
Use slow foldback when the load has large capacitors or brief overloads that are benign. It limits current thermally without collapsing the rail. Keep Fast Trip for true faults. A good rule is: fast trip for hard shorts; foldback for sustained overloads with predictable heating, verified by ΔT and device SOA at time scale.
How do I size dv/dt to avoid upstream brown-out on plug-in?
Start with a slow ramp that keeps source sag within your headroom, then increase until you meet start-up time requirements. Measure VIN sag and I_inrush_peak across dv/dt and temperature. Finalize the value where VIN sag ≤ __ mV and the rail reaches regulation within __ ms, with no false PG/FAULT triggers.
Latch vs auto-retry—what should firmware log and debounce?
For Latch, log the fault code, timestamp, and rail state before issuing a deliberate clear. For Auto-Retry, add event counters and a minimum observation window to avoid oscillation. Debounce PG (ms) and FAULT (µs). Persist last-N events so service can distinguish a transient hiccup from repeated genuine failures.
Which reverse-blocking margin is safe when OR-ing two rails?
Ensure the eFuse blocks when Vout > Vin by at least your worst-case overlap plus measurement error, typically a few hundred millivolts. Validate I_rev_leak ≤ __ mA across temperature and overdrive. Combine this with an ideal-diode priority window (ΔV_priority) and dwell time to prevent back-feed and ping-pong.
How do I separate benign inrush from genuine short in event logs?
Tag each FAULT with context: dv/dt setting, load state, and elapsed time since enable. Benign inrush happens during the programmed ramp and clears once the slope ends; shorts show immediate over-current independent of dv/dt. Cross-check with I_peak, time-to-trip, and whether PG asserted before the event to classify accurately.
What thermal headroom is advisable if θJA is uncertain?
Keep at least 15–20 °C ΔT margin between measured steady-state temperature and your worst allowable limit. When θJA is uncertain, over-provision copper and via arrays under the device, and re-measure ΔT at I_RMS and ambient extremes. If margin erodes under worst case, move to a lower Rds(on) or Hot-Swap solution.
Can an eFuse sit behind another eFuse or a Hot-Swap controller?
Yes, but define roles: the upstream Hot-Swap controls inrush and SOA; the downstream eFuse handles local faults and telemetry. Check stability of enable/PG sequencing, ensure trip levels do not conflict, and verify cumulative voltage drop and thermal rise. Test short-circuit both upstream and downstream to confirm correct selectivity.
Why can’t a Schottky replace an ideal-diode controller with an eFuse present?
A Schottky adds fixed drop and waste heat, destroying the low-loss priority window and risking thermal runaway at high current. It also confuses telemetry and OR-ing behavior. Ideal-diode controllers actively regulate MOSFET conduction with milliohm-class drop, preserve ΔV_priority hysteresis, and coordinate cleanly with eFuse reverse blocking.
What is the minimum telemetry set for cross-brand alternatives?
Use a brand-neutral core: STATUS{SC,OV,OT,REV,RETRY,LATCH}, ILIM_SET, I_SENSE (avg/peak), VIN, VOUT, TEMP, and EVENT_LOG{last_code,counter,timestamp}. Map vendor registers into this schema before approving a substitute so analytics, alarms, and field diagnostics remain consistent after the change.
How do I write do-not-substitute BOM notes for telemetry and OR-ing?
State requirements explicitly: “Telemetry required; non-telemetry parts are not allowed.” “No Schottky OR-ing; preserve ideal-diode priority window and reverse-blocking.” “Release only after cloud mapping for STATUS/ILIM/I/VIN/VOUT/TEMP/EVENT_LOG is updated.” Include target dv/dt, ILIM, and trip thresholds to prevent silent spec drift.
How do I validate PG/FAULT timing for safe firmware retries?
Measure edges during enable, inrush, short-circuit, and recovery. Set PG debounce in milliseconds and FAULT debounce in microseconds, then inject faults at varying durations. Firmware should wait a minimum observation window, log the event, and only attempt a bounded number of retries. Ensure no brown-out or logging gaps occur.
