What this page solves

This page focuses on motion-drive EMC for servo and VFD cabinets. The goal is to help plan the EMI and ESD building blocks around a drive — from the mains input and front-end power stage to motor cables, feedback wiring, fieldbus links and local I/O.

The content is written for teams that need to pass EMC standards such as EN 61800-3 and CISPR 11/22 without turning the drive design into a trial-and-error exercise. The page highlights where CM chokes, differential filters, TVS/ESD arrays and spread-spectrum clocks sit in the system and how they interact with the existing power and control architecture.

Instead of reproducing EMC standards or power-conversion textbooks, the focus stays on practical placement and selection of EMC blocks inside a motor drive. Detailed power-topology, sensing-accuracy and functional-safety topics are handled on their dedicated pages and are only referenced here where they affect EMC choices.

Where EMC lives in a motion drive

EMC behaviour in a motion drive is shaped by a few main energy and signal paths: the mains side and front-end PSU feeding the DC link, the inverter and motor cables, the feedback and fieldbus wiring and the 24 V I/O and HMI connections leaving the cabinet. EMI filters, CM chokes, differential LC stages and TVS/ESD arrays sit along these paths instead of living in isolation.

The diagram below groups a typical servo or VFD cabinet into five EMC views: mains and line filter, front-end PSU and DC link, inverter and motor leads, feedback wiring and fieldbus links and low-voltage I/O and HMI. Each path shows where CM chokes, differential filters, TVS/ESD arrays and spread-spectrum clocks can be inserted so the drive passes EMC tests without disturbing control accuracy or protection functions.

CM chokes & line filters for mains and motor leads

Common-mode chokes and line filters on the mains input and motor leads define how a motion drive behaves in conducted and radiated EMC tests. The mains side usually relies on a classic combination of X and Y capacitors, common-mode chokes and differential inductors, while the motor side adds output CM chokes or dV/dt filters to keep fast inverter edges away from long shielded cables and nearby feedback wiring.

On the mains and three-phase AC side, the key decisions cover the topology of the line filter, its current rating, the impedance and attenuation curve across 150 kHz to 30 MHz, leakage current and safety clearances. On the motor side, attention shifts to cable length, dv/dt stress, common-mode return paths and the power level where a dedicated motor filter module or output CM choke becomes mandatory instead of optional.

Mains and three-phase AC side

A typical front-end line filter places X capacitors between phases, Y capacitors to the protective earth, a common-mode choke around the phase bundle and one or more differential inductors in series with the rectifier or PFC input. The filter must provide enough insertion loss in the conducted EMC band while respecting leakage-current limits and the applicable safety approvals for X and Y capacitors, creepage, clearance and insulation distance.

• X and Y capacitors shape high-frequency attenuation and provide return paths for common-mode currents; ratings are driven by mains voltage, overvoltage category and required safety class (X1/X2, Y1/Y2).
• Common-mode chokes present high impedance to common-mode noise with minimal impact on differential current. Datasheets define current rating, leakage inductance, frequency response and thermal behaviour under cabinet temperature conditions.
• Differential inductors and any DC chokes must support the rectified current and avoid saturating under worst-case operating conditions while still contributing to low-frequency EMI reduction.

The line filter acts as the boundary between the public mains and the front-end PSU. It is designed around PFC and rectifier behaviour but does not depend on a specific PFC control strategy; topology-level optimisation of PFC and LLC stages belongs in the power-supply topic.

Motor leads and dV/dt filtering

At the output of the inverter, fast switching edges and high dv/dt drive common-mode currents into the motor cables and nearby structures. Long motor leads behave as efficient antennas and can disturb encoder and feedback wiring that shares the same routing bundles or trays. Common- mode chokes and dV/dt filters on the motor side help confine these currents and reduce stress on the motor insulation system.

• For short cables and low-to-medium power drives, a well-designed mains filter and good cabinet layout may be sufficient, with only shield terminations and basic output filtering.
• As cable length and power increase, motor-side CM chokes and dV/dt filters become more important to limit radiated emissions, reduce coupling into feedback cables and avoid over-stressing motor windings.
• Dedicated motor filter modules often combine CM chokes and L-C stages into a certified unit, simplifying EMC tuning for higher-power drives or installations with long cable runs.

Detailed analysis of motor bearing currents and insulation lifetime is handled on motor and mechanical selection pages. In this EMC subsystem view, the focus stays on when and where to place CM chokes and filters on the motor leads to relieve EMC and system-integration issues.

Selection hooks and purchasing checklist

When discussing CM chokes and line filters with suppliers, it helps to describe the drive power range, mains voltage, target EMC standard and whether the design favours discrete inductors or pre-certified filter modules. Pre-certified filters reduce risk and debug time at the cost of board space and unit price, while discrete chokes allow finer optimisation around cost and layout at the expense of more EMC engineering effort.

• Rated current and voltage range for the filter or choke under worst-case operating conditions.
• Impedance and attenuation curves across the conducted EMC band for both CM and DM modes.
• Thermal performance and allowed temperature rise inside the control cabinet environment.
• Safety approvals and insulation ratings, including UL, ENEC and relevant creepage/clearance data.

PFC and rectifier control details, motor bearing stress and motor insulation design are covered in other topics. This section stays at the EMC block level, showing how mains and motor-side filters frame the drive so that front-end PSUs and power stages operate inside a well-defined EMI boundary.

TVS/ESD arrays on I/O, encoder and comms

Transient-voltage suppressors and ESD arrays protect low-voltage interfaces from ESD, EFT and surge events that enter the drive cabinet through long cables, exposed panel controls and industrial fieldbus links. Selection and placement of these components must respect the working voltage, signal bandwidth and symmetry requirements of each interface so that protection does not disturb encoder accuracy, discrete I/O thresholds or high-speed communication links.

Interfaces in a motor-drive cabinet usually fall into four groups: 24 V discrete I/O, encoder and resolver wiring, industrial fieldbus or Ethernet links and panel HMI connections. Each group favours slightly different TVS device types, clamping voltages and parasitic capacitance ranges. The layout around connectors and reference returns is as important as the datasheet ratings for achieving robust protection without compromising signal integrity.

Interface categories

24 V discrete I/O lines connect to limit switches, proximity sensors, relay coil feedback and other on/off signals that often run through long cables and noisy plant wiring. These channels must withstand ESD, EFT bursts and surge events while tolerating inductive kick from relay and valve coils.

Encoder and resolver interfaces route differential digital streams or analogue sin/cos signals between the drive and the motor-side feedback devices. These cables typically run alongside the motor leads and are especially sensitive to common-mode noise, fast transient events and any added impedance or imbalance from the protection network.

Fieldbus and communication links such as Ethernet, EtherCAT, PROFINET, RS-485 and IO-Link expose the drive to high data rates and strict signal-integrity budgets while being connected across long runs in harsh environments. Panel HMI interfaces add buttons, touch screens, USB and Ethernet panel connectors that are often the very first ESD hit points due to direct operator contact.

TVS and ESD device selection

Choosing a TVS or ESD array begins with matching the maximum working voltage to the interface supply level. The rated working voltage must exceed the maximum continuous voltage on the line, while the clamping voltage needs to sit safely below the absolute maximum rating of the devices behind the protection stage. At the same time, peak current capability and surge ratings must align with the expected ESD and surge test levels for the drive.

• 24 V I/O lines normally use TVS devices with working voltages in the 24–30 V range and surge ratings suitable for IEC 61000-4-5 levels, with clamping voltages low enough to protect digital inputs, drivers and PLC-style I/O circuits.
• Logic and encoder signals at 5 V or 3.3 V require TVS arrays with matching working voltages and low leakage current. Clamping behaviour and dynamic resistance must be checked against the input protection structures of ADCs, comparators and line receivers.
• Multi-channel arrays simplify protection of differential pairs and multi-pin connectors by combining matched TVS diodes into one package, while individual high-power TVS diodes are better suited to heavy 24 V surge-prone circuits.

High-speed differential signals

High-speed differential links such as Ethernet, LVDS encoder outputs and fast RS-485 channels place tight limits on the added capacitance, imbalance and non-linearity of any ESD protection. TVS arrays on these lines must use low-capacitance structures and maintain symmetry between the two conductors of each differential pair to avoid converting differential energy into unwanted common-mode components.

• For medium-speed RS-485 and IO-Link, TVS capacitance in the tens of picofarads may still be acceptable, but only if signal rise times and driver capabilities remain within specification.
• For Ethernet and high-speed LVDS encoder interfaces, small-capacitance TVS arrays in the single-digit picofarad range are usually required, and differential impedance control must be preserved across the protected region.
• Protection elements are often placed directly behind the connector, followed by common-mode chokes towards the PHY, balancing ESD robustness with EMC noise shaping.

Layout discipline around connectors and returns

PCB layout largely determines how effectively TVS arrays can divert transient currents. The protection devices should sit as close as practical to the connector pins, with short traces from the external pins into the TVS pads and a compact, low-inductance connection to the reference ground or chassis node.

• Keep the path from connector pin to TVS to ground as short and straight as possible; long loops reduce clamping effectiveness and increase residual stress on interface ICs.
• On differential lines, avoid long stubs to the TVS pads and preserve equal path length for both conductors to maintain differential balance and limit mode conversion.
• Coordinate the order of TVS arrays, common-mode chokes and any differential filters so that large-energy transient events are clamped at the connector side before they reach the filtering and PHY or AFE inputs.

Protocol timing, data-link redundancy and higher-layer network design are treated on fieldbus and encoder pages. The focus in this EMC subsystem section is on the protective devices that sit at the edges of the cabinet and how to choose and place them for robust operation under EMC test conditions.

Differential & common-mode filters for DC links and signals

Differential and common-mode filters on DC links and signal chains shape how a motion drive behaves under conducted EMI tests and during real installations. On the high-voltage side, C–L–C or π filters, RC snubbers and DC chokes sit between the rectifier or PFC stage and the inverter bridge. On the low-voltage side, 24 V distribution rails and precision signal paths rely on LC and RC sections that block high-frequency noise without degrading transient response or measurement bandwidth.

This section focuses on DC link filters as EMC building blocks, their relationship to bulk capacitors and pre-charge circuits, and the way 24 V distribution and signal-path filtering can be used to confine noise to specific zones of the drive. Detailed analogue noise analysis and sensing accuracy budgets remain on the dedicated current, voltage and feedback sensing pages.

DC link filters between front-end PSU and inverter

The DC link sits between the front-end PSU and the inverter bridge and offers a second opportunity to shape conducted EMI after the mains line filter. A typical arrangement uses C–L–C or π filters with a DC choke in series and additional RC snubbers to tame high-frequency edges. Bulk capacitors handle low-frequency ripple, while smaller capacitors and the DC choke address the 150 kHz to several megahertz band that appears in conducted EMC measurements.

• The DC choke provides differential-mode impedance in the EMI band and must support the maximum DC current without saturation, while its DC resistance contributes to efficiency and voltage drop.
• π filters around the DC choke combine bulk and high-frequency capacitors; their values and ESR determine how steeply the EMI spectrum is attenuated and where impedance peaks appear.
• RC snubbers across the DC bus or across high-inductance segments absorb very fast spikes and damp resonances between wiring inductance and DC link capacitance.

Pre-charge resistors and contactors must be coordinated with the DC choke and bulk capacitors so that inrush currents and voltage ramps stay within device limits. The EMC view of this coordination is to ensure that the DC link filter maintains its attenuation across the test band without creating unwanted resonant points at power-up or in normal operation.

24 V distribution and low-voltage rail filtering

The 24 V industrial rail typically feeds multiple control, sensing and I/O boards inside the cabinet. Global LC filtering close to the 24 V supply output reduces switching noise exported to the rest of the installation, while local LC or RC sections at each module input prevent that module from injecting its own noise back onto the rail.

• A modest series inductance or ferrite bead, combined with electrolytic and ceramic capacitors at the module entry, isolates fast load edges from the shared 24 V bus and attenuates noise coupled from other parts of the drive.
• Cutoff frequencies must remain above the dominant load-transient frequencies so that relay, valve and logic supplies recover quickly from step changes without excessive droop or oscillation.
• High-noise loads such as gate-driver supplies and pulsed I/O cards benefit from dedicated branches with their own LC sections, leaving sensitive AFEs, ADCs and encoders on cleaner 24 V or low-voltage rails.

Differential filters on encoder and feedback signals

Differential-mode filters on encoder, analogue feedback and current-sense lines remove high-frequency EMI that rides on top of useful signals. Simple RC or R–C–R structures can perform anti-aliasing and EMI reduction at the same time, as long as their cutoff frequencies remain comfortably above the intended control and measurement bandwidths.

• For current-sense and bus-voltage feedback, RC networks should be dimensioned so that the filter cutoff stays above the control-loop bandwidth by a margin, while still attenuating switching edges and RF noise that would otherwise fold into the ADC.
• For analogue sin/cos encoders, low-pass filtering is set above the maximum carrier and harmonics used by the interface, keeping the waveform shape intact while reducing susceptibility to high-frequency interference.
• For digital encoder and communication lines, small series resistors and appropriately sized capacitors can slow extremely fast edges and limit ringing, but must respect the signalling standard and timing margins.

Detailed bandwidth and error-budget recommendations for current and voltage sensing, as well as specific encoder front-end design, are covered on the respective sensing and interface pages. Here the emphasis stays on filters as EMC components that sit between noisy power stages and sensitive measurement circuits.

Filter device types and EMC-focused parameters

Across DC links, 24 V rails and signal lines, the design task is to choose inductors, capacitors and RC networks that provide sufficient attenuation in the EMC band without destabilising supplies or degrading signal dynamics. Device selection usually starts from the required attenuation and operating current, then checks core material, thermal limits and the placement inside the cabinet.

• DC chokes and π filters sized for rated DC current, target attenuation and acceptable voltage drop.
• Module-level LC sections on 24 V and low-voltage rails tuned above load-transient frequencies.
• RC and R–C–R filters on signal lines with cutoff frequencies aligned to sensing and control bandwidths.

Analogue noise performance, drift and calibration strategies are treated in individual sensing topics. This section frames differential and common-mode filters as EMC building blocks that work alongside CM chokes, line filters and TVS arrays to stabilise the electromagnetic environment inside a motion drive cabinet.

Spread-spectrum clocking & layout discipline

Spread-spectrum clocking and disciplined PCB layout directly influence how a motion drive appears to EMC test receivers. Spread-spectrum techniques redistribute energy from narrowband clock harmonics into a wider band, lowering peak levels in radiated and conducted measurements. Layout rules then determine whether high dI/dt loops, return paths and coupling between power, sensing and communication circuits amplify or suppress the remaining noise.

This section outlines where spread-spectrum clocking brings the most benefit, how integrated and external SSC sources are configured at a high level and which layout practices have the strongest impact on motor-drive EMC. Detailed clock-tree configuration inside MCUs and protocol timing margins remain on the motion-control and fieldbus topics.

Spread-spectrum clocking and key frequency domains

Fixed-frequency system clocks, PWM carriers and communication references generate sharp peaks in the EMI spectrum. Spread-spectrum modulation slightly dithers these frequencies, spreading their energy over a band and reducing the height of individual peaks. The total energy remains similar, but the reduced peak amplitude can move the drive under the EMC limit lines.

• System clocks in the tens to hundreds of megahertz strongly influence radiated emissions and may be candidates for modest spread-spectrum modulation when jitter budgets allow.
• PWM carrier and PFC switching frequencies define low-frequency conducted EMI structures; controlled frequency dithering can flatten narrowband spikes at the cost of additional effective jitter that must be acceptable to control loops.
• Some PHY and high-speed serial clocks include built-in SSC profiles that balance EMC benefits against protocol timing requirements.

Implementation options and EMC-relevant parameters

Spread-spectrum can be implemented by PLLs integrated in MCUs, DSCs and PMICs or by dedicated clock-generator ICs that drive multiple domains. Integrated SSC functions offer simple activation and predefined modulation profiles, while external devices allow more control over modulation depth and shape across several outputs.

• Modulation depth, often expressed as ±percentage of nominal frequency, trades EMI reduction against additional jitter. Deeper modulation lowers peak levels further but tight timing domains typically tolerate only small deviations.
• Modulation frequency must avoid sensitive control and observation bands. Very low modulation rates can create distinct sidebands, while excessively high rates can resemble broad jitter that may affect sampling or protocol timing.
• Combined jitter from SSC, PLL noise and routing must fit within the jitter budgets of FOC loops, ADC sampling schemes and communication interfaces as defined on their dedicated pages.

Layout discipline around power stages and high-dI/dt loops

PCB layout determines whether high dI/dt loops and switching nodes couple aggressively into control, sensing and communication circuits. A small set of non-negotiable rules for power- stage layout has a large effect on EMC performance and should be applied consistently across motor-drive designs.

• Minimise the area of switching current loops by placing half-bridges, DC link capacitors and return paths as close together as possible and routing them over solid reference planes.
• Define a clear and concentrated connection between power ground and control ground, such as a star point or small copper island, instead of multiple long links that invite common-mode noise to spread across the board.
• Place snubbers, gate resistors and other damping components directly at the switching devices so that their effect applies to the true high-dI/dt loop rather than to distant copper segments.

Layout discipline for sensing, control and communication zones

Sensing, control and communication circuits require their own layout discipline to avoid picking up noise from the power stage. Organising the PCB into zones with controlled return paths and carefully routed interfaces helps keep precision measurements and industrial networks stable under EMC stress.

• Group shunts, low-noise amplifiers and ADC pins into compact islands with short, Kelvin-style routes and keep these islands away from switching nodes and gate-drive traces.
• Route encoder and communication differential pairs over continuous reference planes and away from parallel high-current paths; crossing unavoidable power lines at right angles reduces coupling compared with long parallel runs.
• Distribute 24 V and low-voltage rails so that noisy loads such as gate drivers and fast digital outputs do not share narrow return paths with analogue AFEs, precision references and communication PHYs.

General PCB stack-up and routing guidelines are treated in broader layout documentation. The focus here is on the subset of spread-spectrum and layout decisions that most strongly influence EMC for motion-drive cabinets.

Component & IC mapping for EMC sub-blocks

EMC sub-blocks in a motion drive map directly onto a small set of component and IC families: line filters and CM chokes on mains and motor leads, TVS and surge elements on exposed I/O, active EMI filters and spread-spectrum clock generators around noisy power and clock sources, and AFEs that monitor leakage current or EMI behaviour. This section turns those blocks into concrete device categories and search keywords for sourcing and design reviews.

For each EMC function, typical application ranges, key parameters and category keywords help narrow down vendor portfolios without tying the design to a single part number. Detailed functional behaviour and control specifics are handled in the dedicated power, sensing and communication pages; here the focus stays on EMC-oriented device selection.

Front-end and motor-side EMI filters

Front-end and motor-side filters turn the conceptual CM/DM blocks from the earlier sections into concrete magnetic and passive components. Device selection starts from mains voltage, current and cable length, then checks impedance characteristics and safety approvals.

• For three-phase 400 V or 480 V servo and VFD cabinets up to the 10–20 A range, integrated EMI filter modules combining X/Y capacitors, common-mode chokes and differential inductors simplify layout and provide known impedance curves over 150 kHz to 30 MHz with the required safety certifications.
• For higher-power drives with long motor cables, ready-made motor-side dV/dt or sine-wave filter modules rated for the target kilowatt and cable-length classes can be used to limit dV/dt at the motor terminals and reduce stress on insulation and bearings.
• For compact 24–48 V servo drives on a single PCB, SMD common-mode chokes on the DC input and short PI filters around the DC link provide extra attenuation without large enclosures, provided that current rating and saturation characteristics match the peak load.

TVS, ESD and surge protection elements

TVS diodes, ESD arrays and surge elements protect I/O, feedback and communication ports against IEC test pulses and real-world transients. The most important selection axes are working voltage, clamping behaviour and parasitic capacitance for high-speed interfaces.

• For 24 V industrial digital I/O and valve or relay outputs, single-line or multi-line TVS devices with 24–33 V standoff voltage and surge ratings aligned with IEC 61000-4-5 levels complement flyback and snubber networks in the driver circuits.
• For RS-422 and RS-485 encoder links running over tens of metres, low-capacitance multi-line ESD arrays preserve signal integrity while providing IEC 61000-4-2 robustness, and are usually paired with line-terminating resistors and common-mode chokes.
• For Ethernet-based fieldbus ports, ultra-low capacitance ESD arrays in conjunction with transformer or integrated magnetics protect the PHY pins without violating impedance and return-loss limits for 100 Mbit and gigabit signalling.
• For panel HMI and service ports such as USB, dedicated high-speed USB ESD protection arrays and common-mode chokes at the connector side handle both contact discharge tests and real-world hot-plug events in noisy cabinets.
• For very long outdoor runs or exposed field wiring, hybrid surge protectors and gas-discharge tubes placed ahead of TVS stages provide additional energy handling where lightning or severe surges are expected.

Active EMI filters, SSC clock generators and high-CMTI isolators

Active devices help shape EMI at the source and control how switching noise crosses isolation boundaries. These components are usually considered after passive measures have been applied and residual test margins are understood.

• Active EMI filter controllers for AC–DC or PFC stages inject corrective currents to cancel line-conducted noise, particularly in the lower parts of the conducted EMI band where passive filters would become large. Device selection focuses on line-voltage range, phase configuration and supported switching-frequency bands.
• Spread-spectrum clock generator ICs and PLL blocks with configurable modulation depth and profile provide shared references for motion controllers, FPGAs and PHYs when narrowband radiated peaks from a fixed clock are difficult to suppress with layout alone.
• High-CMTI digital isolators and isolated gate drivers with specified common-mode transient immunity in the tens to hundreds of kilovolts per microsecond prevent switching events on the power stage from corrupting logic and feedback signals across isolation barriers.

Leakage current and EMI monitoring AFEs

Dedicated AFEs and current sensors monitor leakage paths and EMI-related currents to support safety standards and long-term predictive maintenance. These devices often connect to small current transformers, shunts or Rogowski coils inside the drive cabinet.

• Leakage-current monitoring AFEs track currents from the DC link or mains lines to protective earth and are used where standards call for continuous supervision rather than type testing alone; design choices include input bandwidth, resolution and isolation strategy.
• Wideband AFEs combined with clamp-on current probes or small antennas help capture repeatable EMI signatures on DC links, motor leads or cabinet walls, enabling firmware to log trends and correlate them with operating modes or ageing of filter components.

Other functional clusters such as fieldbus interfaces, power stages and sensing chains link back to this EMC Subsystem mapping when additional filter or protection components are needed. This avoids duplicating device-family descriptions and keeps EMC sourcing logic in a single, reusable location.

Design checklist: EMC for each interface

The EMC behaviour of a motion drive can be reviewed interface by interface: mains and three- phase inputs, DC links, motor leads, feedback channels, communication ports and 24 V I/O. This checklist groups the main EMC decisions by path and turns them into simple questions that can be answered during schematics and layout reviews or before EMC testing.

Each group focuses on common-mode and differential-mode filtering, surge and ESD protection, grounding and shield termination. When a question touches detailed control or measurement behaviour, the checklist points back to the relevant motion-control, sensing or communication page rather than repeating theory.

Mains and three-phase AC input

• Has a three-phase EMI filter or an equivalent combination of X/Y capacitors, CM chokes and DM inductors been selected for the target voltage and current class of the drive?
• Are the leakage current, safety approvals and impedance curves of the line filter compatible with the EMC standard category and installation class being targeted?
• Is the PE and enclosure bonding path from the line filter short, low impedance and clearly documented, without unintended loops or narrow bottlenecks?
• Has interaction between the line filter and any front-end PFC or LLC control loop been checked so that the filter does not introduce unwanted oscillations?

DC link between front-end PSU and inverter stages

• Does the DC link include a C–L–C or equivalent differential filter and DC choke sized for the maximum current and switching-frequency band of the inverter stages?
• Are RC snubbers and high-frequency capacitors placed close to switching nodes and wiring segments where ringing and high-frequency spikes are expected?
• Is the relationship between DC link filters, bulk capacitors and pre-charge elements clearly defined so that inrush and transient behaviour remain within limits during power-up?
• Have critical DC link points been measured with current clamps or near-field probes during prototype tests to verify that EMI spectra match expectations before formal compliance tests?

Motor leads, shields and grounding

• Are motor cable length, shielding type and routing aligned with the recommendations for the drive and motor combination, and with the assumed EMC test configuration?
• For long cables or higher power levels, has provision been made for a motor-side CM choke, dV/dt filter or sine filter to limit overvoltage and reduce common-mode currents?
• Are motor cable shields terminated with 360° contacts and bonded to the enclosure at entry points rather than via long pigtails?
• Are encoder and feedback cables kept physically separate from motor leads wherever possible and protected where proximity cannot be avoided?

Feedback: encoder, resolver, Hall and limit switches

• Does each feedback type have a matching TVS or ESD array with working voltage, clamping behaviour and capacitance appropriate to the signalling level and protocol?
• Are differential encoder pairs correctly terminated and laid out with controlled impedance, and are any added RC elements compatible with timing and jitter budgets defined on the encoder and interface pages?
• For analogue feedback and current or voltage sensing inputs, are RC or R–C–R filters dimensioned so that their cutoff frequencies support the required measurement bandwidths specified on the sensing pages?
• Are Hall and limit-switch signals routed away from gate-drive traces and motor leads, with clear reference-ground connections and optional filtering or debouncing where needed?

Industrial communications: EtherCAT, PROFINET, RS-485 and IO-Link

• Have common-mode chokes and low-capacitance ESD arrays been selected for each port according to line speed, connector type and protocol requirements?
• Are differential pairs routed over solid reference planes with controlled impedance and without long parallel runs next to high-current or high-dV/dt conductors?
• For RS-485 and IO-Link interfaces, do surge and EFT ratings of the protection network match the expected cable lengths and external environment?
• Have bit-error rate, link stability or error counters been observed under EMC stress conditions to confirm that the communication subsystem remains robust?

HMI, panel interfaces and 24 V I/O

• Are all panel-level connectors, including push-buttons, touch interfaces, USB and Ethernet jacks, protected by TVS or ESD elements placed close to the connector pins?
• Do 24 V outputs driving coils, valves and relays include suitable flyback paths, snubbers or protected smart drivers to limit voltage overshoot and emissions when loads switch?
• Is the power and ground relationship between the HMI sub-board and the main controller defined, with either shared reference or controlled isolation and a clear bonding point?
• For operator-exposed panels or medical or safety-related systems, have leakage and ESD performance been verified against the relevant standards?

24 V distribution and low-voltage rails

• Does the 24 V rail include an appropriate global LC filter at the supply output, and is its cutoff frequency high enough not to degrade system load-transient response?
• Do noisy modules such as gate drivers, digital I/O or switching converters use separate branches or added LC and ferrite-bead sections to keep their noise local?
• Are local decoupling networks on analogue AFEs, ADC rails and precision references arranged to minimise loop area and avoid sharing narrow return paths with pulsed loads?

Cabinet bonding and grounding overview

• Is there a clearly defined PE busbar or bonding point in the cabinet where enclosures, shields and protective earth conductors are brought together with short, wide connections?
• Are the connections between power-stage ground, control ground and measurement references documented in schematics and layout, with intentional star points or planes instead of accidental multiple loops?
• Are cable shields terminated at cabinet entries or designated bonding points, with a plan for avoiding unwanted ground loops in larger systems?
• Has a structured EMC design review been carried out that walks through mains, DC link, motor leads, feedback, communications and 24 V I/O using a checklist similar to this one, and are outcomes captured in design documentation?

FAQs: EMC planning for motion-drive cabinets

These questions summarise the EMC decisions made across this page: where to place mains and motor filters, how to protect encoder and communication links, how to coordinate DC-link filters with PFC or LLC stages, and how to keep shields, grounds and future extensions under control in a real cabinet.