What this page solves: why DC-side arc-fault detection matters

Long PV strings on rooftop, commercial and utility-scale systems operate at high DC voltage with many connectors, junction boxes and cable runs. Once a loose contact, aged insulation or damaged junction box evolves into a sustained DC arc, local temperatures can rise far beyond normal operating conditions and create a serious fire risk while the array continues to deliver power into the fault.

Traditional overcurrent and residual-current protection is not optimized for this type of fault. Arc current may sit only slightly above normal operating current and remain below breaker or fuse trip curves for a long time. Residual-current and insulation monitoring focuses on leakage and insulation resistance, not on high-frequency, non-linear signatures of a sustained DC discharge between conductors or at connectors and junction boxes.

This page focuses on how high-frequency feature AFEs combined with DSP or MCU-based classifiers can reveal dangerous DC arcs without sacrificing normal operating efficiency. The goal is to detect arcing signatures reliably on PV strings and feeders, distinguish them from inverter PWM and irradiance-driven power changes, and drive a coordinated shutdown path before the fault evolves into a fire or major asset loss.

Typical deployment scenarios include residential and commercial rooftops with long, exposed cable runs and many connectors, ground-mounted arrays with combiner boxes and long string feeds, and retrofit projects where arc-fault detection must be added to an existing PV array and inverter with minimal disruption.

Standards and scope for PV DC arc-fault detection

UL 1699B defines how a PV DC arc-fault protection function should perform under representative test conditions. The protection function must detect a defined set of dangerous DC arc conditions within a specified time window and cause the circuit to be interrupted, while remaining tolerant of normal operating noise and switching activity that should not lead to nuisance trips.

The PV DC environment differs significantly from residential AC branch circuits covered by UL 1699. On the DC side, long strings and feeders operate at hundreds of volts with inverter PWM, MPPT perturbations and irradiance changes shaping current waveforms. On AC branches, arc signatures sit on top of a 50 or 60 Hz fundamental with load switching behaviour. These differences in waveforms, noise sources and the absence of natural current zero crossings on DC strings mean that PV arc-fault detection cannot simply copy AC AFCI approaches and thresholds.

This page concentrates on arc-fault detection along the PV DC side, from module strings and homeruns into combiner boxes and onward to inverter DC terminals. AC branch AFCI functions in distribution panels and low-voltage building wiring, as well as generic low-voltage arc detection, are treated as separate topics. System-level rapid shutdown requirements define how and where DC must be physically disconnected, but the detailed design of module-level shutdown devices and string contactor arrangements belongs to a dedicated PV string safety page.

In this context, arc-fault detection is responsible for delivering a reliable detection signal based on high-frequency features, classification logic and trip criteria. Physical disconnection, rapid shutdown and grid protection functions consume this signal and implement the required isolation and safety actions.

Arc signatures versus nuisance sources: which features matter

PV DC strings operate in an electrically noisy environment. Inverter PWM, DC-link ripple, irradiance swings and mechanical motion all inject dynamics into current and voltage. Arc-fault detection therefore cannot rely on the presence of “some distortion” alone. The detection path must look for signatures that are specific to sustained DC arcs rather than simply flagging any departure from an ideal, flat DC waveform.

A sustained DC arc typically produces irregular high-frequency components and broadband noise riding on the DC operating level. Compared to structured PWM harmonics, the spectrum of an arc spreads over a wider band and shows more random variation in amplitude with time. In many cases a slower envelope can be observed as the arc path grows, contracts or partially extinguishes, causing a low-frequency modulation of the apparent noise level and of the average voltage and current delivered by the string or feeder.

Nuisance sources create signatures that may look similar if only a single feature is used. Inverter PWM and DC-link ripple produce strong energy at well-defined switching frequencies and harmonics that follow operating mode changes in a predictable way. Contactors, surge events and lightning coupling generate short-lived pulses and bursts rather than a sustained discharge. Wind, clouds, tracker motion and grid-side load steps mainly introduce slower power and current variations, with energy concentrated at lower frequencies even though some high-frequency content can appear at transition edges.

To separate sustained arcs from these nuisance sources, the AFE and sampling chain must cover a bandwidth that extends into the tens or hundreds of kilohertz, with ADC or sigma-delta sampling rates in a matching order of magnitude. Within that band, band-pass filtering, envelope detection, spectral energy ratios and time-frequency features can be applied to highlight broadband, irregular behaviour and characteristic modulations associated with DC arcs while suppressing structured PWM harmonics and isolated transient events.

System architectures for PV arc-fault detection

Arc-fault detection can be implemented at different points in the PV system. A purely inverter-side approach uses existing DC-link sensors and high-frequency sampling to infer arcs somewhere in the array. Combiner-box detection pushes AFEs and classifiers closer to the strings while reporting alarms upstream. Module or string-level detection embeds arc-awareness into optimizers or local controllers with the option to shut down individual sections directly.

Inverter-side detection offers the simplest retrofit path because it lives entirely inside the inverter and reuses DC-link current or voltage measurement. Detection logic integrates with existing protection and logging functions, but must cope with the fact that arc signatures are observed after propagation along long DC cables and are superimposed on the inverter’s own PWM noise. Sensitivity to small, localized arcs can be limited when only a single, centralized measurement point is available.

Combiner-box detection deploys arc-fault AFEs and a small MCU or DSP inside each combiner, monitoring the behaviour of multiple strings close to their junction. This reduces attenuation and mixing of high-frequency arc signatures and allows alarms to be associated with specific groups of strings. The combiner can share sensors or analogue front ends with surge monitoring, temperature and DC current measurement, while forwarding status over RS-485, Ethernet or dry contacts to the inverter and SCADA. Physical interruption may still be commanded by upstream DC switches or rapid shutdown devices rather than by the combiner itself.

Module or string-level architectures embed detection functions into optimizers, microinverters or dedicated string controllers. These provide the highest spatial resolution and can disconnect a single module or string rapidly, at the cost of additional electronics exposed to outdoor conditions and a more complex system architecture. This approach aligns naturally with module-level rapid shutdown concepts but is less suited to simple retrofits. The choice between centralized, combiner-level and distributed detection therefore balances sensitivity, system cost, wiring complexity and compatibility with existing PV assets.

High-frequency feature AFEs: sensors and analogue front ends

High-frequency arc-fault detection starts at the sensor. The chosen element must tolerate PV string voltage, cover the required current range and provide sufficient bandwidth to expose arc signatures without being dominated by inverter PWM or DC-link ripple. High-frequency current transformers, shunt resistors with wideband amplifiers, and Hall or TMR sensors each offer different combinations of bandwidth, insulation and mechanical integration that need to be matched to the array layout and retrofit constraints.

The analogue front end shapes the sensor signal into a form that an ADC or comparator can use. High-pass or band-pass filtering suppresses DC and slow irradiance or MPPT changes, concentrating on the tens to hundreds of kilohertz region where arc energy is more pronounced. Programmable gain allows one hardware design to span small rooftop systems and large utility arrays, while envelope detection and peak-hold circuits provide slow changing metrics that preserve arc intensity information without forcing the MCU or DSP to process every high-frequency sample in real time.

Multi-string installations raise the question of how many high-frequency channels to monitor. Time-multiplexed AFEs that share an ADC across several strings can reduce component count but shorten the effective observation window per channel and demand careful calibration. Dedicated AFEs and ADC channels per string or per small group of strings improve spatial resolution and make it easier to compare signatures, at the cost of more analogue routing and higher bill of materials. The chosen architecture directly influences the achievable detection sensitivity and the ability to localise which string is arcing.

Grounding, isolation and interference rejection must reflect the harsher environment seen by high-frequency paths. Insulation amplifiers or isolated sigma-delta converters can transport arc features from high-voltage domains into low-voltage controllers while resisting common-mode surges. Unlike the PV measurement and protection front ends that focus on DC accuracy and long-term drift, arc-fault AFEs prioritise usable bandwidth, noise floor, event capture and robustness against conducted and radiated disturbances. Typical IC roles include low-noise or high-speed amplifiers, programmable-gain stages, multi-channel SAR or sigma-delta ADCs, isolated amplifiers and precision references for both data conversion and comparator thresholds.

DSP and MCU classifiers with fast comparator paths

Once high-frequency features reach the digital domain, the classifier must decide whether the observed behaviour is consistent with a sustained DC arc or with normal operation and nuisance sources. Short-time RMS and energy metrics indicate whether high-frequency activity rises above the background level. Peak counts and crest factor reveal whether the waveform contains repeated sharp excursions rather than smooth PWM harmonics. Frequency-band energy ratios and simple pattern recognition help distinguish broadband, random arc noise from more structured inverter switching spectra and one-off surge events.

Time-window length and update rate are key design levers. Very short windows react quickly but tend to flag brief, benign disturbances, while long windows smooth noise at the cost of detection delay and potential underestimation of early arc activity. Overlapping windows with carefully chosen step sizes allow compliance with response-time targets while maintaining stability in the computed features. In practice, thresholds and window parameters often require tuning against real field data from representative arrays and inverter types rather than being fixed purely from simulation.

A fast hardware path complements the software classifier. By feeding an envelope or band-limited amplitude signal into a high-speed comparator, the system can assert a “suspected arc” flag within a very short time when energy in the arc band exceeds a preset threshold. Analogue integration or pulse counting around the comparator output can enforce a minimum activity duration before a hardware latch engages, reducing the risk of tripping on isolated spikes while still meeting stringent response-time constraints defined by arc-fault standards.

Coordination between classifier and fast path is essential. Under normal conditions, the MCU or DSP uses features, comparator activity and system context to decide whether to trip, derate or simply log an event. In exceptional situations where digital control is not available or timing margins are tight, the comparator and latch can assert a direct trip towards DC switches or rapid shutdown devices as a last line of defence. The arc-fault detection chain therefore behaves as a layered safety function that augments, rather than replaces, the inverter control core. It reuses ADC, sampling and processing resources where practical without duplicating the entire inverter control or grid-synchronisation algorithms covered in other pages.

Safety chain, fault latching and reporting after arc detection

Detecting a PV DC arc is only the first step. The safety chain must carry that information through to a reliable physical shutdown path without creating nuisance trips. Arc indicators from the analogue front end, fast comparator and MCU or DSP classifier are combined into trip signals that drive DC switches, eFuses, contactors or rapid-shutdown devices. Interfaces to the grid protection and interlock panel typically use dry contacts, industrial digital I/O or communication protocols, so arc detection can become one of several inputs into the broader protection and interlock scheme without duplicating its internal logic.

Fault latching and reset policies strongly influence field behaviour. Once a dangerous arc has been confirmed, the associated trip is normally latched to prevent repeated re-ignition as the system attempts to reclose the DC path. Power-up self-tests verify that sensors, references and processing are healthy before enabling detection and re-arming the safety chain. Reset can be provided locally through buttons, key switches or HMI workflows and, where permitted, remotely via SCADA commands with appropriate authentication and role-based access. Designs often apply stricter rules after repeated trips on the same string or feeder, forcing extended lockout until a physical inspection has been completed.

Event recording turns individual trips into actionable information. Each arc episode can be logged with a precise timestamp, the affected string or combiner, event type and a severity measure based on duration and current. Context such as irradiance range, inverter operating mode and grid conditions helps operators distinguish between isolated defects and systemic problems. Log entries are exported to SCADA or cloud platforms alongside other protection and status events, enabling fleet-wide analytics and correlation with maintenance records and environmental data.

Arc-fault logs can also feed into green energy metering and REC nodes. While metering pages handle accuracy, cryptographic signatures and trusted timestamps, the arc-detection chain supplies time-stamped safety events that show how the plant responded to abnormal conditions. This supports regulatory compliance, insurance investigations and long-term reliability reporting without overloading the arc-detection subsystem with billing-specific requirements that are better addressed elsewhere.

Application mini-stories: adapting arc detection to different PV sites

Residential rooftop systems usually have only a few strings but complex cable routing through roofs and lofts. Arc risk concentrates around connectors, roof penetrations and ageing junction boxes, while household loads inject a wide range of AC-side disturbances. These sites favour inverter-side arc detection that reuses DC-link sensors and adds a high-frequency AFE and classifier focused on rejecting nuisance signatures from appliances. The safety chain primarily uses internal DC switches and rapid-shutdown interfaces, with events reported through a home gateway so installers can diagnose issues remotely without repeated site visits.

Commercial rooftops and carports bring long DC strings, multiple combiners and a harsher electromagnetic environment created by motors, HVAC and EV charging. Placing high-frequency AFEs and small MCUs in each combiner cabinet lets the system monitor groups of strings closer to the source, improving sensitivity and localisation. Combiner-level arc indicators can be correlated with local surge and temperature monitoring, while inverter-side detection provides a second, global view. Trip signals may open combiner disconnects, upstream DC switches or rapid-shutdown devices, with latching policies tuned to minimise plant downtime while still forcing inspection after repeated trips on the same combiner section.

Utility-scale ground-mount plants combine hundreds of strings with long cable runs that are expensive to inspect. A layered architecture is often preferred: inverter-side detection for overall coverage, combiner detection for cabinet-level localisation and, in high-risk zones, module or string-level detection to protect assets near roads, buildings or environmentally sensitive areas. Arc trips integrate with substation protection and interlock panels to isolate affected DC segments while keeping healthy portions of the plant online. Detailed arc logs sent to SCADA and REC nodes provide evidence of safe behaviour for regulators, insurers and long-term performance contracts.

Hybrid plants with storage and microgrid controllers add another dimension. Here, PV arc detection must feed not only DC switches and rapid-shutdown devices but also the microgrid EMS. When PV capacity is suddenly reduced by an arc trip, the EMS needs timely, structured event data to ramp storage, adjust other generation or shed load so islanded operation remains stable. The arc-detection subsystem therefore exposes trip and alarm events over secure, time-synchronised links, while the EMS and renewables-in-microgrid pages define how those inputs are used in dispatch, black start and reconnection strategies.

Design checklist and IC roles for PV DC arc-fault detection

This section provides a compact checklist to review a PV arc-fault detection design before lab tests or field rollout. Items focus on where arc signatures are observed, whether the analogue and digital chains can capture them, how thresholds balance false and missed trips, and how the safety chain behaves under normal operation, arc events and self-test failures. Each line can be traced back to earlier sections on architectures, high-frequency AFEs, classifiers, safety paths and application-specific strategies.

IC roles are grouped into three blocks: sensors and AFEs that extract high-frequency signatures from strings, combiners and inverter DC terminals; digital processing devices that run classifiers, manage timing and store events; and safety-chain components that translate arc decisions into decisive shutdown and reporting actions. Vendor- or device-specific choices belong in separate selection guides. Here the focus stays on functional slots and the performance traits that matter for robust arc-fault detection in rooftop, C&I and utility PV systems.

FAQs on PV DC arc-fault detection

This FAQ section groups common design and deployment questions around PV DC arc-fault detection. Answers focus on when UL 1699B-class detection is justified, how arc sensing differs from conventional protection, and how to architect AFEs, classifiers, safety chains and communication links so systems remain safe and serviceable across residential, C&I and utility-scale plants.

When does UL 1699B-class PV DC arc-fault detection really pay off in terms of system size and DC voltage level?

Arc-fault detection delivers the most benefit once DC voltage rises into string-level ranges and cable runs become long, complex and hard to inspect. Rooftop, C&I and utility-scale fields with hundreds of connectors, rooftop penetrations and combiner cabinets gain fire-risk reduction and regulatory compliance that outweigh added BOM and qualification effort.

Why are DC breakers and fuses alone unable to reliably detect and clear series arc faults between PV strings or connectors?

Series arcs often draw current similar to normal operation, especially under partial shading, so breakers and fuses do not always see a clear over-current condition. Thermal overload curves are slow, while arcs can ignite nearby materials quickly. Dedicated arc detection looks for high-frequency signatures and patterns that conventional over-current devices never observe.

What are the key bandwidth and loss trade-offs between using shunt resistors and current transformers for PV arc-signature sensing?

Shunt-based sensing is simple and can share hardware with DC metering but introduces power loss, thermal drift and layout constraints. Current transformers add insulation and very low insertion loss, yet mainly sense AC components and require careful burden and bandwidth design. High-frequency behaviour, saturation and available headroom drive the final choice.

How can an engineer distinguish inverter PWM noise and normal switching artefacts from true high-frequency PV arc signatures?

Inverter PWM noise has structured harmonics tied to switching frequency and control modes, while arcs produce broadband, irregular bursts and changing envelopes. Band-pass filters, time–frequency features, short-time RMS metrics and pattern-recognition classifiers help separate repeatable switching artefacts from stochastic events. Laboratory recordings under representative loads are essential to tune discrimination thresholds.

If a DC surge or lightning monitor is already present, under what conditions can its hardware be extended to support arc-fault detection, and where are the limits?

Surge monitors excel at capturing single impulsive events with peak-hold or energy-estimation circuits. Arc detection needs continuous observation of sustained high-frequency content and temporal patterns. Shared sensors or front-end networks are possible, but arc-specific bandwidth, gain and sampling must be added, and algorithms must distinguish isolated surges from ongoing discharge.

How do PV arc-fault detection architectures differ between residential rooftop, C&I rooftop or carport, and utility-scale ground-mount plants?

Residential rooftop systems often rely on inverter-side detection with strong nuisance rejection, because string counts are modest but cable routing is complex. C&I rooftops and carports benefit from combiner-level AFEs and local MCUs. Utility-scale fields typically layer inverter, combiner and sometimes string-level detection to balance coverage, localisation and cost.

How can multi-level alarms and graded responses be used to avoid shutting down an entire PV field on every suspected arc event?

A graded strategy typically flags suspected events first, logs additional context and raises alarms without immediately opening DC paths. Confirmed arc signatures then trigger latching trips on affected strings, combiners or inverters. Repeated events in the same area can escalate to extended lockout, while healthy sections remain online, preserving energy yield and limiting maintenance visits.

What are practical options for retrofitting PV arc-fault detection into existing plants without changing the inverter main controller firmware?

Retrofit designs often place dedicated arc-detection modules at combiner or string level, using local AFEs, MCUs and fast comparators. Trip outputs connect to existing DC breakers, rapid-shutdown devices or inverter alarm inputs via dry contacts or simple fieldbuses. This approach preserves certified inverter firmware while still delivering detection, latching and event logging capabilities.

What reliability and latency requirements should be applied to RS-485, Ethernet or wireless links that carry arc events and trip commands?

Life-safety trips should never depend solely on remote links, so local hardware paths must clear dangerous arcs even if communication fails. RS-485, Ethernet or wireless channels primarily carry events, status and controlled reset commands. Requirements focus on bounded latency, robust retry and authentication, and clear timeouts so stale commands cannot trigger unexpected actions.

How should PV DC arc-fault detection be partitioned versus rapid-shutdown functions so that detection and shutdown stay coordinated but not redundant?

Arc-fault detection is responsible for recognising dangerous discharge patterns and issuing electrical trip or rapid-shutdown requests. Rapid-shutdown hardware implements code-driven voltage reduction and isolation near modules or arrays. Clear partitioning lets shutdown devices respond to arc, grid, firefighter or manual commands, while the detector concentrates on robust sensing, classification and trip integrity.

How can factory and on-site testing be structured to validate and periodically retrain PV arc-detection algorithms across different inverters and noise environments?

A robust programme combines factory tests using controlled arc fixtures, simulated nuisance sources and parameter sweeps with on-site logging of real disturbances and rare events. Recorded waveforms feed offline analysis and periodic threshold or model updates. Carefully managed firmware releases then push improvements fleet-wide, while regression suites ensure that sensitivity gains do not introduce new false-trip modes.

When does a PV arc-fault detection design truly require an FPGA or high-performance DSP instead of a simpler MCU-based classifier?

High-channel-count systems with wideband sampling, tight latency budgets and complex feature extraction pipelines may exceed the deterministic capacity of a general-purpose MCU. FPGAs and high-performance DSPs become attractive when dozens of strings are processed in parallel, strict synchronisation with inverter control is required, or safety certification demands hard partitioning between protection and non-safety-related software.