What this page solves

This page focuses on digital PSU controllers with PMBus or SMBus interfaces in multi-stage power systems that combine PFC, LLC or other main converters, synchronous rectifiers and downstream rails. In many legacy platforms, every stage is governed by analog controllers and fixed resistor networks, so every new SKU, change of output voltage or current limit, and every field issue translates into manual retuning and repetitive hardware changes.

In data centers, telecom shelves and industrial cabinets, operators now expect remote configuration, profile-based behaviour and traceable fault histories. Cold or hot redundancy, current sharing modes, peak power windows and thermal derating policies need to be adjusted at the rack or system level, not by turning trimmers inside each PSU. Without a uniform PMBus or SMBus telemetry layer, production calibration, system bring-up and field debugging remain slow, manual and hard to reproduce.

A digital PSU controller gathers multiple PWM channels and current or voltage loops into a single SoC or MCU, with control coefficients and operating limits stored as parameter tables in non-volatile memory. Profiles can be downloaded over PMBus, allowing one hardware platform to support multiple output variants or derating policies. Comprehensive telemetry for input and output voltages, currents, temperatures and status words, combined with event and fault logs, gives data that is usable for both fleet monitoring and return-material analysis.

The scope of this page is limited to the controller itself, its digital control loops and the PMBus or SMBus layer. Magnetics design, detailed PFC or LLC topologies, GaN gate driving and hardware protection circuits are covered in their dedicated pages within the Power Supplies & Adapters topic.

System role & interfaces in a PSU

A digital PSU controller sits at the centre of a multi-stage power supply. Upstream it behaves as a PMBus or SMBus slave to a system host such as a backplane controller or server BMC. Downstream it drives PWM signals for PFC, main DC-DC stages, synchronous rectifiers and cooling actuators, while monitoring current, voltage and temperature sensing channels that are conditioned by dedicated measurement front-ends and reference circuits.

On the analog side, the controller receives shunt or INA based current feedback, scaled voltage sense inputs and multiple temperature sensors. Comparator outputs for over-voltage or over-current, power-good pins and external fault lines arrive as digital inputs that can trigger fast protection responses or fault logging. On the drive side, the controller provides high-resolution PWM outputs for the PFC and main converter, timing-aligned signals or mode pins for synchronous rectification, and programmable duty profiles for fans or pumps.

The PMBus or SMBus interface exposes configuration registers, parameter tables and telemetry to the host. It allows the system to read voltages, currents, temperatures, power, status words and event logs, and to apply controlled changes to output set points, power limits or derating policies. Addressing, bus speed and timeout behaviour must be chosen so that several PSUs can share a common bus without compromising system-wide robustness.

In parallel, the controller exchanges signals with power sequencing and supervisor devices that enforce global start-up, shut-down and hold-up behaviour. Critical last-resort protections, such as hard short-circuit cut-off or brown-out reset, remain in hardware so that the power system can enter a safe state even if firmware is not responsive. The digital PSU controller then augments this hardware layer by coordinating multi-stage control and providing observability over PMBus.

Digital control architecture & loop partitioning

Digital PSU controllers can be deployed as full digital controllers, hybrid supervisors around existing analog controllers or as higher level coordinators around external PFC stages. In a full digital architecture, both voltage and current loops for PFC and main converters run in the controller’s DSP or MCU, with ADC or ΣΔ inputs feeding directly into high speed control interrupts. In hybrid schemes, fast inner current loops remain in dedicated analog controllers, while the digital controller adjusts references, limits and soft-start profiles and adds PMBus observability.

In many platforms an external PFC controller remains in place while the digital PSU controller takes ownership of the main DC-DC stage, synchronous rectifiers and thermal or power management. PFC telemetry and status are read over sense lines or digital pins, and the PFC stage is enabled, disabled or power limited through a small set of control signals. Clarifying up front which stages are under direct digital control and which remain analog is critical to correctly size processing, memory and interface resources in the chosen controller.

Once the architecture is chosen, control loops can be partitioned according to their required bandwidth and latency budgets. The main output voltage loop and any digitally implemented inner current loops typically execute inside a fast interrupt tied to the PWM cycle. Current sharing loops across multiple PSUs, input power limiting and coordination across redundant modules are slower and well suited to background tasks. Thermal derating loops operate at even lower bandwidths, filtering temperatures and gradually adjusting current or power limits over many control periods.

The timing relationship between PWM edges, ADC sampling and computation strongly affects achievable loop bandwidth. Sampling must be aligned to stable regions within the PWM cycle, avoiding switching edges and high di/dt intervals. End-to-end delay from sampling through computation to PWM register update reduces phase margin, especially for high bandwidth current loops. Valley switching and zero current or zero voltage detection are often handled by dedicated hardware comparators and state machines, with only mode and limit decisions managed in firmware.

Multi-PWM channels & multi-rail current loops

A single digital PSU controller is often responsible for several power stages and actuators: the PFC stage, a main DC-DC converter, synchronous rectifiers, auxiliary buck converters and multiple fan or pump outputs. Each of these channels has different demands on PWM resolution, dead time control and frequency or phase relationships. The controller must generate clean, synchronized waveforms while still leaving processing headroom for measurement, protection and PMBus transactions.

On the measurement side, multiple current and voltage sense points compete for limited ADC or ΣΔ interfaces. High priority channels such as PFC inductor currents, main output current and main output voltage need tightly synchronized sampling every switching period or every few periods. Secondary rails, auxiliary outputs and some temperature channels can be updated at lower rates. An effective scheduling scheme classifies each measurement by required bandwidth and assigns sampling windows that avoid switching noise and align with PWM timing.

Multi-rail current loop strategies generally combine a tightly regulated primary output with cross-regulation compensation and coordinated current limiting across all rails. The digital controller enforces per-rail over-current thresholds while also enforcing a total power or total current envelope for the entire PSU. As thermal derating or limited input conditions tighten available headroom, non-critical rails can be limited or shed first, while the main output is kept within its guaranteed range whenever possible.

These functional requirements map directly into IC selection criteria. The controller must offer enough PWM channels for PFC, main conversion stages, synchronous rectifiers, auxiliary converters and cooling outputs, with suitable resolution and phase control. ADC resources and any ΣΔ interfaces need to cover all critical current and voltage points without exceeding processing budgets. On top of that, dedicated PFC or LLC state machines, fast comparators and sufficient non-volatile memory for parameter tables can significantly ease implementation of robust multi-rail control schemes.

PMBus/SMBus param tables & remote configuration

A digital PSU controller turns voltage, current, temperature and timing settings into a remote parameter table that can be written and verified over PMBus or SMBus. Factory defaults define a safe operating envelope at shipment, while site-specific profiles adjust output voltage, current limits, thermal thresholds and cooling curves to match rack or cabinet policies. Multiple profiles can be stored so that the same hardware can be switched between normal, high-ambient and backup modes without changing the BOM.

PMBus commands fall into configuration, monitoring and control categories. Configuration commands set targets such as output voltage, over-current limits, power caps, temperature thresholds and fault responses. Monitoring commands read back voltages, currents, temperatures, power estimates and status words that summarise warning and fault bits. Control commands turn rails on or off, exercise margining and initiate store or recall operations between the working register map and non-volatile memory.

In practice, the controller uses a shadow RAM image of all active parameters while keeping one or more profiles in internal NVM or external EEPROM. At power-up, the chosen profile is copied from NVM into shadow RAM, basic range checks are applied and only then are control loops enabled. During operation, the host can tune parameters in RAM for evaluation and commit them to NVM once stability and margins have been verified. This separation makes it possible to roll back to a known good profile if a configuration proves unsuitable.

Remote configuration must respect both stability and safety constraints. Large changes to voltage or current limits are normally applied with internal slew-rate control so that loops adjust smoothly instead of seeing abrupt set-point jumps. Some parameters, such as maximum PFC output voltage or primary current limits, are only allowed to change when outputs are disabled or operating at low load. In addition, the controller enforces hard bounds on critical settings and separates factory-level commands from field-level commands so that a PSU cannot be driven beyond its safe operating area through PMBus.

Telemetry, fault handling and black-box logging

Telemetry from a digital PSU controller turns a power supply into an observable subsystem that a cabinet controller or BMC can supervise in real time. Voltages, currents, power, temperatures and status words are read periodically over PMBus to support rack-level power budgeting, derating policies and redundancy management. Over time, trends in fan duty, hotspot temperatures or power factor highlight ageing components and cooling degradation, enabling predictive maintenance instead of reactive replacement.

Fault handling starts with detection of events such as over-voltage, over-current, short-circuit, over-temperature, fan failure and communication errors. Hardware comparators and protection devices provide fast trip signals, while the digital controller interprets these inputs together with measured telemetry and the current parameter profile. Depending on severity, the response may be a controlled shutdown, hiccup-mode restart, latch-off or power derating that keeps key loads alive while limiting stress on components.

To support root-cause analysis, the controller maintains a compact event log that records time stamps, fault sources and snapshots of key telemetry values. This black-box log is typically stored in non-volatile memory or in an external EEPROM as a ring buffer, preserving the most recent set of high-value events even after loss of power. RMA and field application teams can read back these records over PMBus to distinguish between sustained overloads, inadequate cooling and rare external faults.

PMBus status and fault reporting expose this internal state to the system host through status words, warning bits and dedicated alert lines. Hosts that rely on polling can read these registers at regular intervals, while high-availability designs often route a combined alert pin to trigger immediate reads when new events are logged. Hardware-level protection devices such as surge clamps, eFuses and hot-swap controllers still enforce last-resort safety; the digital PSU controller coordinates responses, logs context and communicates events upstream.

Firmware partitioning, NVM & safety considerations

A robust digital PSU controller separates its firmware into a protected bootloader and an application image. The bootloader verifies integrity at power-up, decides which image to start and exposes a controlled update path over PMBus or SMBus. The application implements control loops, telemetry, fault logic and parameter handling. During firmware updates, new images are received in a staging area, checked for length, version and CRC or signature, and only then committed, with a fallback to the last known good image if validation fails.

Watchdogs and fail-safe modes ensure that unexpected firmware behaviour cannot leave outputs in a hazardous state. If the application stops servicing the watchdog, the controller disables PWM or moves into a defined safe output condition before returning control to the bootloader. Hardware protection paths for over-voltage, over-current and short-circuit remain active at all times and do not rely on firmware timing, so that destructive faults are contained even if the digital control path is unavailable.

Non-volatile memory is partitioned into parameter storage, firmware images and optional event logs. Parameter regions hold one or more profiles for voltage, current limits, thermal thresholds and fault responses, while log regions capture high-value fault records for later analysis. Write frequency must respect endurance limits, so controllers typically cache configuration in RAM, apply wear-levelling and restrict NVM commits to explicit store operations or rare events such as factory calibration and profile finalisation.

Safety standards for medical, industrial or data-center PSUs emphasise software integrity and independence between control and protection functions. A digital PSU controller can support these goals through secure update mechanisms, image authentication, brown-out and clock monitoring, and by exposing clear status for firmware versions and error causes. Independent hardware protection and supervisory circuits provide a second line of defence so that, even if a software defect occurs, the supply remains within its defined safe operating area.

Design checklist & IC role mapping for digital PSU controllers

Selecting a digital PSU controller begins with a clear understanding of system demands. Required PWM channels span PFC, main converters, synchronous rectifiers, auxiliary rails and cooling outputs, while telemetry points cover input and output voltages, currents, power and multiple temperature locations. Additional requirements such as multi-PSU current sharing, N+1 redundancy and coordinated start-up sequences further shape the needed control and communication features.

On the controller side, ADC resolution and sampling speed must support the desired loop bandwidths and noise performance, with options for synchronous sampling and ΣΔ interfaces where precision is critical. PWM generators need fine duty-cycle and dead-time control, flexible phase relationships and hooks for valley detection or zero-current detection in resonant or CRM stages. Integrated amplifiers, comparators and reference sources must meet accuracy and drift requirements so that sensed values and thresholds reflect true operating conditions.

PMBus capability determines how easily the PSU can be configured, monitored and managed at system level. Support for a wide core command set, adequate bus speed, timely telemetry refresh and features such as password protection, command access levels and alert signalling all contribute to safe integration in racks and cabinets. Reliability metrics—including operating temperature range, ESD robustness, NVM endurance, watchdog behaviour and brown-out handling—complete the picture when assessing devices for long-life deployments.

Different IC families occupy distinct roles in digital PSU designs. Dedicated digital PFC and LLC combo controllers integrate specialised state machines and analog front ends for high-efficiency front-end stages. Pure digital power controllers focus on PWM generation, telemetry and PMBus interfaces while relying on external gate drivers for high-current stages. At the high end, general-purpose SoCs or MCUs combined with PMBus transceivers and external ADC or PWM peripherals enable deeply customised control schemes where firmware defines most of the behaviour.

Application mini-stories (server, telecom, industrial PSU)

Digital PSU controller & PMBus – FAQs

This FAQ highlights when digital PMBus controllers bring value, how to partition loops and resources, and which parameters, telemetry and safety mechanisms matter most when deploying digital PSUs in server, telecom and industrial systems.