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Residual / Leakage Detection for EV High-Voltage Systems

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This page is where I pull together everything I need to plan residual and leakage detection in an EV high-voltage system – where to place it, which sensing path to use, how to set thresholds and response times, and how to choose ICs and PCB details so the function is safe, diagnosable and easy to source.

What is Residual / Leakage Detection in an EV HV System?

In an EV high-voltage system, residual current is the difference between the current that leaves the source and the current that returns. If some of that current finds an unintended path through the vehicle body, cables or the environment, it becomes leakage current. Residual and leakage detection makes these unwanted currents visible so they can trigger a safe shutdown.

AC residual current is typically associated with mains-frequency and harmonic components flowing from line to protective earth or chassis, while DC leakage current is more related to steady or slowly varying currents from the HV DC rails to the vehicle body. Many real systems contain a mix of AC and DC components, so the sensing solution must match the expected waveform and magnitude.

On-board chargers and EV supply equipment are usually designed to comply with standards such as IEC 62752 and IEC 62955 on top of the more general IEC 61851 framework. These documents define trip thresholds, frequency bands and response times for residual and leakage currents, and they strongly influence how you select the sensing topology, AFEs and safety logic on this page.

This page focuses on current-based residual and leakage detection, where CTs, Hall sensors or shunt-based AFEs measure the unwanted current directly. If you need to analyse insulation resistance and impedance-based monitoring in detail, you can complement this topic with a separate Insulation Monitoring Device (IMD) page.

Conceptual view of residual and leakage current in an EV high-voltage system Block-style diagram showing a high-voltage source, outgoing and returning current, a difference current forming residual current, and an unintended leakage path to vehicle chassis, highlighting AC and DC components. Residual vs leakage current HV source Intended load inverter, OBC, etc. Residual current sensor Iresidual = Iout − Ireturn Vehicle chassis / earth reference Leakage path to chassis / earth AC residual: mains and harmonics detected by zero-sequence CT DC leakage: steady or slow currents measured by Hall or AFE

Where Residual / Leakage Detection Sits in the HV Energy Backbone

Residual and leakage detection is not a single part sitting in isolation. It is woven into your HV energy backbone wherever a dangerous current could flow from high-voltage conductors into the vehicle body, ground or user-accessible parts. Typical deployment points include the AC inlet and on-board charger, the DC link and pack shell, and sometimes the high-voltage junction box inside the vehicle.

On the AC charging side, a zero-sequence CT around the line and neutral conductors near the EV inlet or OBC input detects residual AC current leaving the intended path. In the DC path, leakage detectors monitor current from the HV DC rails to the pack enclosure or chassis, especially in DC fast-charge and internal HV distribution. In some architectures, additional sensors inside the BJB / HV junction box supervise branch circuits that are exposed to harsh environments or long cable runs.

This page covers the parts of the backbone where leakage is detected via current sensing: CTs, Hall sensors or shunt-based AFEs plus comparators and isolation links. An insulation monitoring device (IMD) that injects a signal and measures insulation impedance is usually present in the same HV network, but it belongs to a dedicated topic and page. In the system diagrams below, IMDs are drawn with dashed outlines and referenced as “see Insulation Monitoring Device page” so you can keep both roles visually connected without mixing the design rules.

Residual and leakage detection placements around OBC, DC link and HV distribution Block diagram showing an AC inlet and on-board charger on the left, a high-voltage bus and junction box in the centre, and a battery pack with DC fast charge interface on the right. Residual and leakage current sensors are drawn at key points with a dashed-box IMD connected to the same HV network. Leakage detection along the HV backbone AC inlet & OBC AC inlet On-board charger (OBC) CT AC residual at inlet HV bus & BJB HV DC link BJB / HV junction box sensor DC leakage to chassis Pack & DC fast charge HV pack DC fast charge leakage Pack shell / DC leakage Common chassis / earth reference for leakage detection IMD (insulation monitoring device) see dedicated IMD page

Sensing Technologies for Residual / Leakage Current

Once the need for residual and leakage detection is clear, the next question is which sensing technology actually fits your EV project. The choice depends on whether your risk is dominated by AC mains and harmonics, slow DC leakage, mixed waveforms or cost and integration constraints. In practice, most designs end up using a small number of well-proven options: zero-sequence current transformers, Hall-based leakage sensors, shunt plus differential AFEs, or dedicated residual current monitor ICs.

Zero-sequence and differential CTs are the classic solution for AC residual current at the inlet of an OBC or EVSE. They have excellent bandwidth for mains and harmonic content and introduce no insertion loss, but they are inherently blind to pure DC. If the standard requires response to DC components, you need a suitable RDC-DD variant and must pay attention to CT saturation, burden selection, rated residual current range, bandwidth and insulation strength.

Hall-effect leakage sensors extend coverage into the DC region and are often used on DC links and pack shells where DC leakage is a major concern. They can sense a mix of AC and DC but bring their own design challenges: offset and drift over temperature, noise, finite bandwidth and sensitivity to common-mode disturbances. A clean layout, proper filtering and calibration strategy decide whether a Hall-based solution is robust enough for the intended safety function.

Shunt plus differential AFE approaches are attractive when integration, cost or diagnostics drive you toward a more flexible solution. They let you combine precise gain, filtering and digital conversion, but at low leakage levels the design is constrained by microvolt-level offset and noise, CMRR limits and high dv/dt stress from nearby power stages. Getting the RC network and AFE bandwidth right is key to avoiding both missed trips and nuisance trips.

When standards compliance and response behavior must be tightly controlled, dedicated residual current monitor ICs can consolidate the AFE, digital filtering, comparators and sometimes built-in self-test into a single device. These parts are usually designed with IEC residual and leakage requirements in mind and can simplify safety assessment, at the cost of less flexibility and a heavier reliance on device-specific capabilities. The overview below links each sensing technology to the use cases where it tends to work best.

Sensing technologies versus use cases for residual and leakage current Matrix-style diagram with sensing technologies on the vertical axis and EV high-voltage use cases on the horizontal axis, showing where CT, Hall, shunt plus AFE and dedicated residual current monitor ICs are commonly applied. Sensing options vs use cases AC inlet DC link BJB / branch DC fast charge CT (zero-sequence / differential) Hall leakage sensor Shunt + diff AFE Dedicated RCM IC primary choice often used AC bias harmonics inlet RCD mixed DC shell compact low-power EVSE DCFC

Trip Thresholds, Frequency Bands and Response Time

Selecting a sensing technology is only half of the job. Residual and leakage detection has to trip at the right current, in the right frequency band and within a defined time window, otherwise the safety function is either ineffective or constantly generating nuisance alarms. Instead of starting from standard paragraphs, it is more practical to start from a few engineering questions: how many milliamps or amps must I detect, what waveforms do I expect and how fast must the system react?

The trip threshold defines the leakage level at which your system must enter a safe state. For AC residual protection near the inlet, thresholds are often in the tens of milliamps range, while DC leakage protection deeper in the HV network may use different limits. These thresholds translate directly into the required sensitivity, noise floor and usable dynamic range of your CT, Hall or shunt plus AFE chain.

The frequency content determines how wide your detection bandwidth must be. Mains-frequency and low-order harmonics require a clean low-frequency response, whereas inverter-related ripple and EMI must be suppressed enough to prevent false trips. DC leakage and slowly varying currents stress the offset, drift and low-frequency linearity of the AFE. In practice, you end up trading bandwidth against noise and dv/dt immunity.

Finally, response time ties the sensing chain to contactor dynamics and the overall functional safety concept. Fast paths built around comparators and well-defined filters can react in a few milliseconds, while MCU-based processing may add latency but enables more advanced discrimination. The faster you trip, the more carefully you must control noise and transients to avoid nuisance trips, especially in harsh EMC conditions.

Once the required leakage level, frequency band and response time are mapped out, they become concrete requirements for your AFEs, filters, comparators and isolation links. The cheat sheet below visualises how AC residual protection, DC leakage protection and nuisance trip regions occupy different parts of the leakage-versus-time plane.

Trip planning cheat sheet for leakage level versus response time Two-dimensional plot with leakage current level on the horizontal axis and response time on the vertical axis, highlighting AC residual protection, DC leakage protection and nuisance trip regions used in EV high-voltage safety planning. Trip planning cheat sheet Leakage current level (mA → A) Response time (µs → s) low mA tens of mA hundreds of mA amp-level seconds hundreds of ms tens of ms ms range µs range AC residual protection zone DC leakage protection zone Nuisance trip area How to read this chart • Blue: AC residual trip targets • Green: DC leakage trip targets • Red: too fast / too low,   likely nuisance trips

Residual / Leakage Detection Signal Chain Architectures

Choosing a sensing technology and planning thresholds is only useful if the signal chain can support them. In an EV high-voltage system, residual and leakage detection typically follows one of three patterns. A fast analog path uses CT or Hall sensors, an analog AFE and a threshold comparator that drives safety logic directly. A more flexible digital path adds a sigma-delta or precision ADC and lets the MCU or DSP implement thresholds and filtering. In larger programs, a dedicated residual current monitor IC can integrate most of the front-end and hand a clean status signal to the safety MCU.

In the CT or Hall plus analog comparator architecture, the focus is on fast and predictable reaction. The sensor and AFE provide the required gain and filtering, while a hardware comparator enforces the trip threshold and latching. The safety MCU mainly records events and coordinates system actions. This approach gives you millisecond-level response times and a clear hardware safety path, but self-test and diagnostics for the sensor, AFE and comparator must be designed explicitly.

In the CT or shunt plus sigma-delta or ADC architecture, the leakage signal is digitised and processed by an MCU or DSP. This enables digital filtering, waveform capture and adaptive thresholds that can be tuned over the vehicle life. It is attractive when you need rich diagnostics or want to distinguish true leakage from noisy conditions. However, the overall response time and safety case now depend on software execution, scheduling, watchdog concepts and how well the safety-related code is verified.

A dedicated residual current monitor IC can wrap most of the analog front-end, filtering, comparators and even test injection into a single device, often with behavior tailored to IEC residual and leakage requirements. The safety MCU then focuses on reading status, logging events and coordinating contactor control. This simplifies system integration and safety assessment, at the cost of reduced flexibility and a stronger dependency on a specific IC family. The block diagram below highlights how each architecture partitions work between sensors, AFEs, the MCU and a possible dedicated RCM IC.

Signal chain architectures for residual and leakage detection in EV high-voltage systems Block diagram showing three signal chain options for residual and leakage detection: a fast analog path using CT or Hall sensors, an ADC-based digital path using an MCU or DSP, and a dedicated residual current monitor IC feeding a safety MCU that drives contactor and BDU logic. Leakage detection signal chain options Sensors AFEs, ADC and comparators MCU and safety logic CT sensor Hall sensor Shunt based leakage sense Analog AFE gain and filter Comparator fast trip Sigma-delta or ADC Digital filter and thresholds Can be integrated inside a dedicated RCM IC Safety MCU logging and coordination Safety logic and BDU contactor control Fast analog path: sensor → AFE → comparator → safety logic Digital path: sensor → AFE / ADC → MCU thresholds

Built-In Self-Test, Diagnostics and Functional Safety Hooks

A leakage detection chain is only useful if you can trust it. Built-in self-test and diagnostics are needed to prove that the sensor, AFE, ADC and comparators are still working and that the trip path has not silently failed. In a safety-rated EV program, you typically combine a power-on self-test with periodic tests during operation and simple plausibility checks that run continuously in the background.

On the sensor side, a common approach is to inject a known test signal. For CT-based solutions, this can be a dedicated test coil that drives a small AC current, allowing the system to verify gain, polarity and saturation margins. Hall and shunt-based designs can use internal bias current sources or DAC-driven test voltages to check the AFE and conversion path. If the measured response falls outside a defined window, the safety MCU can flag a diagnostic fault instead of waiting for a real leakage event.

Around the AFE, ADC and comparator, self-test and monitoring focus on offset, saturation and stuck outputs. Periodically checking for unrealistic DC offsets, codes stuck at full scale or comparator outputs that never toggle helps to catch open circuits, short circuits and internal failures. Some dedicated residual current monitor ICs provide built-in test modes and status flags for these conditions, which can simplify the safety analysis compared with a fully discrete implementation.

From a functional safety perspective, each test mechanism contributes to diagnostic coverage and must be mapped to the faults it can detect. Power-on tests are good at finding manufacturing or latent faults before the HV system is armed, while periodic tests and runtime monitors help control residual and latent faults during driving or charging. The safety concept then defines which faults require an immediate safe state and which can be handled through controlled degradation or delayed service actions.

For leakage detection specifically, the chain usually ends at a request to open contactors or block new HV activations. The detailed weld-detection logic, contactor redundancy and HV energy backbone reconfiguration are handled on a dedicated BDU and contactor weld detection page, so this section stays focused on how the leakage sensing path proves its own integrity and delivers trustworthy trip and diagnostic signals to the rest of the safety architecture.

Self-test, diagnostics and functional safety hooks around the leakage detection signal chain Block diagram showing a leakage detection signal chain from sensors to AFEs and MCU, with test injection, comparator monitoring, ADC range checks and safety hooks toward the BDU and contactor control. Self-test, diagnostics and safety hooks Leakage detection signal chain Sensors CT / Hall / shunt AFE / ADC gain and conversion Thresholds comparator or digital Test coil / injection source Offset and saturation monitoring Stuck output diagnostics Safety processing and HV control Safety MCU trip and diagnostics BDU and contactor control trip and flags Power-on test before HV is enabled Periodic test during driving and charging Fault classification safe, residual, latent

IC Selection Map: AFEs, Monitors and Isolation Links

Once the signal chain architecture is clear, the next step is to translate it into concrete IC types that I can put on a sourcing list. For residual and leakage detection in an EV HV system, I usually split the problem into a small number of functional blocks: low-noise differential or isolated amplifiers, sigma-delta modulators and precision ADCs, comparators with well-defined thresholds and latching behavior, dedicated residual current monitor ICs, and the isolation links and power supplies that connect everything to the rest of the vehicle electronics.

Low-noise differential and isolated amplifiers form the front-end for shunt and CT-based leakage sensing. They must handle small signals on top of noisy HV environments, so I look for high gain accuracy, low offset and drift, good CMRR and sufficient bandwidth across the expected leakage spectrum. When the sense element is on the high-voltage side, isolated amplifiers or isolated modulators with defined isolation ratings and creepage distances become the starting point for the architecture.

Sigma-delta modulators and precision ADCs are the backbone of digital leakage detection paths. They convert the analog leakage signal into a bitstream or code that a microcontroller or DSP can filter and evaluate. Here I care about effective number of bits, input bandwidth, noise, latency and how the digital interface lines up with my safety MCU. For fast, hard-wired reactions, I add precision comparators with latching outputs, focusing on threshold accuracy, propagation delay, hysteresis options and whether the device supports wired-OR or open-drain outputs into a safety monitor.

Dedicated residual current monitor ICs combine many of these functions and are designed specifically for residual and leakage detection, often with behavior aligned to IEC residual-current standards. When I use such a device, the safety MCU reads status bits, trip flags and diagnostic information instead of implementing every detail in discrete AFEs and firmware. Finally, digital isolators and isolated DC/DC converters close the loop between the high-voltage sensing front-end and the low-voltage domain, so I specify isolation rating, CMTI, propagation delay and power start-up behavior as explicit requirements.

Across the seven major vendors I usually work with — TI, ST, NXP, Renesas, onsemi, Microchip and Melexis — leakage detection can follow two main sourcing strategies. In a general AFE combination strategy, I pick differential or isolated amplifiers, ADCs, comparators and isolators from their analog and power catalogs and assemble a custom solution tuned to my thresholds, bandwidth and diagnostics. In a dedicated RCM or leakage monitor strategy, I select parts that explicitly target residual current protection, with built-in test features and well-documented safety behavior, and surround them with standard isolation and MCU components.

When I prepare a sourcing or RFQ sheet, I describe what I need in terms of IC types and key parameters rather than part numbers, so that different suppliers can propose compatible devices. Examples of the kind of lines I use include:

  • AFE must support leakage currents from approximately 10 mA to 2 A with at least 70 dB CMRR and less than 5 µV/°C offset drift.
  • Comparator or RCM output must provide a latched trip signal with propagation delay below a few milliseconds at the specified threshold.
  • Isolation devices and isolated power supplies must meet the required insulation coordination and creepage distances for the vehicle voltage class.
  • Preferred devices include built-in test injection support or diagnostic flags suitable for ISO 26262 safety analysis.

Specific part numbers and brand recommendations are managed in a separate Brand IC selection mapping so that this page focuses on IC types and selection criteria. The next section turns those criteria into concrete BOM fields and board-level notes that I can reuse every time I design or source a leakage detection function.

BOM & Board-Level Notes for Leakage Detection

To make residual and leakage detection repeatable across projects, I treat its requirements as concrete BOM fields and layout constraints, not just comments in a design review. A clear checklist helps the design team, purchasing, suppliers and safety engineers read the same intent. The goal is that any engineer who picks up the schematic and PCB stack-up can see why the selected sensors, AFEs and isolation parts look the way they do.

On the BOM side, I usually define at least the following items for the leakage detection function:

  • Sensor type and range — CT turns ratio, Hall current range or shunt value and power rating, plus the expected leakage current window and waveform.
  • Required leakage thresholds and bands — AC and DC trip levels in milliamps or amps, along with the frequency range that must be detected and the components that should be rejected.
  • Response time and trip type — whether the function must react instantly or with a short delay, and whether the behavior should be non-latching, latching or controlled by the safety MCU.
  • Isolation and insulation requirements — target isolation level, creepage and clearance distances and any coordination with pack voltage class and system safety goals.
  • Self-test and diagnostic hooks — test coil or injection path, ADC or comparator monitoring needs and the minimum diagnostic coverage expected for the safety case.
  • Bias and power constraints — supply voltages, isolated power requirements and start-up sequencing that ensure the leakage detection function is alive whenever HV can be present.

At the PCB and layout level, small details often decide whether a theoretically good architecture behaves well in real vehicles. I record board-level notes alongside the BOM for each design, for example:

  • CT secondary and shunt sense traces must be short, routed as tight pairs or with shielding where possible, and kept away from high dv/dt nodes such as gate driver outputs and bootstrap loops.
  • Hall sensor grounds and reference nodes should return cleanly to the AFE and avoid sharing noisy return paths with power stages or digital logic.
  • Comparator and AFE input RC networks must have well-defined values and tolerances so that bandwidth and filtering are repeatable and do not drift into nuisance trip or missed trip regions.
  • Isolated amplifier or modulator inputs and outputs need appropriate spacing, guard traces and decoupling to meet the isolation rating and to avoid coupling fast transients into leakage measurement nodes.
  • Test injection lines and diagnostic sense points should be physically accessible for end-of-line testing while remaining protected against accidental mis-use in the field.

Locking these requirements into BOM fields and board-level notes makes leakage detection a repeatable design block rather than a one-off exercise. It also gives the safety team and purchasing a stable reference when reviewing alternative ICs or PCB changes, and connects this page cleanly to the broader HV energy and BDU architecture work elsewhere in the system.

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FAQs: Residual / Leakage Detection Planning & Selection

When do I actually need on-vehicle AC residual current detection instead of relying only on the charging station side?
In my projects I add AC residual detection on the vehicle whenever I cannot fully trust the charging infrastructure or when the car may be used with portable or legacy chargers. On-vehicle detection gives me a consistent safety level across markets, fleets and charging cables, independent of how good the external RCD is.
How do leakage detection requirements differ between an AC OBC, a DC fast-charge interface and in-pack leakage monitoring?
For the OBC I mainly worry about AC residual currents and mains-related harmonics in the tens of milliamps range. At the DC fast-charge interface I also consider high DC leakage and interaction with station protection. Inside the pack, leakage monitoring tends to focus on DC faults, enclosure integrity and coordination with the BDU and insulation monitor.
What is the realistic scope of leakage detection in the vehicle compared with insulation monitoring and system ground-fault protection?
I treat current based leakage detection as one piece of the safety puzzle. It looks for abnormal current paths and trips contactors. Insulation monitoring focuses on impedance to chassis and often runs continuously. Grid side ground-fault protection lives in chargers and substations. My job is to define clear boundaries and make sure they complement each other.
How do I decide between a CT and a Hall leakage sensor for an EV high-voltage platform?
I normally choose CTs when my main concern is AC residual currents at the inlet and I want high bandwidth, low noise and no insertion loss. I lean toward Hall leakage sensors when DC components or mixed AC and DC are important. Then I accept offset, drift and calibration work in exchange for DC sensitivity and flexible placement.
If my project must detect residual currents with a DC component, how should I adapt the sensing technology, AFE and filtering?
As soon as DC components matter, I stop relying on a simple AC CT. I either move to a suitable RDC type CT or use Hall or shunt based sensing with an AFE designed for low frequency and offset stability. I also adjust filters so that slow leakage is preserved instead of being treated as a baseline to remove.
How do I choose between an analog comparator path and an ADC or DSP based digital path for leakage detection?
I use a hardware comparator path when I need a fast, deterministic trip with a clear safety chain and minimal software dependence. I add an ADC or DSP based path when I want filtering, waveform logging and smarter decisions. In higher ASIL projects I often combine them, using the analog trip as the primary safety mechanism.
When does it make sense to use a dedicated residual current monitor IC instead of building my own AFE and logic?
I reach for a dedicated residual current monitor IC when the program must align with explicit residual current standards and I want to reduce analog design and safety analysis effort. These parts give me predefined behavior, built in tests and application notes. I accept less flexibility and a stronger dependency on one vendor family in return.
How should I pick trip thresholds and response times so leakage detection is effective without creating nuisance trips?
I start from the safety target and contactor opening time, then map that into current and time windows where I truly need a trip. Next I look at realistic leakage levels, EMC conditions and normal inrush behavior. I size thresholds and filters so normal operation stays outside the trip region shown in my leakage versus time planning.
How do I plan the self-test and diagnostic path so I cover critical failure modes without causing false trips?
I separate self-test from real trip behavior. Test injections and monitoring thresholds are tuned to flag diagnostic faults, not to open contactors directly. I schedule power on tests before HV is enabled and periodic tests when the system is in a stable state. Each test is mapped to its fault coverage in the safety concept.
What should happen in the system once leakage detection trips, and how should it coordinate with BDU and contactor weld detection?
In my designs the leakage function raises a clear trip request to the safety MCU or BDU controller. That logic decides how to open contactors, check weld status and block further HV activations. I do not let leakage detection implement weld algorithms itself, but I make sure the interfaces and timing fit the overall HV energy backbone concept.
How do I turn leakage detection requirements into a sourcing checklist for AFEs, monitors and isolation parts?
I write my sourcing checklist in terms of current range, bandwidth, accuracy, isolation rating, CMTI, diagnostic features and package limits instead of part numbers. That lets multiple suppliers respond with compatible AFEs, monitors and isolators. I also highlight any self test pins, test coils and status flags that my safety concept depends on.
Which board-level layout details most often make or break leakage detection performance in real EV hardware?
I treat leakage traces like sensitive analog measurement paths. CT secondary and shunt sense lines stay short, tightly routed and away from high dv/dt nodes. Hall references get clean returns. Comparator input RC networks have controlled tolerances. I also keep test injection paths and measurement points accessible for production and service diagnostics.