Coriolis Mass Flowmeter: AFE, Phase & Temp Compensation

Q: Zero-flow still shows non-zero mass flow—mechanical bias or phase engine drift?

What to measure first: log dphi_zero, phase_noise_floor, and coh during a zero-flow hold, plus T_tube. A stable non-zero Δφ with high coherence points to baseline/compensation or mechanical bias; noisy Δφ with coherence drops points to timing/quality-gating issues. First fix: freeze output when coh is low and re-check zero after a controlled temperature point.

Q: Pickup waveform looks clean, but Δφ is noisy—ADC jitter or AFE noise floor?

What to measure first: run a same-input test into both channels and record t_skew_est, dphi_same_input, and phase_noise_floor. If Δφ noise remains with same-input, suspect clock/aperture jitter or channel skew; if noise drops, suspect pickup/AFE noise and EMI rectification. First fix: tighten clock routing and verify simultaneous sampling (e.g., ADS131M04 or AD7606B class) before adding heavy filtering.

Q: Works on bench, fails after long cable—CMRR collapse or EMI rectification?

What to measure first: measure differential amplitude versus common-mode at the AFE input (cm_amp proxy), then sweep common-mode injection to estimate cmrr_f@k and watch outlier_cnt/coh. If common-mode dominates and leaks into Δφ, CMRR/rectification is the culprit. First fix: use symmetric RC + proper shield termination; add a CMC only after verifying it does not break channel matching.

Q: Resonance tracking hunts—PLL tuning or amplitude loop interaction?

What to measure first: trend f_drive versus estimated f_res, plus loop_err and drive headroom flags. If frequency hunts while amplitude error also oscillates, loop interaction is likely; if only frequency hunts, PLL gains or noise are likely. First fix: decouple time constants (amplitude loop slower), add rate limits on f_drive, and gate PLL updates when coh drops.

Q: Temperature compensation makes drift worse—wrong sensor placement or coefficient overfit?

What to measure first: log T_tube and T_elec together with dphi_zero and dens_residual across two temperature points. If drift correlates poorly with the chosen temperature, placement/thermal coupling is wrong; if residuals blow up at edges, coefficients are overfit. First fix: move sensing to a representative tube location (e.g., RTD/PT1000) and constrain the model with guarded ranges + versioned coefficients.

Q: Sudden spikes during motor start—surge coupling or ground loop?

What to measure first: time-align motor-start events with dphi_glitch_rate, outlier_cnt, and cm_amp, and capture a snapshot_id (pre/post windows). If glitches track common-mode jumps, coupling is dominant; if behavior changes with shield termination, ground-loop is dominant. First fix: enforce connector-first surge return (TVS to chassis/return), then A/B the shield strategy and verify coherence gating holds output steady.

Q: Two pickup channels mismatch over time—aging, bias current, or filter mismatch?

What to measure first: trend pickup_rms_ch1/pickup_rms_ch2, t_skew_est, and a periodic same-input check (dphi_same_input). If timing/phase mismatch grows, suspect RC/C mismatch or ADC channel skew; if amplitude ratio drifts, suspect bias/leakage/aging at the front-end. First fix: use matched RC networks, low-bias in-amps (AD8421/INA828 class), and re-run channel match calibration with versioned storage.

Q: MCU occasionally resets and readings jump—watchdog strategy or brownout during drive peaks?

What to measure first: capture the reset reason (BOR/WDG), minimum rail voltage during drive peaks, and the surrounding A_drive + fault_code with a snapshot_id. If brownout aligns with drive peaks, power integrity is the root; if WDG fires under load, scheduling/ISR budget is the root. First fix: limit peak drive, add soft-start/hold-up, and enforce a deterministic DSP window with a supervisor (TPS3839/MAX706 class).

Q: Density output stable but mass flow drifts—Δφ scaling, wrap handling, or calibration residual?

What to measure first: log raw dphi before scaling, the unwrap/wrap counters, and cal_ver/cal_mono_ctr. Stable f_res with drifting mass flow often indicates Δφ scaling, sign, or unwrap mistakes rather than density modeling. First fix: replay a frozen raw dataset through the phase engine to confirm deterministic outputs, then verify coefficient version/CRC matches the deployed firmware mapping.

Q: Field recalibration “sticks” but gets lost later—NVM integrity or versioning/CRC?

What to measure first: on every calibration write, record cal_ver, cal_crc, cal_mono_ctr, and the commit status, plus power/reset events. If coefficients disappear after resets, the write/commit policy is broken or data is being rolled back. First fix: implement A/B slots with CRC, monotonic counters, and an atomic commit marker; use a controlled power-cut test to validate persistence.

← Back to: Industrial Sensing & Process Control

This page is a hardware-first blueprint covering the drive loop, differential AFE, ADC/clock timing, DSP extraction, calibration, and validation checks.

Hardware-first blueprint for stable mass-flow and density measurement: differential pickup AFE, phase/frequency extraction, low-jitter timing, temperature compensation, and DSP/MCU validation evidence.

Differential pickup AFE Δφ / Δt timing evidence Clock & channel skew budget Temp drift control Logs that prove it works

Center Idea

Coriolis flowmeters win when the system can capture tiny differential pickup signals with stable phase timing, then convert that phase/frequency evidence into mass flow and density while rejecting vibration, EMI, and temperature drift. This chapter sets the measurement mindset: flow is not “read directly” — it is derived from a verified signal chain.

What this page delivers (engineering output):

Signal contract: what signals exist, what is observable, and what must be logged.
Timing contract: how clock/jitter/skew become phase error (and how to bound them).
Validation contract: “what to measure first” at each block to prove correctness.

What to measure first (so debugging starts correctly):

Pickup SNR at the AFE input (diff amplitude vs noise floor).
Δφ stability at zero-flow (short-term variance and long-term drift).
Coherence (or correlation quality) during vibration/EMI events.

Scope: This is hardware + signal-processing plumbing (drive, AFE, ADC/clock, DSP/MCU, temperature, logs). Mechanical tube design and CFD/materials are intentionally out of scope.

Cite this figure: “Coriolis measurement stack (drive → tube → pickup → phase engine).” Copy citation

Minimal block-view: the goal is to keep Δφ/Δt stable by controlling SNR, timing jitter/skew, and drift sources — then prove it via logs.

System overview: what you’re really measuring (signals & evidence fields)

The measurement target in a Coriolis meter is not “flow” directly. The target is a set of observable timing and resonance signatures derived from drive and pickup signals. This chapter defines the signal contract so every later design decision can be verified against a specific measurement and log field.

Primary signals (hardware-facing):

Drive excitation: drive frequency near resonance, drive amplitude, drive phase, and loop error.
Pickup sensing: two pickup channels (up/down) used as a differential pair.
Core observables: phase difference (Δφ) and sometimes time delay (Δt).

Secondary observables (quality + density path):

Resonance frequency shift as a density proxy (tracked over temperature/time).
Amplitude ratio / imbalance to detect sensor asymmetry and aging.
Noise floor & coherence to gate measurements during vibration/EMI events.

Engineering reality: pickup differential signals can be small while common-mode interference is large and broadband. Your architecture must protect CMRR vs frequency, channel matching, and sampling timing (jitter/skew), otherwise Δφ becomes a system artifact.

Evidence fields (log schema) — group them so debugging is deterministic:

Group	What it proves	Recommended fields (examples)	What to measure first
Drive loop	Drive stability and non-saturation	`f_drive` `A_drive` `phase_drive` `loop_err` `sat_flag` `rail_margin`	Step response of amplitude loop; saturation/clip flags under worst-case supply.
Pickup quality	SNR and channel integrity before DSP	`V_rms_ch1` `V_rms_ch2` `snr_est` `noise_floor` `clip_flag` `cm_inj_test`	Diff amplitude vs noise; CMRR vs frequency using a common-mode injection check.
Phase engine	Δφ/Δt stability and estimator health	`dphi` `dt` `coh` `unwrap_state` `est_latency` `outlier_cnt`	Zero-flow Δφ variance; coherence during vibration; outlier gating effectiveness.
Temp & health	Drift control and traceability	`T1` `T2` `comp_state` `coeff_ver` `diag_cnt` `event_cnt`	Zero stability across temperature sweep; coefficient version/CRC validation on boot.

Cite this figure: “Coriolis signal chain map (drive → AFE → ADC/clock → phase engine).” Copy citation

Use this map as a debugging checklist: if Δφ is unstable, treat timing (jitter/skew), AFE CMRR vs frequency, and estimator coherence as first-class suspects.

Bridge to next chapters: once the signal contract is fixed, the design work becomes deterministic: build a controllable drive loop, preserve pickup integrity through the differential AFE, bound ADC/clock timing error, and only then trust the phase engine outputs.

Drive path design: excitation source + power stage + loop closure

Drive stability sets the upper bound of measurement quality. A Coriolis meter does not need “vibration” in general; it needs a repeatable vibration source whose amplitude and frequency are controlled without introducing spectral artifacts that later look like phase noise. Any saturation, harmonic pollution, or timing drift in the drive chain reduces pickup SNR and pushes Δφ/Δt estimation into a noise-dominated regime.

Excitation generation (phase reference quality)

DDS/NCO in MCU/DSP: stable phase reference; easy to align with I/Q demod and logging.
DAC output: cleaner spectrum; requires solid reference and layout discipline.
PWM + reconstruction: efficient and low-cost; requires careful filtering and EMI containment.

What to measure first: compare the commanded drive tone to the actual output spectrum. Look for harmonic growth or spurs that increase with amplitude — these often become “fake phase noise” downstream.

Power stage choice (clean vs efficient)

Class-AB / power op-amp: clean waveform, lower EMI risk; watch thermal headroom and drift.
Class-D + LC: high efficiency; watch PWM common-mode injection and conducted/radiated emissions.

Feedback sensing (what is the loop actually controlling?)

The feedback point defines the controlled quantity. Coil current, coil voltage, and pickup-derived amplitude are not equivalent. Choose feedback to match the desired stability target and verify loop observability (noise + delay).

Sense resistor / current monitor: robust control of coil current; may not perfectly track mechanical amplitude.
Coil voltage feedback: sensitive to impedance drift; can misrepresent true vibration energy.
Pickup-amplitude proxy: closer to mechanical state; must avoid coupling measurement estimator noise into control.

Loop closure: amplitude control + resonance tracking

Amplitude loop keeps vibration energy constant to stabilize pickup SNR.
Frequency tracking loop (PLL/sweep-lock) keeps the drive near resonance as conditions drift.
Coupling risk: if both loops are aggressive, “hunt” behavior can appear and contaminate Δφ stability.

Log fields: f_drive, A_drive, loop_err, sat_flag Power: rail_margin, I_coil_pk, I_limit_flag Tracking: pll_lock_time, hunt_cnt

Check	How to test	What “good” looks like	Fields to record
THD / spurs	Measure drive output spectrum at low and high amplitude.	Harmonics/spurs remain bounded; no sudden growth near saturation.	`spur_metric` `sat_flag` `rail_margin`
Amplitude step	Step amplitude setpoint; observe settling and overshoot.	Stable settling; minimal overshoot; no oscillation.	`amp_err` `settle_time`
Resonance lock	Sweep/PLL lock; introduce disturbance (temp/vibration).	Reliable lock; bounded hunting under disturbance.	`pll_lock_time` `hunt_cnt`
Limit behavior	Force worst-case supply/load; confirm current limiting.	Predictable limiting; clean recovery; no latch-up artifacts.	`I_limit_flag` `clip_cnt`

Cite this figure: “Coriolis drive loop: amplitude control and resonance tracking.” Copy citation

The drive chain must behave like a controlled vibration source. Bounded spurs, predictable limiting, and stable tracking prevent drive artifacts from turning into Δφ instability.

Bridge: Once the drive is stable and non-saturating, pickup integrity becomes the next bottleneck. The differential AFE must preserve true differential information under large common-mode interference and harsh wiring.

Pickup front-end: differential AFE that survives microvolts + harsh wiring

Most field failures originate here: pickup signals can be extremely small while common-mode interference is large and broadband. The pickup front-end must therefore be treated as a CM-to-DM contamination control system, not merely a gain stage. The design goal is stable CMRR across frequency, predictable bias/leakage behavior, and immunity to EMI rectification that can create “fake drift”.

Interface reality (why bench success fails in the field)

Long cable introduces capacitance and leakage paths that reduce high-frequency CMRR.
Ground uncertainty creates large common-mode swings and ground-loop currents.
Switching noise can be demodulated by input nonlinearity (EMI rectification) into low-frequency drift.

Input protection without killing the measurement

Protection is successful only if it keeps the front-end alive and preserves symmetry and low leakage. Asymmetry converts common-mode energy into a differential error that directly corrupts Δφ.

Series resistors + RF capacitors (matched) to limit RFI energy at the input device.
Low-leakage clamps to avoid temperature-dependent bias shifts.
TVS placement that diverts surge current away from sensitive analog ground returns.

Topology options: In-amp vs FDA vs 2-opamp differential

Instrumentation amplifier: strong low-frequency CMRR; verify CMRR roll-off at higher frequencies.
Fully differential amplifier: direct ADC drive and controlled output common-mode; sensitive to input network symmetry.
Two-opamp differential: flexible; requires resistor matching and bias-current control to avoid drift.

Design targets (tie each spec to a failure mode)

Input-referred noise → determines Δφ variance and zero stability limit.
CMRR across frequency → prevents PWM/EMI energy from appearing as differential “phase”.
Input bias current + leakage → converts to offset via source impedance; worsens with temperature.
Offset drift → sets the burden on temperature compensation and recalibration policy.

Measure first: DM vs CM at input, noise_floor CMRR sweep: cmrr_f@keypoints, outlier_cnt Estimator health: snr_est, coh, clip_flag

Test	Setup	Readout	Pass signal
DM vs CM ratio	Measure diff pickup amplitude and common-mode swing at connector/AFE input.	`V_dm_rms` `V_cm_rms`	DM preserved while CM does not create output offset or spurs.
CMRR vs frequency	Short inputs together (DM≈0), inject the same sine onto both inputs (CM sweep).	`cmrr_f@k` `spurs`	CM→DM conversion remains bounded across key bands.
EMI rectification	Expose to RFI-like interference or burst; compare with/without RFI filter.	`noise_floor` `coh`	No persistent “DC drift”; coherence gating catches events.
Bias/leakage drift	Temperature sweep with stable input; compare offset shift with clamp/TVS variants.	`offset_est` `T1/T2`	Offset drift stays predictable and compensable; no sudden steps.

Cite this figure: “Coriolis pickup AFE: protection and topology options to preserve differential phase.” Copy citation

The objective is to prevent common-mode energy and leakage asymmetry from becoming a differential artifact. Validate with DM/CM measurements and a CMRR-vs-frequency sweep.

Bridge: Once the pickup AFE is stable (noise, CMRR(f), bias/leakage), the dominant phase error often shifts to sampling timing (ADC aperture, clock jitter, channel skew) before algorithm choice becomes the bottleneck.

Anti-alias + ADC + clocking: your phase accuracy is a timing problem

Δφ is only as trustworthy as the sampling timing behind it. Phase error is often dominated by three timing-related mechanisms: inter-channel sampling skew, clock jitter, and mismatched analog group delay. If these are not bounded and verified, the phase engine will faithfully report an artifact.

ADC architecture choices (what can break Δφ)

Simultaneous-sampling ADC: best for phase because both channels share the same sampling instant.
Multiplexed multi-channel ADC: risk of aperture skew; effective phase bias grows with drive frequency.

Sampling rate strategy (OSR vs compute budget)

Define OSR = f_s / f_drive. Higher OSR improves filtering margin and averaging, but increases compute load and estimator latency.

Typical OSR range: 20–200× (tuned by noise environment and MCU/DSP budget).
Watchouts: too low → aliasing/leakage; too high → CPU saturation and delayed gating.

Clocking (shared time base and routing discipline)

Low-jitter clock source and a clean distribution path reduce phase noise floor.
Skew budget: channel-to-channel aperture skew must be measured, not assumed.
Layout reality: clock return paths and grounding errors can masquerade as “jitter”.

Analog filtering (anti-alias + matched group delay)

Simple matched RC: easy to keep symmetric; often a safe baseline.
2nd order filtering: more attenuation but higher risk of group-delay mismatch if not tightly matched.
Rule: match topology, values, tolerances, and placement between channels.

Skew: t_skew_est, dphi_same_input Noise floor: phase_noise_floor, coh Sampling: fs, osr, est_latency, cpu_load Filter: gd_mismatch, cmrr_f@k

SOP	Setup	What to compute	Fields to log
SOP-A: Skew & group delay	Feed the same signal into both channels (same amplitude and phase). Sweep frequency if possible.	Estimate inter-channel delay and phase bias; observe how bias changes with frequency (group delay mismatch).	`dphi_same_input` `t_skew_est` `gd_mismatch`
SOP-B: Phase noise floor	Short inputs (or use a known clean single-tone). Hold temperature and supply stable.	Measure phase variance (noise floor). Check coherence gating under injected vibration/EMI events.	`phase_noise_floor` `coh` `outlier_cnt`
SOP-C: OSR stress	Vary sampling rate while holding drive frequency. Observe estimator load and latency.	Find the OSR knee where noise improves but CPU/latency remains acceptable.	`fs` `osr` `cpu_load` `est_latency`

Cite this figure: “Timing budget map for Coriolis Δφ accuracy (skew, jitter, group delay).” Copy citation

Validate timing first: same-input tests reveal skew and group-delay mismatch; noise-floor tests reveal clock/jitter limits. Only then is Δφ interpretation meaningful.

Bridge: Once sampling timing is proven (skew/jitter/group delay), phase extraction becomes a deterministic DSP pipeline problem: choose an engine, output quality metrics, and gate results during disturbance.

Phase/frequency extraction engines: from raw samples to Δφ, Δt, and resonance

The phase engine is the translator between sampled waveforms and physical evidence. The correct goal is not a single “best” algorithm, but a verifiable pipeline whose outputs include quality metrics so the system can distinguish valid measurements from disturbed conditions.

Engine menu (when to use what)

I/Q demodulation (lock-in): best for stable single-tone drive; low noise with averaging.
Goertzel: low CPU single-tone amplitude/phase; good for MCU-class implementations.
Cross-correlation: robust under distortion; outputs Δt reliably but costs compute and latency.
PLL / frequency tracking: tracks resonance frequency for density/health signatures.

Quality metrics (gate outputs, do not “guess”)

Coherence / correlation peak ratio: detects vibration/EMI contamination.
SNR estimate: prevents low-SNR Δφ from driving unstable flow outputs.
Outlier reject counters: traceability for field diagnostics and QA.

What to measure first

Zero-flow Δφ stability over time (variance and drift under controlled temperature).
Coherence response under injected vibration/EMI events (does gating trigger reliably?).
Algorithm latency vs OSR and window length (does real-time control remain stable?).

Core: dphi, dt, f_res Quality: coh, snr_est, outlier_cnt Runtime: est_latency, window_len

Cite this figure: “DSP pipeline for Coriolis phase extraction (I/Q, atan2, unwrap, PLL, quality gating).” Copy citation

A practical pipeline outputs not only Δφ/Δt and resonance but also coherence and SNR metrics, enabling robust gating during vibration and EMI events.

Bridge: With a verified timing base and a quality-gated phase engine, the remaining accuracy limits are dominated by temperature drift, calibration strategy, and health diagnostics (coefficients, versioning, and event logs).

Temperature sensing & compensation: drift budgets and where to close the loop

Temperature drift affects the measurement stack in multiple layers: analog front-end offset/gain, resonance behavior, and long-term zero stability. A reliable compensation design keeps each layer observable, records the coefficient lineage (version/CRC), and applies guardrails so “correction” does not amplify disturbed conditions.

Temperature sensor options (placement dominates device choice)

NTC: low cost and fast; requires stable biasing and careful self-heating control.
RTD (PT100/PT1000): better linearity; needs an RTD front-end or precision excitation.
IC temperature sensor: easy digital integration; validate thermal coupling to the target location.

Separate temperature intent into two fields whenever practical: T_elec (AFE/ADC/PCB drift proxy) and T_tube (tube/mechanical proxy).

Drift budgets (tie each drift to a testable symptom)

Drift source	Primary symptom	Comp layer	Evidence fields
AFE offset drift	zero-flow Δφ shifts with temperature	Offset correction + guarded zero update	`offset_est` `dphi_zero` `T_elec`
AFE gain drift	amplitude ratio / SNR changes vs temperature	Gain correction + quality gating	`gain_proxy` `snr_est` `T_elec`
Resonance shift	density proxy drifts; f_res changes	f_res→density curve with temperature dimension	`f_res` `T_tube` `cal_ver`
Mechanical response	coherence degrades; phase noise floor rises	Quality metrics + freeze rules	`coh` `phase_noise_floor` `outlier_cnt`

Compensation layers (observable inputs + guardrails)

Layer A — AFE drift compensation: apply offset/gain corrections only when coh and snr_est meet thresholds and no saturation is present.
Layer B — Density curve temperature dependence: compute density from f_res using a temperature-indexed calibration model and verified coefficient set (version/CRC).
Layer C — Zero stability correction: update a slow zero_bias term only under “safe-to-learn” conditions; rate-limit updates and freeze on disturbances.

Data model (coefficients, versioning, CRC, and safe switching)

Coefficient set: store per-layer coefficients with cal_ver + cal_crc and a source tag.
Rollback slots: A/B slots prevent a bad write from bricking measurement integrity.
Atomic apply: switch coefficient sets at defined boundaries (window boundary) to avoid mid-window jumps.
Traceability: record whether parameters originated from factory, field calibration, or guarded auto-zero learning.

Temps: T_elec, T_tube Zero: dphi_zero, zero_bias, zero_freeze_reason Cal: cal_ver, cal_crc, cal_slot Quality: coh, snr_est, outlier_cnt

What to measure first (temperature sweeps as two SOPs)

SOP	Condition	Goal	Fields to record
SOP-Temp-1: zero stability	Zero flow, stable mounting, fixed drive strategy	Quantify dphi_zero(T) slope and noise-floor changes	`dphi_zero` `phase_noise_floor` `coh` `T_elec` `T_tube`
SOP-Temp-2: gain/phase drift	Fixed excitation (f_drive + amplitude target)	Separate electronic drift from mechanical drift	`gain_proxy` `amp_est` `t_skew_est` `T_elec`

Illustrative IC examples: precision ADC reference ADR4525 / REF5050; digital temperature sensor TMP117; RTD-to-digital front-end MAX31865.

Cite this figure: “Temperature loop closure map for Coriolis drift compensation (Layer A/B/C + guardrails).” Copy citation

Separate electronic drift and mechanical drift with purposeful placement, apply layered compensation with quality gating, and keep every coefficient set traceable (version/CRC + rollback).

Bridge: With compensation made observable and traceable, the next field failure class is runtime robustness: scheduling jitter, numeric overflow, and incomplete fault handling. MCU/DSP partitioning and diagnostics close that gap.

MCU/DSP partitioning: latency, fixed-point traps, and robust diagnostics

Systems that “work in the lab” frequently fail in the field due to missed deadlines, numeric edge cases, and fault handling that does not preserve evidence. A robust partition defines hard timing contracts (DMA/ISR vs compute windows), enforces safe-state behavior, and captures a traceable snapshot around failures.

Partition by timing contract (DMA/ISR, compute window, outputs)

Sampling layer (DMA/ISR): move samples to a ring buffer; keep ISR bounded and deterministic.
DSP layer (window compute): fixed window length and a deadline; compute I/Q, unwrap, PLL, metrics.
Output layer: filtering and communications must be degradable (reduced rate) under load.

Fixed-point traps (phase wrap, atan2 scaling, accumulator overflow)

Phase unwrap: update only when quality metrics are good; count and log wrap events.
atan2 scaling: define a stable scale convention; record scale_id for diagnostics.
I/Q accumulators: use wide accumulators (32/64-bit) to prevent window-length overflow.
Filter coefficient quantization: verify that quantization does not create slow drift.

Watchdog & safe-state (measured triggers and predictable recovery)

Triggers: persistent low coh, repeated sat_flag, sensor open/short, invalid temperature.
Actions: disable drive, freeze outputs, raise fault_code, and force snapshot logging.
Recovery: require a stable window before re-enabling; rate-limit retries to avoid oscillation.

Logging strategy (ring buffer + event snapshot)

Capture evidence fields continuously in a ring buffer. On a fault trigger, preserve a pre/post window snapshot so field failures are debuggable without guesswork.

Drive: f_drive, A_drive, loop_err, sat_flag Phase: dphi, dt, coh, snr_est, outlier_cnt Timing: t_skew_est, phase_noise_floor Temp/Cal: T_elec, T_tube, cal_ver Fault: fault_code, safe_state, recover_cnt

What to measure first (two non-negotiable system tests)

Test	Method	Pass condition	Fields to log
RT-1: worst-case compute time	Max OSR, max window, all metrics enabled; inject interrupts and comms load.	No missed deadlines; bounded ISR time; no sample drops.	`t_isr_max` `t_dsp_max` `missed_deadline` `cpu_load`
FI-1: fault injection	Disconnect pickup, short inputs, force AFE saturation, open temp sensor.	Safe-state triggers correctly; snapshot captured; recovery is predictable.	`fault_code` `safe_state` `snapshot_id` `recover_cnt`

Cite this figure: “Runtime partition and fault handling for Coriolis meters (deadlines, safe-state, evidence snapshot).” Copy citation

Field robustness is enforced by deadlines, bounded ISR time, quality-gated safe-state actions, and traceable snapshots (pre/post windows) that preserve evidence for diagnostics.

Bridge: With timing, DSP, temperature compensation, and runtime robustness in place, the remaining system work is calibration policy and acceptance testing: defining fixtures, pass/fail thresholds, and production/field verification procedures.

Calibration & field verification: make it serviceable, not mystical

Calibration becomes serviceable when every step ties back to measurable evidence fields, produces explicit coefficients with traceable lineage (version/CRC/source), and includes a field-verification workflow that can separate electronic-chain failures from tube/installation issues. The goal is repeatable outcomes, not “recalibrate until it looks right.”

Factory calibration items (mapped to the evidence contract)

Item	Purpose	Output coefficients	Evidence fields (verify)
Channel gain/phase match	Align CH1/CH2 amplitude and phase response to avoid systematic Δφ bias.	`gain_corr`, `phase_corr`, `t_skew_ref`	`dphi_same_input` `t_skew_est` `gd_mismatch`
Zero-flow Δφ baseline	Establish the zero reference and drift envelope for “no-flow” conditions.	`dphi_zero_ref`, `zero_guard`, optional `zero_model(T)`	`dphi_zero` `phase_noise_floor` `coh`
Density curve with temp points	Map resonance to density across temperature to prevent model mismatch.	`dens_coeff`, `dens_T_grid`	`f_res` `T_tube` `dens_residual`

Field verification (two toolboxes: self-test injection + known conditions)

Self-test injection: inject a known excitation tone (or synthetic differential pattern) into the electronic chain to confirm AFE→ADC→DSP integrity without relying on process conditions.
Known condition checks: verify zero flow and tube health proxies (resonance, amplitude stability, coherence trends) to separate installation/mechanical shifts from electronics drift.

Data integrity (lightweight but non-negotiable)

Coefficient CRC: detect corruption and incomplete writes.
Monotonic update counter: prevent unintended rollback and track update chronology.
A/B rollback slot: keep the previous valid set to recover from a bad update.

Match: gain_corr, phase_corr, t_skew_ref Zero: dphi_zero_ref, zero_guard Density: dens_coeff, dens_residual Integrity: cal_ver, cal_crc, cal_mono_ctr, cal_slot Verify: selftest_pass, selftest_residual

What to measure first (two verification SOPs)

SOP	Method	Pass criteria (example)	Fields to record
SOP-Cal-1: zero repeatability after power cycle	Multiple power cycles at zero flow; allow settling; compare dphi_zero distributions.	dphi_zero returns within zero_guard; no growth in phase_noise_floor.	`dphi_zero` `phase_noise_floor` `coh` `cal_ver`
SOP-Cal-2: residual vs temperature	Verify density model and zero model across temperature points (or a sweep).	dens_residual stays bounded; zero drift follows expected envelope.	`dens_residual` `f_res` `T_tube` `dphi_zero`

Cite this figure: “Calibration & verification lifecycle for Coriolis meters (evidence-linked coefficients + field checks).” Copy citation

Factory calibration outputs coefficients that are versioned and CRC-protected. Field verification then re-checks the same evidence fields to keep service work deterministic.

Bridge: Serviceable calibration reduces ambiguity, but industrial environments still inject disturbances. Robustness requires designing the ingress paths (cabling, surge, isolation, grounding) and validating their impact on Δφ and coherence.

Robustness: EMI, surge, isolation, grounding, and cabling realities

Industrial environments can overwhelm microvolt-class pickup signals through cabling, connector transients, and ground reference shifts. Robustness comes from controlling ingress paths, protecting the connector boundary, and ensuring any filtering or isolation does not violate the timing and matching budgets required for phase accuracy.

Cabling & shielding (control the return path, avoid loops)

Shield termination: choose a single, intentional termination strategy to avoid ground loops.
Twisted pairs: keep differential symmetry; route away from switching nodes and high dV/dt edges.
Common-mode reality: treat common-mode as the dominant attacker on long cables.

RC filters vs common-mode choke (tradeoffs that impact Δφ)

Symmetric RC: good for RF rectification control; easier to keep channel-matched.
CMC: targets common-mode noise, but verify saturation risk and group-delay mismatch impact.
Rule: any new filter must be re-verified with same-input delay/phase tests (ties to H2-5).

Surge/ESD strategy (connector-first, energy to chassis/return)

TVS placement: place at the connector boundary with a defined return path.
Series impedance: small resistors can limit surge current into sensitive nodes.
Leakage awareness: protection devices must not add leakage that corrupts microvolt sensing.

Isolation needs (remote head implications)

When isolation is needed: remote sensor/head, long cable reference issues, safety requirements.
What isolation changes: timing uncertainty, added latency, altered ground reference.
Validation requirement: re-check channel alignment and phase noise floor after isolation.

What to validate (disturbance mapped to evidence fields)

Validation	Stimulus	Expected system behavior	Evidence fields
EFT/ESD vs Δφ glitch rate	EFT bursts / ESD contact-air events at the connector boundary	Quality gating rejects corrupted windows; no long-tail drift after events	`dphi_glitch_rate` `outlier_cnt` `fault_code`
Radiated immunity vs coherence	Radiated RF exposure / switching-field coupling stress	coh drops trigger freeze/hold; recovery is stable when coh returns	`coh` `snr_est` `freeze_cnt`
Grounding/cabling A/B	Compare shield termination schemes and routing variants	Lower common-mode amplitude and fewer Δφ outliers	`cm_amp` `outlier_cnt` `dphi`

Illustrative IC examples: digital isolators ADuM family / ISO77xx. If the design includes a remote head with RS-485 transport, a robust PHY family example is THVD (mention only; no deep dive).

Ingress: cm_amp, cmrr_f@k Events: esd_event_cnt, eft_event_cnt Impact: dphi_glitch_rate, outlier_cnt Immunity: coh, snr_est, freeze_cnt Isolation: phase_noise_floor, t_skew_est

Cite this figure: “Industrial ingress map for Coriolis pickup robustness (cable/shield, connector protection, isolation, sensitive domain).” Copy citation

Robustness is achieved by controlling ingress paths at the cable and connector boundary, validating that protection and isolation do not break timing/matching budgets, and auditing impact via Δφ glitches and coherence metrics.

Bridge: With calibration and industrial robustness addressed, the final step is to formalize acceptance tests and a troubleshooting playbook that always starts from evidence fields (Δφ, coherence, f_res, temperature, and fault snapshots).

Validation playbook: the minimum test set that proves it’s real

A credible Coriolis design is proven by a minimal, repeatable acceptance set that ties every test to evidence fields: Δφ stability, coherence, resonance, timing skew, and fault snapshots. This playbook prioritizes tests that expose the common “field failure” modes: channel mismatch, timing instability, EMI-induced glitches, temperature drift, and weak diagnostics.

Scope: This chapter defines a minimum test matrix and a “golden capture” dataset structure. Pass/fail thresholds are left as placeholders so they can be filled per tube geometry, range, and compliance targets.

Minimum acceptance matrix (headline view)

Category	Test (minimum set)	Primary evidence fields	Most likely root-cause chapter
Electrical	Noise floor, CMRR vs frequency, ADC skew, clock stability	`phase_noise_floor` `cmrr_f@k` `t_skew_est` `dphi_rms`	H2-4/H2-5/H2-6/H2-10
Functional	Zero stability, step response, saturation recovery, watchdog trips	`dphi_zero` `loop_err` `sat_flag` `fault_code`	H2-3/H2-6/H2-8/H2-9
Environmental	Temp sweep, vibration injection, EMI spot checks	`dphi_zero(T)` `dens_residual` `coh` `dphi_glitch_rate`	H2-7/H2-10
Data	Log completeness, fault replay usefulness	`snapshot_id` `cal_ver` `cal_crc` `ringbuf_ok`	H2-8/H2-9

Electrical tests (prove the phase chain lower bound)

Noise floor: short inputs / known tone; confirm phase_noise_floor and snr_est scale with bandwidth/OSR as expected.
CMRR vs frequency: common-mode injection sweep; confirm leakage does not create coherent Δφ bias (dphi_leak proxy).
ADC skew: drive both channels with the same signal; verify t_skew_est and dphi_same_input stay bounded.
Clock stability: long-run statistics on Δφ at zero flow and known tone; verify drift and variance remain controlled.

Concrete MPN examples (electrical chain): ADCs: ADS131M04/ADS131M08 (TI), AD7606B (ADI). In-amp: AD8421 (ADI), INA828 (TI), INA188 (TI). FDA (ADC driver): THS4551 (TI), ADA4940-1 (ADI). Precision reference: ADR4525 (ADI), REF5050 (TI). Low-noise op-amp: OPA1612 (TI), ADA4522-2 (ADI).

Functional tests (prove predictable behavior under stress)

Zero stability: zero-flow Δφ over time + power-cycle repeatability (dphi_zero, zero_bias, phase_noise_floor).
Step response: flow step or equivalent stimulus; verify settling, overshoot, and loop margin proxies (loop_err, A_drive).
Saturation recovery: force AFE/ADC saturation; verify recovery time and that glitches are gated (sat_flag, dphi_glitch_rate).
Watchdog trips: fault injection (open/short/temp sensor fail); verify safe-state and snapshot creation (fault_code, safe_state, snapshot_id).

Concrete MPN examples (drive, sensing, protection, diagnostics): Precision drive op-amps: OPA192, OPA197 (TI). Current sense amps: INA190, INA240 (TI). Watchdog/supervisor: TPS3839 (TI), MAX706 (Analog Devices/Maxim). eFuse / load switch (for rail fault containment): TPS2595 (TI), LTC4365 (ADI).

Environmental tests (prove drift control and immunity gating)

Temperature sweep: verify dphi_zero(T) envelope, dens_residual vs temperature points, and coefficient selection correctness.
Vibration injection: inject vibration; verify coherence-driven gating, outlier control, and recovery stability (coh, outlier_cnt).
EMI spot checks: EFT/ESD events and radiated checks; confirm glitch rate stays bounded and safe-state triggers correctly.

Concrete MPN examples (isolation, interface, temperature sensing): Digital isolators: ADuM141E (ADI), ISO7741 (TI). RS-485 PHY (only if used): THVD1450 (TI). Temperature sensing: TMP117 (TI) or RTD front-end MAX31865 (ADI/Maxim). TVS (connector protection examples): SMBJ series (e.g., SMBJxxA), SMF series (select rating per spec).

Data deliverables (golden capture dataset + threshold placeholders)

A “golden capture” is a dataset format that enables replay and diagnosis. Store per-window fields plus event snapshots (pre/post N windows). Use placeholders for thresholds to be filled per tube, range, and compliance requirements.

Dataset	Recommended columns (CSV)	Why it matters
Per-window	`ts_ms` `f_drive` `A_drive` `loop_err` `pickup_rms_ch1` `pickup_rms_ch2` `dphi` `dt` `coh` `snr_est` `phase_noise_floor` `t_skew_est` `T_elec` `T_tube` `sat_flag` `outlier_cnt` `fault_code` `safe_state` `cal_ver` `cal_crc` `cal_mono_ctr` `snapshot_id`	Reproducible evidence for Δφ, quality, timing, and drift.
Event log	`ts_ms` `event_type` `event_value` `snapshot_id` `note`	Connect disturbances (ESD/EFT/WDG/OPEN/SHORT) to evidence windows.
Threshold placeholders	`TH_dphi_zero_pp` `TH_coh_min` `TH_snr_min` `TH_t_skew_max` `TH_phase_noise_floor_max` `TH_glitch_rate_max` `TH_recover_time_max` `TH_dens_residual_max`	A consistent way to record acceptance criteria without guessing numbers.

Cite this figure: “Minimum validation matrix for Coriolis meters (tests → evidence bus → pass/fail placeholders).” Copy citation

The minimum acceptance set is evidence-based: each test feeds a small set of fields (Δφ, coherence, resonance, timing skew, and fault snapshots) that supports deterministic service and credible performance claims.

MPN note: Example part numbers above are illustrative references for validation planning and BOM discussion. Final selection must match the exact signal bandwidth, noise targets, isolation rating, and environmental standards of the specific meter design.

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FAQs: evidence-based troubleshooting shortcuts

Each answer is intentionally short and starts with what to measure first, so symptoms can be converted into evidence fields (Δφ, coherence, timing skew, resonance, temperature, logs) and routed back to the correct chapter.

Answer rule: 40–70 words each, always includes “what to measure first”, and maps back to chapters.

Cite this figure: “FAQ evidence routing map for Coriolis flowmeter debugging (symptom → fields → chapter).” Copy citation

The FAQ section is designed as an evidence router: symptoms map to a small set of measurable fields that point back to the correct subsystem chapter.

Zero-flow still shows non-zero mass flow—mechanical bias or phase engine drift?

H2-6 · H2-7 · H2-11

What to measure first: log dphi_zero, phase_noise_floor, and coh during a zero-flow hold, plus T_tube. A stable non-zero Δφ with high coherence points to baseline/compensation or mechanical bias; noisy Δφ with coherence drops points to timing/quality-gating issues. First fix: freeze output when coh is low and re-check zero after a controlled temperature point.

Back-links: H2-6 DSP engine H2-7 Temp comp H2-11 Validation

Pickup waveform looks clean, but Δφ is noisy—ADC jitter or AFE noise floor?

H2-4 · H2-5 · H2-6

What to measure first: run a same-input test into both channels and record t_skew_est, dphi_same_input, and phase_noise_floor. If Δφ noise remains with same-input, suspect clock/aperture jitter or channel skew; if noise drops, suspect pickup/AFE noise and EMI rectification. First fix: tighten clock routing and verify simultaneous sampling (e.g., ADS131M04 or AD7606B class) before adding heavy filtering.

Back-links: H2-4 Diff AFE H2-5 ADC/clock H2-6 DSP engine

Works on bench, fails after long cable—CMRR collapse or EMI rectification?

H2-4 · H2-10

What to measure first: measure differential amplitude versus common-mode at the AFE input (cm_amp proxy), then sweep common-mode injection to estimate cmrr_f@k and watch outlier_cnt/coh. If common-mode dominates and leaks into Δφ, CMRR/rectification is the culprit. First fix: use symmetric RC + proper shield termination; add a CMC only after verifying it does not break channel matching.

Back-links: H2-4 Diff AFE H2-10 Robustness

Resonance tracking hunts—PLL tuning or amplitude loop interaction?

H2-3 · H2-6

What to measure first: trend f_drive versus estimated f_res, plus loop_err and drive headroom flags. If frequency hunts while amplitude error also oscillates, loop interaction is likely; if only frequency hunts, PLL gains or noise are likely. First fix: decouple time constants (amplitude loop slower), add rate limits on f_drive, and gate PLL updates when coh drops.

Back-links: H2-3 Drive loop H2-6 DSP engine

Temperature compensation makes drift worse—wrong sensor placement or coefficient overfit?

H2-7 · H2-9

What to measure first: log T_tube and T_elec together with dphi_zero and dens_residual across two temperature points. If drift correlates poorly with the chosen temperature, placement/thermal coupling is wrong; if residuals blow up at edges, coefficients are overfit. First fix: move sensing to a representative tube location (e.g., RTD/PT1000) and constrain the model with guarded ranges + versioned coefficients.

Back-links: H2-7 Temp comp H2-9 Calibration

Sudden spikes during motor start—surge coupling or ground loop?

H2-10 · H2-11

What to measure first: time-align motor-start events with dphi_glitch_rate, outlier_cnt, and cm_amp, and capture a snapshot_id (pre/post windows). If glitches track common-mode jumps, coupling is dominant; if behavior changes with shield termination, ground-loop is dominant. First fix: enforce connector-first surge return (TVS to chassis/return), then A/B the shield strategy and verify coherence gating holds output steady.

Back-links: H2-10 Robustness H2-11 Validation

Two pickup channels mismatch over time—aging, bias current, or filter mismatch?

H2-4 · H2-5 · H2-9

What to measure first: trend pickup_rms_ch1/pickup_rms_ch2, t_skew_est, and a periodic same-input check (dphi_same_input). If timing/phase mismatch grows, suspect RC/C mismatch or ADC channel skew; if amplitude ratio drifts, suspect bias/leakage/aging at the front-end. First fix: use matched RC networks, low-bias in-amps (AD8421/INA828 class), and re-run channel match calibration with versioned storage.

Back-links: H2-4 Diff AFE H2-5 ADC/clock H2-9 Calibration

MCU occasionally resets and readings jump—watchdog strategy or brownout during drive peaks?

H2-8 · H2-3

What to measure first: capture the reset reason (BOR/WDG), minimum rail voltage during drive peaks, and the surrounding A_drive + fault_code with a snapshot_id. If brownout aligns with drive peaks, power integrity is the root; if WDG fires under load, scheduling/ISR budget is the root. First fix: limit peak drive, add soft-start/hold-up, and enforce a deterministic DSP window with a supervisor (TPS3839/MAX706 class).

Back-links: H2-8 MCU/DSP H2-3 Drive loop

Density output stable but mass flow drifts—Δφ scaling, wrap handling, or calibration residual?

H2-6 · H2-9

What to measure first: log raw dphi before scaling, the unwrap/wrap counters, and cal_ver/cal_mono_ctr. Stable f_res with drifting mass flow often indicates Δφ scaling, sign, or unwrap mistakes rather than density modeling. First fix: replay a frozen raw dataset through the phase engine to confirm deterministic outputs, then verify coefficient version/CRC matches the deployed firmware mapping.

Back-links: H2-6 DSP engine H2-9 Calibration

Field recalibration “sticks” but gets lost later—NVM integrity or versioning/CRC?

H2-9 · H2-8

What to measure first: on every calibration write, record cal_ver, cal_crc, cal_mono_ctr, and the commit status, plus power/reset events. If coefficients disappear after resets, the write/commit policy is broken or data is being rolled back. First fix: implement A/B slots with CRC, monotonic counters, and an atomic commit marker; use a controlled power-cut test to validate persistence.

Back-links: H2-9 Calibration H2-8 MCU/DSP

EMI tests pass but site vibration causes errors—coherence gating or sensor health metric?

H2-6 · H2-11

What to measure first: correlate vibration events with coh, outlier_cnt, and any freeze/hold counters. If coherence collapses under vibration, the phase estimate is invalid even if EMI is clean; the system must degrade safely. First fix: tighten coherence-based gating (freeze output when coh is low) and add a tube-health proxy using f_res and amplitude stability; validate using the H2-11 playbook under injected vibration.

Back-links: H2-6 DSP engine H2-11 Validation

Deep filtering makes flow sluggish—latency budget or output smoothing policy?

H2-8 · H2-6

What to measure first: quantify the DSP window length, filter order, and implied group delay (latency), then compare step response settling to the required control/telemetry update rate. If response is sluggish without noise improvement, the smoothing policy is too aggressive. First fix: separate “fast” and “stable” outputs (two time constants), reduce window length where coherence is high, and ensure gating does not cause freeze-like behavior during marginal coherence.

Back-links: H2-8 MCU/DSP H2-6 DSP engine

Consistency rule: The visible FAQ answers below match the FAQPage JSON-LD exactly. If any answer is edited, update both to keep Google-visible structured data consistent with on-page content.

Coriolis Mass Flowmeter: AFE, Phase & Temp Compensation

Coriolis Mass Flowmeter: AFE, Phase & Temp Compensation

Center Idea

System overview: what you’re really measuring (signals & evidence fields)

Drive path design: excitation source + power stage + loop closure

Excitation generation (phase reference quality)

Power stage choice (clean vs efficient)

Feedback sensing (what is the loop actually controlling?)

Loop closure: amplitude control + resonance tracking

Pickup front-end: differential AFE that survives microvolts + harsh wiring

Interface reality (why bench success fails in the field)

Input protection without killing the measurement

Topology options: In-amp vs FDA vs 2-opamp differential

Design targets (tie each spec to a failure mode)

Anti-alias + ADC + clocking: your phase accuracy is a timing problem

ADC architecture choices (what can break Δφ)

Sampling rate strategy (OSR vs compute budget)

Clocking (shared time base and routing discipline)

Analog filtering (anti-alias + matched group delay)

Phase/frequency extraction engines: from raw samples to Δφ, Δt, and resonance

Engine menu (when to use what)

Quality metrics (gate outputs, do not “guess”)

What to measure first

Temperature sensing & compensation: drift budgets and where to close the loop

Temperature sensor options (placement dominates device choice)

Drift budgets (tie each drift to a testable symptom)

Compensation layers (observable inputs + guardrails)

Data model (coefficients, versioning, CRC, and safe switching)

What to measure first (temperature sweeps as two SOPs)

MCU/DSP partitioning: latency, fixed-point traps, and robust diagnostics

Partition by timing contract (DMA/ISR, compute window, outputs)

Fixed-point traps (phase wrap, atan2 scaling, accumulator overflow)

Watchdog & safe-state (measured triggers and predictable recovery)

Logging strategy (ring buffer + event snapshot)

What to measure first (two non-negotiable system tests)

Calibration & field verification: make it serviceable, not mystical

Factory calibration items (mapped to the evidence contract)

Field verification (two toolboxes: self-test injection + known conditions)

Data integrity (lightweight but non-negotiable)

What to measure first (two verification SOPs)

Robustness: EMI, surge, isolation, grounding, and cabling realities

Cabling & shielding (control the return path, avoid loops)

RC filters vs common-mode choke (tradeoffs that impact Δφ)

Surge/ESD strategy (connector-first, energy to chassis/return)

Isolation needs (remote head implications)

What to validate (disturbance mapped to evidence fields)

Validation playbook: the minimum test set that proves it’s real

Minimum acceptance matrix (headline view)

Electrical tests (prove the phase chain lower bound)

Functional tests (prove predictable behavior under stress)

Environmental tests (prove drift control and immunity gating)

Data deliverables (golden capture dataset + threshold placeholders)

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FAQs: evidence-based troubleshooting shortcuts

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