One Stack, Two Sensors: The Engineering Contract

• Stimulus/Excitation creates a time reference. In mag meters, the coil drive is the reference; in vortex meters, the reference can be the expected band and timing derived from sampling/estimator coherence.
• Pickup turns physics into a low-level electrical signal: electrode differential voltage (mag) or quasi-periodic sensor waveform (vortex). The job is not “get a bigger signal,” but preserve information under large common-mode and industrial noise.
• PSD (Phase-Sensitive Detection) performs synchronous extraction: multiply by a reference, then low-pass to reject non-coherent interference. PSD produces I/Q (in-phase/quadrature) evidence that is far easier to validate than raw waveforms in noisy plants.
• ΣΔ ADC stabilizes dynamic range and in-band noise, but introduces filter delay and timing constraints. The design must ensure the PSD reference and ADC time base remain aligned.
• Estimator converts signals into flow and confidence. For vortex, frequency is primary; amplitude/PSD-like coherence becomes a quality metric. For mag, demod magnitude drives velocity while offset/drift is continuously managed.
• Diagnostics + Reporting turns the instrument into a “measurable system,” exposing counters, states, and event logs over HART/Modbus so a field technician can prove what happened.

What Must Be Measured First (Signals + Logs)

The minimum dataset below is sufficient to localize most accuracy/stability failures to one of the six blocks in the stack. If any item is missing, troubleshooting degenerates into inference and repeated site visits.

A) Signals (capture with scope/DAQ)

• Reference waveform: coil drive current/voltage (mag) or digital reference phase/time base (vortex/mag).
• Sensor raw: electrode differential (mag) or sensor waveform (vortex) before heavy filtering.
• AFE output: post-gain/post-filter analog level at the ADC input (proves headroom and anti-alias behavior).
• PSD outputs: I and Q low-pass outputs (or equivalent synchronous channels) with lock/coherence indicators.
• Output interaction: loop current waveform when HART is active, and RS-485 activity when Modbus is active (checks coupling/back-injection).

B) Logs (firmware must expose)

• Gain state + overload counters: PGA setting, saturation count, recovery time markers.
• ADC integrity: overrange/clipping counters, in-band noise estimate, spur flags (if available).
• PSD lock quality: phase drift, coherence metric, I/Q stability statistics.
• Estimator confidence: variance or confidence score, low-flow cutoff state, outlier rejection counters.
• Sensor health: coil open/short flags, electrode impedance trend (mag), vibration/excess-noise flags (vortex).
• Comms counters: HART SNR/BER (or modem status), Modbus CRC/timeouts, frame retries.

Vortex Meter: Frequency Is the Primary Information

• Signal form: a quasi-periodic waveform whose frequency tracks vortex shedding rate. The amplitude is often a secondary metric that indicates sensor coupling quality and SNR.
• Design implication: frequency estimation must remain stable at low flow where amplitude drops and vibration becomes comparable to the wanted signal.
• What must remain intact: timing coherence and waveform shape in the passband. Over-filtering can destroy the phase and introduce estimator jitter.
• Evidence fields: raw waveform spectrum peak, low-flow amplitude trend, vibration-band energy, estimator confidence vs flow.

Electromagnetic (Mag) Meter: Tiny Differential, Huge Common-Mode

• Signal form: electrode differential voltage proportional to fluid velocity (conceptually E ∝ B·L·v), often in the mV–µV regime, while electrode/common-mode levels can be much larger and highly time-varying.
• Design implication: accuracy is limited less by gain and more by common-mode handling, leakage paths, and low-frequency drift (electrode polarization and grounding effects).
• Why PSD is central: synchronous demodulation separates coherent flow-induced components from non-coherent plant noise, but only if the excitation reference is stable and time-aligned with ADC sampling.
• Evidence fields: electrode common-mode range over time, baseline drift rate after demod LPF, excitation reversal settling behavior, coherence/lock metric stability.

Design Outputs: The Measurement Budget (What the Next Chapters Must Satisfy)

• Wanted band: lower/upper frequency limits that must pass with low phase distortion (drives filter corners and coherent timing requirements).
• Amplitude range: minimum detectable signal (low-flow) to maximum (overrange/transient), mapped to AFE gain steps and ADC full-scale headroom.
• Common-mode range: expected electrode/common-mode, including worst-case plant ground offsets and dynamic swings during excitation reversal.
• Drift components: ultra-low-frequency offsets (polarization, bias currents, leakage) expressed as trend over time at the demod output.
• Interferer table: identify dominant interferers by band and coupling path (line frequency, VFD noise, vibration, comms injection), then decide where suppression belongs (mechanical/grounding/AFE/PSD/digital).

This budget is the reference for all later design decisions: AFE CMRR targets, filter topology, PSD reference strategy, ΣΔ OSR, estimator update rate, and diagnostic thresholds.

Why Excitation Sets the Accuracy Ceiling

• PSD needs coherence: synchronous demod assumes the reference and the measured signal share a stable phase relationship. Phase noise and timing drift reduce coherent gain and raise the in-band floor.
• Reversal dynamics create “false flow”: during polarity reversal the coil current and electrode interface can produce transients. If demod integrates those transients, they become a bias at the demod output.
• Current stability dominates repeatability: for mag meters, excitation current stability directly impacts magnetic field strength, and therefore scaling of the electrode signal; it also impacts diagnostic baselines.

Waveform Choices and Polarity Reversal (Mag Meter Focus)

• Square / triangle / sine: square is efficient and easy to generate but creates strong harmonics; sine reduces spectral leakage but needs a cleaner drive and sensing strategy; triangle controls slope and can ease settling analysis.
• Unipolar vs bipolar: bipolar excitation with reversal helps counter electrode polarization and DC drift at the interface; it also enables demod schemes that cancel static offsets.
• Reversal window design: reversal must define a “do-not-measure” period. The usable measurement window begins only after coil current and front-end settle.
• Reference for PSD: a clean timing reference must be exported to the demod/ADC domain so demod integrates only coherent content.

Practical acceptance is not “waveform type,” but whether the system can prove settling time and phase stability with captured evidence.

Driver Blocks That Actually Matter

• H-bridge / full-bridge: enables polarity reversal; switching edge control and recirculation mode affect EMI and settling.
• Current-mode regulation: sense resistor + control loop maintains commanded coil current and limits drift across temperature and supply variation.
• Flyback/recirculation management: coil inductance demands a defined path during switching and reversal; uncontrolled flyback injects spikes into measurement ground and AFE.
• Coil inductance and di/dt: inductance sets current ramp; drive must guarantee predictable ramp and a bounded settling envelope.
• Reference generation: NCO or timer-locked LUT should produce a deterministic phase reference; phase noise and clock domain ambiguity degrade demod quality.

Evidence Fields (Waveforms + Metrics)

• Excitation current waveform (Icoil): steady-state ripple, overshoot at reversal, ramp repeatability cycle-to-cycle.
• Coil voltage (Vcoil): validates recirculation path and flyback behavior; abnormal spikes point to missing clamp paths or layout return issues.
• Regulation error: commanded current vs measured current error and jitter; a direct predictor of scale-factor stability.
• Settling time after reversal: time from reversal command to stable I/Q (or stable AFE output). Defines the “valid measurement window.”
• Reference phase stability: phase jitter or accumulated phase error between reference and ADC sampling time base.

Front-Door Requirements (What Must Not Break)

• Headroom under large common-mode: the AFE must tolerate electrode/common-mode swings without clipping, including transients from excitation reversal and plant ground shifts.
• Low noise where it matters: input-referred noise must be below the minimum low-flow signal in the wanted band; noise outside the band is secondary only if filtering does not distort phase.
• Low leakage and stable biasing: bias currents and leakage paths create low-frequency drift that PSD cannot fully hide if it is coherent with excitation or correlated with reversal timing.
• Diagnosable saturation: if overload happens, it must be detected and counted, with recovery time observable, so estimator can gate invalid windows.

Mag Electrode AFE (Differential Signal, Unfriendly Common-Mode)

• INA vs fully differential amp: select a topology that maintains high CMRR across frequency, not only at DC. Real CMRR is limited by resistor matching and parasitics.
• Input protection without corrupting measurement: protect against ESD/surge while controlling leakage and input capacitance, which otherwise converts fast common-mode edges into differential spikes.
• Input impedance and bias currents: extremely small electrode signals can be distorted by bias current-induced offsets and contamination-driven leakage. Guarding and controlled bias return paths reduce drift.
• Shield termination strategy: cable shields and chassis references must avoid creating ground loops that move common-mode into the differential channel.

In practice, “CMRR in the datasheet” is not the limiting factor; “CMRR after layout + cabling + shielding” is.

Vortex Pickup AFE (Wide Amplitude Range + Vibration Robustness)

• Piezo sensors: charge amplifiers stabilize the transfer from charge to voltage and define the low-frequency behavior; leakage paths and input capacitance dominate drift and sensitivity.
• Strain/capacitive sensors: transimpedance or voltage amplification must protect against mechanical shocks that create large transients, preventing ADC and demod overload.
• Anti-saturation strategy: controlled gain steps and overload flags allow the estimator to reject corrupted windows instead of integrating clipped waveforms into frequency jitter.
• Vibration separation: preserve the wanted band while providing a measurable out-of-band energy metric to flag excessive vibration.

CMRR in Real Life (Why Bench Passes, Plant Fails)

• Resistor mismatch: finite matching converts common-mode into differential; the effect worsens with frequency.
• Input imbalance: parasitic capacitance mismatch and asymmetrical routing create CM-to-DM conversion, especially on fast edges from bridge switching and VFD noise.
• EMI coupling: cable coupling injects high-frequency common-mode that the AFE may rectify or alias into baseband.
• Ground loops: low-frequency common-mode drift becomes a moving baseline; without robust bias/return design, it appears as slow flow drift.

Evidence Fields (What Proves the Front-End Is Healthy)

• Input-referred noise: measured in the wanted band; compare excitation on/off (mag) or flow/no-flow (vortex) to separate intrinsic noise from coupling.
• CMRR vs frequency: validate with injection or observed plant interferers; watch for CM-to-DM conversion peaks.
• Bias-current induced error: drift rate at demod/baseband output correlated with temperature/humidity/contamination suggests leakage + bias sensitivity.
• Saturation event count + recovery time: count overloads and log recovery duration; use it to gate invalid estimator updates.
• Electrode impedance trend (mag): rising impedance/noise indicates fouling, empty pipe conditions, or grounding changes that directly alter noise coupling.

Budget First: What Must Be Protected

• Minimum wanted signal: low-flow conditions define the smallest usable differential (mag) or smallest stable waveform (vortex). The chain must keep this above the in-band noise floor.
• Worst-case interferers: line-frequency components, VFD common-mode bursts, excitation reversal transients (mag), mechanical shocks (vortex), and rare ESD events that can still trigger overload.
• Headroom objective: avoid clipping at the ADC input during worst-case bursts while keeping enough gain for low-flow SNR. This is a margin problem, not a single “gain number.”
• PSD constraint: filtering must preserve a consistent phase relationship in the wanted band; excessive group-delay variation turns coherent extraction into apparent amplitude/phase drift.

Pre-Filtering Strategy (HP → Optional Notch → LP)

• High-pass (HP): remove drift and electrode polarization effects (mag) or slow baseline wander (vortex). HP reduces the risk that ultra-low-frequency offsets consume ADC headroom.
• Notch (optional): suppress 50/60 Hz when it dominates. Use cautiously: notch filters can introduce phase distortion or interact with synchronous demod if the measurement window and reference create beat products.
• Low-pass (LP): enforce bandwidth limits for anti-alias. LP should be set from the wanted band plus a guard region; the key is measurable attenuation at the modulation band edges.
• Order of operations: HP first protects headroom, notch only if necessary, LP last ensures alias control while preserving the phase profile needed by PSD.

The acceptance target is not “a filter type,” but a documented set of corner frequencies and a verified phase/attenuation behavior around the wanted band.

Gain Staging + Overload Evidence (PGA Done Safely)

• Programmable gain: maintain sensitivity at low flow while preventing overload during VFD spikes and excitation reversal settling (mag) or mechanical shock (vortex).
• Overload detection: overload must be flagged and counted. A “quiet” estimator update is only valid when no overload occurred within the integration window.
• Recovery timing: log overload duration and recovery time. This defines invalid windows and prevents demod/estimator from integrating clipped waveforms into biased I/Q or jittery frequency.
• Headroom gating: track a headroom margin proxy (distance-to-full-scale or peak code ratio). Gain changes should be driven by evidence, not by output “smoothness.”

Evidence Fields (What Proves Shaping Is Correct)

• Gain state logs: gain index and change timestamps. Frequent toggling indicates budget mismatch, threshold instability, or unresolved burst interference.
• Overload flags: saturation/clipping counters with window association (e.g., reversal window, comms activity window, VFD bursts).
• Filter corners: HP/LP/notch corner frequencies as configuration + applied values, so field logs can prove the actual shaping profile.
• ADC headroom margin: distance-to-full-scale or peak code ratio; supports safe gain scheduling and validates that bursts are not silently clipping.
• Anti-alias attenuation: verified attenuation at band edges (mod band guard) to prevent out-of-band noise folding into baseband.

Implementation Pipeline (Not a Concept Diagram)

• Mixing: multiply the input by a reference (ref) and a 90°-shifted reference (ref90).
• Low-pass (LPF): remove high-frequency products and keep the coherent baseband components.
• I/Q outputs: I tracks in-phase content, Q tracks quadrature content; together they capture amplitude and phase even when the phase is not perfectly known.
• Magnitude/phase: compute magnitude and phase as evidence (and as estimator inputs) to separate “signal loss” from “phase drift.”
• Estimator role: in mag meters, demod magnitude drives flow; in vortex meters, frequency remains primary while PSD-derived coherence becomes a quality factor and amplitude monitor.

Why Quadrature (I/Q) Is an Engineering Requirement

• Phase uncertainty: electrode delay, front-end group delay, and excitation distortion shift phase. Single-channel demod can misinterpret phase error as amplitude loss.
• Temperature drift: phase drift over temperature becomes a measurable metric (phase vs time) rather than a hidden bias in the demod magnitude.
• Reference imperfections: non-sinusoidal references or waveform distortion still allow extraction when I/Q is available, because the coherent component can be tracked in the complex plane.
• Diagnostics: phase and coherence metrics provide a direct handle on “why accuracy fell” (reference, front-end, timing, or interference).

Lock-In Timing Rules (Coherent Sampling and Jitter Budget)

• Coherent sampling: the ADC sampling clock and reference must remain deterministic relative to each other. Drift between domains smears coherent gain.
• Integer cycles in window: integrate over an integer number of reference cycles to avoid leakage and biased I/Q due to window discontinuity.
• Jitter budget: reference phase jitter and sampling jitter raise the demod output noise floor. Phase stability is therefore a measurable ceiling, not a “nice-to-have.”
• Window gating: invalid windows (overload, reversal settling, comms injection) must be excluded from integration to keep I/Q truthful.

Coherence is a system-level property: excitation reference export (H2-3), shaping/overload gating (H2-5), and AFE CMRR (H2-4) all contribute.

Evidence Fields (What Proves PSD Is Working)

• Reference phase: phase error or jitter statistics between reference and sampling; drift indicates clock-domain ambiguity or unstable reference generation.
• I/Q stability: I/Q time-series variance in a stable condition; excessive variance indicates non-coherent interference, overload leakage, or inadequate shaping.
• Demod LPF output noise: in-band baseband noise estimate; rising noise with stable excitation suggests CM-to-DM conversion or jitter.
• Phase drift over temperature: phase trend vs temperature; identifies front-end delay drift or filter group delay variation.
• Coherence metrics: magnitude-to-variance ratio, phase consistency, or other lock-quality indicators that can gate estimator updates.

Spec-to-PSD Mapping (What Each Parameter Breaks or Enables)

• Modulator order + OSR: controls in-band noise floor via noise shaping. Lower noise helps low-flow extraction, but higher OSR usually increases decimation delay.
• Digital filter group delay: defines a fixed time shift from analog input to output samples. PSD must compensate this delay to avoid systematic phase error.
• Passband ripple / phase nonlinearity: ripple introduces gain error across the band of interest; phase nonlinearity shows up as I/Q drift even with a stable excitation reference.
• Line-frequency notches: on-chip notches can reduce 50/60 Hz interference, but the notch phase behavior must be compatible with the PSD integration window.
• Diff input range + common-mode range: defines overload risk under common-mode bursts and reversal transients; clipping creates coherent bias, not random noise.
• Input impedance: must not load the AFE or distort amplitude/phase; interaction with anti-alias RC networks can move corners and group delay.

Differential Range and Common-Mode Survival

• Overrange is not benign: clipping during bursts (VFD, ESD, reversal settling) can inject deterministic error into demod outputs, appearing as offset drift or false flow.
• Common-mode headroom: the ADC must tolerate expected common-mode movement without pushing the front-end into saturation or violating input linearity.
• Front-end/ADC interaction: the ADC’s sampling front end plus any external RC anti-alias network sets the real transfer function; validate that it preserves phase integrity in the PSD band.
• Counter-based protection: enable and log overrange counters, so estimators can gate updates during invalid windows.

A clean “no-clip proof” (overrange counters + headroom margin) is often more valuable than a marginal noise-floor improvement.

Coherent Sampling with ΣΔ (Decimation Delay Meets Reference Phase)

• Decimation filters add time shift: ΣΔ output samples are delayed versions of the input. PSD reference must be aligned to the ADC output time base, not to the analog event timing.
• Fixed delay vs variable latency: most decimation delay is fixed, but configuration changes (OSR, filter mode) or clock changes can alter effective delay and phase.
• Alignment strategies: (1) propagate reference phase into the DSP domain, (2) compensate using a known decimation delay table, (3) enforce integer-cycle integration windows to reduce leakage sensitivity.
• Practical acceptance: alignment error must be measurable. Phase stability that looks good at the excitation generator is meaningless if output samples drift relative to that phase.

Evidence Fields (What to Log for Field-Proof)

• Effective noise floor (in-band): measure within the PSD band and compare excitation on/off to separate intrinsic noise from coupling.
• Spur table: list dominant spurs (idle tones, line-frequency residuals, VFD-related) and track changes over temperature and supply.
• Decimation delay: record filter mode/OSR and the associated delay value used for compensation.
• Timestamp alignment error: statistics of reference-to-sample alignment error; directly indicates coherence loss risk.
• Clipping/overrange counters: counts and window association; used to gate PSD integration and estimator updates.

Estimator I/O Contract (What Must Be Computed and Logged)

• Inputs: I/Q magnitude and phase, frequency (vortex), amplitude/energy, temperature, overload flags, reference alignment quality, and electrode/impedance diagnostics (mag).
• Outputs: flow value, confidence score, estimator variance, and state flags (empty pipe / partial fill / low-flow cutoff).
• Update gating: estimator updates must be suppressed during invalid windows (overrange, reversal settling leakage, low coherence).
• Traceability: each output should be attributable to a window of evidence fields so field logs can reproduce the decision path.

Mag Meter Estimation (Magnitude → Velocity, with Drift Separation)

• Core compute: map demod magnitude to velocity using calibration factors (geometry and scaling). Keep calibration and drift as separate terms.
• Zero-offset drift: track a zero baseline using controlled conditions (e.g., stable no-flow windows) and freeze updates when coherence is low.
• Temperature compensation: apply temperature coefficients to offset and gain; validate coefficients by logging drift vs temperature rather than relying on static tables.
• Electrode aging: use electrode impedance/noise trends to reduce confidence or trigger maintenance states instead of “forcing” compensation into the flow output.

A stable mag estimator is one that can prove whether a change is real flow or a baseline/aging shift, using logged evidence.

Vortex Estimation (Frequency Is Primary; PSD Supports Confidence)

• Frequency estimation options: zero-crossing is simple but noise-sensitive; autocorrelation improves robustness but depends on windowing; PLL provides smooth tracking but can be pulled by interference.
• Vibration rejection: use band energy and coherence metrics to reject mechanical vibration that does not match vortex shedding characteristics.
• Amplitude-based confidence: amplitude/coherence derived from synchronous extraction can act as a quality factor, gating frequency updates at low SNR.
• Low-flow cutoff: implement a low-flow state that avoids unstable oscillation between “zero” and noisy estimates, driven by confidence rather than raw frequency jitter.

Stability, Update Rate, and State Detection

• Output filtering: choose an update rate and smoothing strategy that matches the application’s dynamics; too fast increases jitter, too slow hides real changes.
• Confidence-weighted updates: reduce update weight when coherence is low or alignment error rises; increase weight when evidence is clean.
• Empty pipe / partial fill (mag): maintain a state machine driven by electrode impedance and noise/coherence patterns; log entry/exit reasons.
• Low-flow cutoff (vortex): base transitions on confidence and variance, not on raw frequency alone; log dwell time and hysteresis decisions.

Evidence Fields (How to Prove Estimator Health)

• Estimator variance: variance of output in steady conditions; rising variance indicates coherence loss, interference, or poor window gating.
• Confidence score: a normalized quality metric (coherence, amplitude, overload absence, alignment) used to gate updates and detect low-SNR conditions.
• Zero-offset trend: baseline drift over time with temperature correlation; separates aging and polarization from true flow changes.
• Temperature coefficients: applied coefficients and residual error; validates whether compensation is working or drifting.
• Empty-pipe detection state: state trajectory with timestamps and reasons; essential for diagnosing intermittent pipe conditions.

Plant Reality Map (Why the Bench Lies)

• Long cables + VFD environment: common-mode bursts and conducted noise raise the ADC in-band floor and inject spurs that look like drift.
• Ground potential difference (GPD): chassis and cabinet earth may not be at the same potential; the resulting current seeks a return path through shields and “quiet” references.
• Shield becomes a conductor: once shield carries current, it is no longer a shield; it becomes part of the measurement return network.
• Surge/ESD energy: protection parts that dump energy into the wrong node can move the measurement reference or force the AFE into recovery events.

4–20 mA Loop Power (Where Ripple Turns Into Measurement Error)

• Loop reference must be explicit: define the reference relationship among loop return, signal ground, and chassis. Ambiguity creates hidden current paths.
• Input protection placement: TVS/filters should protect the interface without injecting high di/dt currents into the analog reference or AFE return.
• Conducted noise coupling: ripple on loop power can modulate AFE bias points and appear as baseline drift or estimator variance increase.
• Measurement gating: keep an event trace so estimator updates can be suppressed during transient recovery windows (brownout, surge clamp, overload).

The loop is both the power source and the disturbance entry point. Treat it as a controlled energy port, not a “DC supply.”

Isolation DC-DC (Isolation Still Has Capacitance and Leakage)

• Switching CM noise: isolated converters can inject high-frequency common-mode noise that the AFE may convert into differential error through imbalance.
• Barrier leakage paths: parasitic capacitance (and any intentional Y-cap) creates a leakage current path that can flow into shields, electrode references, or chassis.
• Where CM chokes help vs hurt: placed at the interface, they block external CM current; placed incorrectly, they can resonate with cable capacitance and worsen the noise band.
• Proof requires spectra: compare conducted noise spectrum on power rails versus the ADC in-band noise spectrum to show causal coupling.

Mag Meter Referencing (Electrode, Coil, Guarding, Leakage Control)

• Separate “big current” and “µV sensing” loops: coil drive return and electrode sensing return must not share uncontrolled impedance that moves with excitation current.
• Electrode referencing choices: define electrode common-mode reference and its stability; uncontrolled reference drift becomes apparent zero-offset drift.
• Guarding strategy: guard structures and leakage management prevent microamp-level leakage from becoming microvolt-level input error.
• Shield termination strategy: choose termination that keeps shield current out of the electrode reference and AFE input network.

For mag meters, “grounding” is part of the sensor model. Leakage and reference movement are indistinguishable from flow unless measured.

Evidence Fields (What to Measure to End Guessing)

• Ground potential difference: measured between chassis, cabinet earth, and signal reference points; high GPD predicts shield current and CM injection risk.
• Shield current: current probe/measurement on shield; sustained current indicates the shield is acting as a return path.
• Isolation barrier leakage: leakage current evidence correlated with ADC noise-floor rise; helps separate converter noise from sensor noise.
• Conducted noise vs ADC noise: compare rail spectrum and ADC in-band noise/PSD; matching features confirm coupling.
• Surge event counter: surge/ESD/brownout counters and timestamps aligned to measurement anomalies.

Integration Principles (Treat Comms as a Managed Disturbance)

• Partitioning: keep analog acquisition and comms switching currents on separate return paths; connect through controlled coupling points only.
• Timing discipline: avoid integrating PSD/estimator windows during comms bursts if comms activity injects measurable interference.
• Test points: define access to loop current waveform, HART coupling node, and RS-485 line signals for field validation.
• Fault containment: comms faults (timeouts, bus contention) must not destabilize the estimator update loop.

HART Overlay on 4–20 mA (FSK Coupling Without Polluting the AFE)

• Coupling network: inject and sense FSK through a defined coupling impedance so the modulation stays inside the loop interface boundary.
• Protect the ADC front end: prevent HART band content from reaching the measurement AFE input path via supply coupling or shared impedance.
• Measurement-friendly practice: use gating rules—if HART TX increases in-band noise or causes overload, suppress estimator updates for that window.
• Validation points: measure HART amplitude at the coupling node, loop current waveform, and receiver quality metrics (SNR/BER).

Modbus / RS-485 (Isolation + Bias/Termination + EMC)

• Isolation: isolate for ground potential differences and fault energy; ensure isolation does not introduce excessive CM noise into analog references.
• Bias/termination: stable bias and proper termination prevent reflections and false edges that drive CRC errors and timeouts.
• EMC hardening: use TVS and controlled return paths; CM chokes can help at the connector but must avoid resonant peaking with cable capacitance.
• Robustness: CRC counters, timeouts, and collision detection should feed event logs without forcing estimator instability.

Data Model (Expose What Proves Measurement Validity)

• Process outputs: flow, temperature, confidence, update rate, and estimator variance.
• Drive and sensor health: excitation/coil current, electrode impedance trend (mag), amplitude/coherence metrics (vortex), overload and alignment quality.
• Diagnostics: fault bits, state flags (empty pipe / partial fill / low-flow cutoff), and surge/overrange counters.
• Comms health: HART SNR/BER and modem status; Modbus CRC error counters, bus collisions/timeouts, and event logs with timestamps.

Exporting only flow is not enough. Export the evidence fields that explain why flow is trustworthy (or not).

Evidence Fields (Comms-Proof and Field-Proof)

• HART SNR/BER: reception quality trends that correlate with plant noise and installation quality.
• Modem status: carrier/activity, retries, error states, and coupling health indicators.
• Modbus CRC errors: CRC counters and distribution over time; rising errors suggest termination/bias/EMC issues.
• Bus collisions/timeouts: half-duplex contention or master timing; log to isolate comms policy problems from analog issues.
• Event logs: timestamped records linking comms activity, surge counters, and measurement invalid windows.

Minimal Evidence Set (MES) to Capture on Every Incident

• Waveform snapshots: excitation reference, coil current, AFE input (diff + common-mode), ADC output window.
• PSD proof: I/Q traces, magnitude/phase, I/Q variance (steady-flow window), coherence/alignment metric.
• Noise proof: in-band noise floor, spur table (line/VFD/idle tones), overrange counters.
• Estimator proof: confidence score, variance, gate/freeze state, last update timestamp.
• Comms proof: HART SNR/BER + modem status; Modbus CRC/timeouts/collisions; update timing jitter.
• Event ring buffer: last-N events with timestamps and key fields (surge/overrange/settling/comms burst).

The Debug Ladder (Pass/Fail + Next Branch)

1. Step 1 — Capture excitation reference + coil current
   • Capture: reference phase/frequency, coil current waveform, reversal/settling window.
   • Pass: stable amplitude/period; settling completes within expected time; no unexpected phase jumps.
   • Fail branch: localize to drive path (bridge/control), coil open/short/saturation, or reference time-base integrity.
2. Step 2 — Confirm AFE linearity (no saturation) and common-mode within range
   • Capture: AFE diff input, input common-mode, overload flags/counters.
   • Pass: zero (or explainable) overload counts; common-mode stays inside the AFE/ADC headroom window.
   • Fail branch: localize to shielding/grounding/leakage paths, protection clamp placement, or gain staging settings.
3. Step 3 — Inspect demod I/Q (steady flow should look steady)
   • Capture: I(t), Q(t), magnitude/phase, I/Q variance; coherence/alignment indicator.
   • Pass: stable I/Q with small variance in steady-flow windows; phase drift consistent with temperature and known delays.
   • Fail branch: localize to reference alignment error, decimation delay mismatch, excitation distortion, or external interference inside the demod band.
4. Step 4 — Confirm ADC noise floor and spurs
   • Capture: in-band noise floor, spur table, overrange counters; compare “comms on/off” and “excitation on/off.”
   • Pass: noise floor meets in-band target; spurs are identified and stable; overrange counters explain any invalid windows.
   • Fail branch: localize to clocking/decimation configuration, switching noise coupling, resonance with CM chokes/cables, or comms contamination.
5. Step 5 — Cross-check estimator confidence vs raw amplitude/frequency
   • Capture: confidence score, estimator variance, raw amplitude/frequency, gate/freeze state.
   • Pass: low confidence forces gating (freeze/low weight), preventing wild output; confidence tracks raw SNR/coherence.
   • Fail branch: localize to gating logic, state-machine thresholds (empty pipe / low-flow cutoff), or “invalid window” detection.
6. Step 6 — Verify comms frames and update timing (HART + Modbus)
   • Capture: HART SNR/BER and modem status; Modbus CRC/timeouts/collisions; task timing jitter and timestamp alignment.
   • Pass: comms errors do not disturb estimation; update period is stable and consistent with the estimator pipeline.
   • Fail branch: localize to PHY termination/bias/EMC, isolation-induced CM noise, scheduler priority inversions, or buffer overrun.

Tip for field reproducibility: every “Fail branch” should drop an event with timestamp + the MES snapshot, so intermittent issues become replayable.

Design-In Diagnostic Features (So the Ladder Works in the Field)

MPNs above are reference building blocks (examples), selected to match the diagnostic functions: injection, sensing, protection, temperature sanity, and persistent event retention.

Comms Diagnostics MPN Examples (HART + RS-485)

• HART modem / PHY examples: AD5700, AD5700-1 (HART modem family examples for FSK overlay designs).
• RS-485 transceiver examples: SN65HVD1781, MAX1487 (robust RS-485 PHY options).
• Isolated RS-485 examples: ADM2582E, ISO1410 (integrated isolation class examples for harsh ground environments).
• Digital isolation examples (general): ADuM141E, ISO7741 (logic isolation building blocks used around comms/ADC domains).