Weighing / Batching: Bridge Amplification to 24-Bit ADCs
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Weighing and batching accuracy is won in the signal chain: stable bridge excitation, low-drift amplification, a 24-bit ADC with predictable latency, and filters tuned for mains and vibration. Reliable batching comes from evidence-driven calibration and “read-when-stable” criteria, plus isolation/protection that blocks noise without shifting zero.
H2-1. Center Idea
The goal is not “more bits.” The goal is a signal chain that stays predictable when temperature, vibration, and field noise change.
Weighing and batching accuracy is won in the signal chain: stable bridge excitation → low-noise amplification → a 24-bit ADC with predictable latency → filters tuned for 50/60 Hz and mechanical vibration → calibration that separates offset, gain, and temperature drift → isolated outputs that do not re-inject common-mode noise.
H2-2. System Map & Error Budget
The fastest way to real accuracy is to turn “mystery drift” into a quantified budget: noise, drift, nonlinearity, and latency—each with a test.
A weighing/batching channel can be treated as a series of error injection points. Instead of debating components in isolation, design and debug are driven by a shared budget: input-referred noise (µVrms), temperature drift (µV/°C), nonlinearity (ppm), and latency (ms). The batching outcome (overshoot/underfill) is dominated by how these four terms interact with settling time and the “stable” decision gate.
The system map below is intentionally “measurement-first.” Each block is paired with a single metric that can be verified on the bench or in production. This prevents two common failure patterns: (1) chasing ppm-level calibration while a millisecond-scale latency shift drives batching error, and (2) adding protection/isolation that silently re-injects common-mode noise into the front end.
- Bridge sensor (Wheatstone) → metric: sensitivity (mV/V) + wiring-induced offset (µV).
- Excitation (ratiometric) → metric: Vexc ripple + drift; verify remote sense if cable runs are long.
- INA/PGA → metric: input-referred noise + overload recovery; validate CMRR under real EMI.
- 24-bit ADC (ΔΣ typical) → metric: histogram σ + 50/60Hz spur + group latency vs data rate.
- Digital filter → metric: step settling time to ±counts (not only “noise after filtering”).
- Calibration → metric: residual curve (ppm) across load + temperature; separate offset vs gain vs drift.
- Batching gate → metric: stable-flag timing distribution; correlate with overshoot/underfill.
- Isolation/output → metric: CM injection test → code jump; verify isolator supply does not pollute analog ground.
H2-3. Bridge & Excitation Fundamentals
Bridge measurement is inherently ratio-based (mV/V). If excitation moves, the bridge output moves with it—unless the chain preserves the ratio.
Load cells and strain-gauge bridges are specified in mV/V: the differential output is proportional to the applied load and proportional to the excitation voltage. This creates a non-negotiable design rule: excitation stability sets the upper bound of measurement stability unless the signal chain is made ratiometric.
Three mechanisms tie excitation quality directly to the reading: (1) amplitude drift scales the bridge differential output; (2) excitation ripple is multiplied into the differential signal and later amplified; (3) excitation and wiring shift the bridge input common-mode, stressing the allowable common-mode range of the amplifier/ADC and degrading effective rejection under real EMI.
Engineering definition of ratiometric measurement
The chain is ratiometric only when excitation variation is canceled in the measurement result—not merely “shared.” Typical implementations tie the ADC reference to excitation (or a derived ratio) so that the final code tracks load, not excitation.
Remote sense (Kelvin) — when long cables turn into drift sources
Cable resistance reduces the actual excitation at the bridge and introduces temperature dependence. If excitation is regulated only at the source, the bridge sees a different voltage than assumed. Remote sense closes the loop on the bridge terminals, reducing cable-drop-induced gain error and temperature-correlated drift.
H2-4. Bridge Amplification (INA / PGA)
The amplifier must translate microvolt-level bridge signals into a clean ADC input without turning EMI, overloads, and protection leakage into hidden drift.
Bridge outputs are typically microvolts to millivolts at full scale. The amplifier stage is therefore not a generic gain block; it is the point where measurement performance is decided by four coupled constraints: input-referred noise (including 1/f), bandwidth/settling, common-mode rejection under real EMI, and protection robustness. Optimizing one dimension can degrade another, so the design intent must be explicit.
Noise is a spectrum, not a single number
Wideband noise sets the short-term repeatability floor, while 1/f noise and input offset drift dominate slow “zero wandering.” Evaluate noise as input-referred and confirm the measurement bandwidth, otherwise comparisons across solutions become misleading.
Gain allocation determines saturation risk and usable ENOB
Excessive front-end gain increases susceptibility to shock/vibration and can force saturation. Saturation is damaging even if brief: the overload recovery time effectively adds latency and destabilizes “read-when-stable” batching gates. Too little gain wastes ADC dynamic range and reduces effective resolution.
CMRR degrades with frequency — why EMI “bends” weight readings
High-frequency common-mode interference couples through parasitics and finite CMRR, converting into differential error that looks like weight drift. A practical validation is common-mode injection (near-field or capacitive coupling) and observing code drift, not just checking a datasheet CMRR figure.
Protection components can create leakage paths that dominate microvolt errors
ESD/surge protection may introduce leakage current and voltage-dependent capacitance. In microvolt-level systems, these effects can shift the offset with temperature and humidity. Protection design must be tested as part of the front end, not added after the fact.
H2-5. 24-bit ADC Selection & Configuration
“24-bit” becomes meaningful only when paired with ENOB, noise spectrum, mains rejection, data rate, and predictable latency/settling behavior.
In weighing and batching, the ADC is not judged by its nominal resolution but by the measurable stability delivered under the required throughput. The practical target is a combination of input-referred noise (repeatability floor), mains spur control (50/60 Hz), linearity (mid-scale residuals), and latency + settling (batching overshoot/underfill sensitivity).
Delta-sigma basics that matter in batching
ΔΣ ADCs trade time for resolution. Higher OSR typically lowers noise and improves rejection, but increases group delay and can lengthen the settling time after a step change. In batching, settling time often dominates the “stable” decision latency even when the noise floor looks excellent.
Key specifications to interpret as a system
Input-referred noise and PGA integrated noise determine the repeatability floor at the chosen bandwidth. INL sets the achievable mid-scale accuracy without multi-point fitting. Data rate and latency determine throughput and overshoot risk, and can change together when OSR/filter modes change.
Reference strategy (REF): ratiometric vs external
A ratiometric reference cancels excitation drift when the reference tracks excitation (or a derived ratio). External references can improve absolute scale stability, but will expose excitation drift unless compensated. REF drive impedance, decoupling, and return paths must be treated as part of the analog system to avoid injecting noise into the measurement.
H2-6. Digital Filtering for Weighing
Filtering is not “lower cutoff equals better.” The correct target is mains suppression + vibration rejection + predictable step response for batching stability.
Weighing filters must simultaneously address three realities: mains interference (50/60 Hz and harmonics), mechanical vibration (platform resonance, conveyor impulses), and the batching requirement for predictable response. A filter that produces a quiet trace but unpredictable settling will destabilize “read-when-stable” gates and increase overshoot/underfill risk.
Mains control: notch vs synchronous averaging
Notches (single or dual for 50/60 Hz) and synchronous averaging (integer-cycle integration) both suppress mains components, but differ in delay and sensitivity to frequency drift. The selected method must be validated by observing FFT spur removal and by checking that settling time stays within the batching cycle budget.
Multi-stage strategy: deglitch → notch → smooth
In noisy environments, a staged pipeline often performs better than a single heavy low-pass. A short deglitch/median stage removes impulsive spikes, the notch targets mains, and a final low-pass reduces residual vibration while keeping the step response predictable.
The batching-critical output: step response and settling time
Settling time is the control knob that links filtering to batching error. A slower, more aggressive filter may reduce RMS noise but delay stability detection, causing late shutoff and overshoot. This must be quantified with step tests and a noise-versus-settling curve.
H2-7. Calibration Stack
Calibration must be a reproducible stack: each step has entry conditions, a measurable output, and saved evidence (version + residuals).
A weighing system becomes field-ready only when calibration is treated as a parameter ladder rather than a single “do calibration” action. Each layer removes a specific error class (offset, gain, nonlinearity, structure-induced position sensitivity) and produces parameters that can be versioned, audited, and re-validated after repairs or component swaps.
Zero / Tare: offset capture with stability conditions
Zero is valid only when the signal has settled. A stable-window rule is required (time window + standard deviation/peak-to-peak + slope limit). Store the offset together with capture conditions (temperature, data rate, filter mode, and stability window) so “zero drift” can be traced to causes.
Span: gain fit using trusted standard load and repeatable sampling
Span should be performed after the zero stage and under a defined loading procedure. Sample only after the stable gate is met and keep a repeatability statistic (std dev, and outlier count). Save a span residual entry so later drift can be differentiated from linearity or temperature effects.
Linearity: multi-point or piecewise correction validated by residual curves
Linearity correction is complete only when the residual curve across the full range is within the target band. Use multiple points (low/mid/high and additional points where residuals peak). Save the residual curve snapshot as evidence and as a baseline for “shape change” caused by aging or mechanical changes.
Cornering (position sensitivity): structural error correction
In multi-support or multi-sensor platforms, the same total load may produce different readings depending on position. Cornering uses a defined corner-load test sequence to derive correction coefficients and then verifies corner residuals. Treat this as a structural calibration layer, not an electronics tweak.
Shunt calibration: useful for self-check, not a replacement for real loads
Shunt injection can validate the analog chain and detect drift, but it cannot represent creep, hysteresis, or cornering errors. Use shunt as a maintenance diagnostic and to flag abnormal gain/offset behavior, while keeping final scale accuracy anchored to standard-load calibration steps.
H2-8. Temperature & Long-Term Drift
Drift is manageable only after it is classified and measured: electronics drift, sensor creep, hysteresis, and aging demand different evidence and compensation.
Field complaints often collapse into “it drifts,” but drift has distinct physical sources. Separating them is essential: electronics drift (offset/REF/excitation/leakage changes), sensor creep (slow time-dependent change under static load), hysteresis (different load/unload paths), and aging (baseline shape changes over weeks/months). Each source requires a different measurement and compensation strategy.
Distinguish sensor creep from electronics drift
Use two complementary tests: (1) a “chain baseline” check (known input state) to reveal electronics drift without sensor mechanics, and (2) a long static-load record to reveal creep behavior. If the baseline drifts without load changes, electronics or leakage is likely dominant. If drift follows a time-dependent curve under fixed load, creep is a likely contributor.
Temperature compensation that does not inject short-term noise
Prefer piecewise coefficients or lookup tables (temperature-indexed offset/gain) with filtered temperature sampling. Slow-loop correction can address ultra-low-frequency drift, but must use a low update rate, deadband, and maximum step limit so that short-term noise and vibration are not converted into weight error.
When recalibration is required (trigger-based)
Recalibration should be triggered by evidence: zero drift exceeds a defined threshold relative to range, temperature moves beyond the compensation coverage, static-load drift shape changes compared to baseline, or hysteresis loop error exceeds the allowed band. Triggers convert “it drifted” into a predictable maintenance policy.
H2-9. Batching Dynamics
Batching accuracy is won in time: latency, impact loading, and mechanical rebound can dominate error even when static weighing is accurate.
In batching, the reading must be accurate within the cycle time. Dynamic error is often driven by a mismatch between measurement latency/settling and the feed profile, plus short disturbances from impact load, vibration, and rebound after stop events. This makes the “read-when-stable” decision a first-class engineering interface.
Coarse / fine / jog feeding as a measurement-timing problem
A multi-stage feed profile reduces overshoot risk only when measurement latency and settling are budgeted. Coarse feed is sensitive to latency (stop action arrives after the true weight has already crossed the target). Fine feed and jog pulses are sensitive to stability detection quality, because impact and vibration can create “false stable” moments.
Stable criteria (window + slope + variance)
A stable flag should require a time window and bounded statistics: (1) a window duration (or N samples), (2) a slope limit to prevent rebound tails from being accepted as stable, and (3) a variance (or standard deviation) limit to avoid accepting vibration as stability. These thresholds should be tied to measured repeatability and step settling behavior.
Impact load and rebound: avoid stability decisions on the spike
Stop events often introduce an impact spike and a rebound tail. Filtering can suppress the spike, but the most robust prevention is to ensure the stable flag transitions only after the step response tail enters the defined band. The stable trigger timestamp becomes evidence for “reading validity.”
H2-10. Isolated Outputs & Field Interfaces
Isolation is not just safety language. Its measurement value is blocking ground loops and common-mode injection that can re-enter the microvolt front end.
Field interfaces often create unexpected return paths for noise. Isolation should be designed as a boundary map: define ground domains, place the isolation barrier at the right point (analog-side or digital-side), and verify that common-mode disturbances and isolated power switching do not re-inject noise into the bridge/ADC chain.
Where to isolate: analog-side vs digital-side
Digital-side isolation is common because it keeps the analog chain compact and quiet, but fast edges and isolated DC-DC noise can couple back into analog ground through parasitics. Analog-side isolation can simplify field grounding for 4–20 mA/0–10 V, but places tighter requirements on isolated analog power and drift.
Interface viewpoint: how noise re-enters measurement
4–20 mA generally tolerates long cables and ground differences better than 0–10 V, which is more sensitive to shared ground noise and drop. RS-485 adds common-mode range and surge/ESD stress; common-mode events can appear as measurement jumps or CRC errors depending on barrier placement and return paths.
Isolated power “re-injection” (high-frequency coupling)
Isolated DC-DC switching noise can couple through parasitic capacitances and shielding into the analog domain. Treat isolated power as part of the measurement system: control return paths, place filtering at the correct domain, and verify by comparing noise spectra and by applying common-mode step disturbances.
H2-11. EMC / Surge / Protection for Weighing Front-End
Protection must keep the front-end alive without corrupting microvolt accuracy: leakage, parasitics, and recovery behavior can shift zero and delay stability.
Long sensor cables bring ESD, EFT (fast transients), and surge energy into the weighing head. The engineering challenge is not adding protection by default, but controlling where the disturbance current flows and ensuring that protective components do not introduce leakage, mismatch, or extra latency that degrades µV-level measurement. A field-ready design treats EMC as a measurable trade space: suppress common-mode injection, prevent differential over-stress, and keep the excitation/reference behavior predictable during and after events.
Cable-driven stress: classify by path (CM vs DM)
Many plant disturbances enter as common-mode (cable-as-antenna), then convert to differential through imbalance and finite CMRR. Differential stress can saturate the INA/ADC chain and create long recovery tails that delay the stable flag in batching.
Protection can destroy accuracy in three ways
(1) leakage paths create effective input bias and shift zero, (2) parasitic capacitance/RC reshape bandwidth and worsen high-frequency CMRR, and (3) clamp events can leave the front-end saturated, increasing settling and stability delay.
Filtering: suppress transients without breaking timing
Analog filtering must not hide the system’s step response tail behind extra group delay. Prefer symmetrical, well-matched networks and verify their impact on 50/60 Hz spur, noise floor, and post-event settling time.
Return paths: keep surge current out of analog ground
Place high-energy clamps so their return current closes locally and does not flow through the ADC reference/analog ground region. A quiet “front-end local ground” loop (bridge–INA–ADC–REF) must remain intact and short.
Example protection/filter BOM (typical MPN options)
The list below gives common, engineer-recognizable part families for weighing front-ends. Final selection depends on cable length, environment, required withstand levels, and acceptable leakage/capacitance.
ESD / low-cap clamps (signal lines)
• TI TPD1E10B06 (single-line ESD)
• Nexperia PESD2CAN (ESD diode family, low C)
• ST ESDAxx series (low-cap ESD arrays, choose by line count)
TVS for higher-energy events (board entry)
• Littelfuse SMF/SMBJ TVS families (select voltage/power class)
• Vishay SMBJ series (unidirectional/bidirectional options)
• Semtech SMF/SMBJ TVS families (common footprint options)
Common-mode choke (CM noise control)
• TDK ACM2012 / ACM2520 series (signal-line CM chokes)
• Murata DLW/DLM series (CM choke families)
• Würth WE-CMB/WE-CNSW families (CM choke options)
Series resistors / RC damping (matched networks)
• Vishay TNPW (thin-film, low drift)
• Susumu RG (precision thin-film)
• Panasonic ERA (precision resistors; pick tolerance/TCR)
Precision capacitors (symmetry matters)
• Murata GRM (MLCC; pick dielectric carefully)
• TDK C series (MLCC families)
• KEMET C0G/NP0 options for low tempco (when values allow)
Input protection switches (optional, for harsh wiring)
• TI TPS2660 (industrial eFuse, surge/OV/OC protections)
• ADI/LTC surge-stopper families (high-energy front-end protection)
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H2-12. FAQs (Accordion)
Each answer stays on the evidence chain: 1-sentence short answer → 2× what to measure → 1× first fix → link back to the relevant chapter.
Readings drift after warm-up—bridge creep or amplifier offset drift?
Short answer: Warm-up drift is often dominated by bridge/structure creep unless the same drift appears with a shorted/known input.
- What to measure: log a long static-load curve (time → reading) and extract early/late slope.
- What to measure: repeat with bridge input shorted (or equivalent test input) to isolate amplifier/ADC offset drift.
- First fix: delay tare/zero until the drift slope falls below a defined threshold, then evaluate whether amplifier offset drift still dominates.
Good repeatability but wrong absolute weight—span calibration or ratiometric reference issue?
Short answer: If repeatability is good, the error is usually scale factor (span/calibration path) or a broken ratiometric assumption.
- What to measure: capture span residuals across 2–3 standard loads (error vs load) and check linear trend.
- What to measure: verify excitation/reference behavior: log excitation and ADC reference (or ratiometric ratio) across time and temperature.
- First fix: re-run zero → span with versioned coefficients and confirm the excitation/reference relationship is stable during the procedure.
Stable at low rate, noisy at high rate—ADC OSR/latency tradeoff or EMI folding?
Short answer: Higher data rate reduces OSR and widens effective bandwidth, so noise can rise from both ΔΣ settings and EMI folding.
- What to measure: compare histogram + FFT at two data rates (same wiring) and track 50/60 Hz spur and wideband floor.
- What to measure: repeat during a known EMI event (contactors/motor switching) to see if high-rate mode amplifies bursts.
- First fix: lock a baseline rate/OSR that meets cycle time, then evaluate EMI mitigation only after the baseline is characterized.
50/60Hz hum won’t go away—filter notch misaligned or excitation ripple?
Short answer: Persistent mains hum is often a notch alignment problem unless excitation ripple injects the same frequency into the ratiometric path.
- What to measure: FFT around 50/60 Hz and check whether the peak moves with the local mains frequency (not just nominal 50/60).
- What to measure: measure excitation ripple spectrum and verify the ADC reference/excitation relationship under load.
- First fix: align notch/averaging to the measured mains frequency (or integer-cycle averaging), then reassess excitation ripple contributions.
Sudden jumps when nearby contactor switches—common-mode injection or ground loop?
Short answer: Contactor-related jumps usually indicate common-mode injection or a return-path/ground loop that converts CM into differential error.
- What to measure: run a common-mode step/disturbance test and log code jump amplitude + recovery time.
- What to measure: compare noise spectrum before/after the isolation boundary (or at least before/after interface connection).
- First fix: correct return paths and isolation boundary so disturbance current closes locally and does not flow through the analog front-end ground.
Weight overshoots in batching—settling-time too long or “stable” criteria too loose?
Short answer: Overshoot is typically a timing mismatch: either settling/latency is too long or the stable flag triggers during rebound (too loose).
- What to measure: log per-batch overshoot distribution and overlay stable trigger time on the measured step response.
- What to measure: capture step settling time (to a defined band) and correlate with overshoot across batches.
- First fix: tighten stable criteria using slope + variance so “stable=1” occurs on the response tail, not on the impact spike.
Fast dosing causes underfill—read-after-stable delay or filter group delay too big?
Short answer: Underfill under fast dosing often comes from excess delay (group delay + stable gating delay) that consumes the dosing window.
- What to measure: measure stable-flag latency distribution (event → stable=1) across batches.
- What to measure: estimate filter group delay at the chosen data rate and compare against cycle-time budget.
- First fix: rebalance filtering vs stability thresholds to meet a hard time budget while keeping 50/60 Hz and vibration under control.
Corner loads read differently—mechanical issue or cornering calibration missing?
Short answer: If the error is position-dependent and repeatable, it is usually missing/incorrect cornering calibration rather than random noise.
- What to measure: run a corner test matrix and record residuals (each corner/position → reading error).
- What to measure: compare repeatability (std dev) at each position to separate noise from structural bias.
- First fix: perform cornering calibration and version the corner coefficients before concluding a mechanical redesign is required.
Shunt calibration matches, but real load is off—what assumption broke?
Short answer: Shunt calibration validates the electronics path but does not fully represent real mechanical loading or bridge behavior, so equivalence can break.
- What to measure: compare shunt-based gain vs real standard-load gain across multiple points (error shape matters).
- What to measure: log shunt response vs temperature and confirm the assumed injection equivalence holds.
- First fix: treat shunt calibration as a health check and rebuild span/linearity using real loads for the accuracy baseline.
RS-485 comms errors correlate with noisy readings—isolator supply noise or cabling/termination?
Short answer: When comms errors and reading noise move together, isolated power/return-path coupling is a prime suspect before blaming termination.
- What to measure: trend CRC/error counters alongside noise floor (FFT) and known switching events.
- What to measure: compare isolated DC-DC switching noise spectrum to the front-end noise spectrum (look for correlated bands).
- First fix: improve isolated power filtering/return paths so iso switching current does not couple into the analog domain; then reassess cabling/termination.
After ESD event, zero offset changed—input protection leakage or amplifier damage?
Short answer: If zero shift appears after ESD, the most common causes are leakage/contamination around clamps or a damaged input stage with altered bias.
- What to measure: measure post-event offset shift and recovery time (how long until stable criteria is satisfied again).
- What to measure: check noise floor and input bias indicators with a controlled/shorted input to separate leakage from device damage.
- First fix: inspect/clean clamp and high-impedance nodes (flux residue/moisture) and verify leakage before swapping the amplifier.
Temperature swing shifts zero every morning—temp comp missing or excitation/reference drift?
Short answer: Morning shifts are typically missing/incorrect temperature compensation unless excitation/reference drift tracks the same curve.
- What to measure: build a temperature → zero-offset curve and quantify slope/segments (not just a single point).
- What to measure: log excitation/reference (or ratiometric ratio) vs temperature to see if the reference path is drifting with temperature.
- First fix: implement segmented coefficients or a lookup-table compensation with slow update and a defined re-calibration trigger threshold.
