Energy Harvesting Front-End for PV/TE/Vibration IoT Nodes

Q: Why does it charge in daytime, but keeps rebooting at dusk / cloudy conditions? What 3 waveforms should be checked first?

Treat this as a weak-source cold-start or gating-margin issue. Capture VIN, VSTORE, and (VLOAD plus EN/PG marker). If VSTORE shows a UVLO sawtooth, load enable is too early, hysteresis/debounce is insufficient, or leakage (storage + protection + PCB) consumes the harvest. Raise VLOAD_EN so the load turns on only when VSTORE is higher, add hysteresis/debounce, and reduce leakage; retest with the load disabled.

Q: MPPT makes it worse: algorithm issue or sensing/control overhead eating the gain? How to tell?

Decide using net energy evidence. Compare stored-energy gain (or VSTORE rise) over the same time window with MPPT ON versus OFF, while logging EN/PG and sampling activity. If MPPT reduces net gain, overhead (sampling current, compute duty, frequent Voc/I measurements) is likely larger than the benefit, or the loop is hunting. Temporarily switch to a low-overhead mode (constant-V or slower Voc sampling), reduce sampling rate, and rerun ON/OFF A/B to separate algorithm limits from overhead limits.

Q: TE source is only tens of mV—why can it never cold-start? What leakage paths are most common?

TE cold-start is often leakage-limited because available power is tiny. Capture VIN(TEG), VSTORE rise with load disabled, and UVLO/bias-rail behavior. Common leakage paths include TVS/ESD clamps with non-negligible leakage, always-on dividers/monitoring, storage self-discharge, PCB contamination/moisture, and reverse paths through protection/rectifier structures. Measure leakage at operating voltage and hot temperature, replace/remove high-leak elements, clean PCB, and ensure MPPT/load are gated until the bias rail is safely established.

Q: Fractional Voc vs P&O: how to choose for micro-power systems, and what is the deciding criterion?

Choose the method that maximizes net harvested energy after sensing/control overhead. Fractional Voc fits when intermittent sampling is acceptable and overhead must be minimal, especially for slower-changing sources. P&O can track faster changes but typically costs more sensing/compute; in nW–mW regimes it may lose net energy if run too often. Start with a conservative sampling interval, then validate by comparing net stored-energy gain for two settings (or MPPT ON/OFF) under similar conditions.

Q: Piezo vibration has high open-circuit voltage but won’t charge storage—did rectification/clamping get placed wrong?

Often yes: clamp/rectifier placement can dissipate energy instead of transferring it. Capture piezo terminal voltage (open and loaded), the rectified node waveform, and VSTORE rise under controlled vibration. Common causes are a clamp placed before energy transfer, clamp threshold too low, excessive rectifier loss, or protection creating a hidden shunt at peaks. Verify the clamp protects without shorting the energy path, confirm charge packets actually reach storage, and reduce leakage on the rectified/storage nodes.

Q: Low-light PV efficiency is very poor—is it inductor choice or control mode?

At micro-power, control mode is often the first suspect because fixed-frequency behavior can waste more than it delivers. Capture VSTORE slope with load disabled and any switching signature (PFM bursts vs continuous switching). Inductor issues also matter: high DCR dominates at tiny currents, wrong L can force inefficient operation, and saturation can disrupt cold-start progression. Confirm the converter enters PFM/DCM at low power, then tune L (lower DCR, suitable Isat) and capacitor selection (DC-bias derating) to match the min on/off timing and target power range.

Q: Does a bigger supercap always improve stability? Why can a larger one make it worse (self-discharge / slower startup)?

Bigger storage can be worse in weak-source regimes because it increases time-to-ready and raises leakage risk. Capture VSTORE rise time to the enable threshold with the load disabled and estimate total leakage (PMIC + storage + protection + PCB). If leakage is comparable to source current, VSTORE will stall. Select storage primarily by leakage/self-discharge, not capacitance. Use smaller C with strict load gating, or lower-leak alternatives, and validate that VSTORE continuously rises under worst-case conditions.

Q: TX burst collapses the system—should storage, gating, or power-path be changed first?

Use the droop signature to decide. Capture VSTORE, VLOAD, and EN/PG during the burst (mark burst start with a GPIO if possible). If VSTORE collapses below UVLO, the system lacks usable energy window: enable the load only when VSTORE is higher, widen the safe VSTORE window, or add storage/efficiency. If VLOAD dips but VSTORE stays high, power-path resistance/limits dominate: improve ideal-diode/load-switch path, add local decoupling, and shape the burst with current limiting or soft-start.

Q: TVS/ESD is protection—why can it cause never-starts? How to balance protection and leakage?

In harvesting systems, protection leakage can exceed the available source current. Capture VSTORE rise with load disabled and estimate leakage at operating voltage and hot temperature. Causes include TVS reverse leakage at the working voltage, ESD clamps shunting the source, and always-on dividers/monitors. Use ultra-low leakage ESD parts on sensitive nodes, place heavy clamps where they cannot starve cold-start, select higher standoff when safe, and validate leakage across temperature before BOM freeze.

Q: How to quickly estimate how much average power the source can really provide in the field?

Estimate available power, then cross-check with storage energy slope. For PV, sample a few I–V points near Voc and near the expected operating voltage to bound usable power. For TEG, estimate internal resistance and use matched-load maximum-power sizing as an order-of-magnitude guide. Universal cross-check: disable the load, measure VSTORE rise over a fixed time, convert ΔVSTORE to stored energy change, and divide by time to bound average harvested power under the same environment.

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Core Idea

An energy-harvesting front-end succeeds only when cold-start, leakage budget, and burst delivery close together: harvest energy must reliably accumulate in storage, then be released to the load under controlled gating without collapsing below UVLO.

H2-1 — Scope & Boundary: Where “Edge Power & Backup” Stops

Define the engineering boundary for edge-device power-path and hold-up design, with measurable success criteria and clear exclusions to avoid scope drift.

What this page covers (minimum context, maximum usefulness)

24 V Industrial Entry PoE PD (48 V → bus) 12 V Adapter Entry Power-Path + Hold-up Fault Evidence

Edge-device “backup” means ride-through / hold-up: a small, controlled energy buffer that bridges input dips or short outages long enough to complete critical actions (log flush, alarm uplink, safe-state), typically milliseconds to minutes. It is not a facility UPS.

In scope (deep-dive points)

Power entry realities: dips, brownouts, cable drop, connector resistance (only as they affect protection and hold-up).
Power-path blocks: eFuse, hot-swap, ideal diode / ORing, UVLO/OVP, reverse protection, controlled turn-on.
Hold-up building blocks: supercap / small battery, charge-limiting, isolation of “keep-alive” rail.
Controlled shutdown: sequencing critical loads vs non-critical loads, deterministic drop trajectory.
Diagnosable faults: trip reasons, waveform evidence, thermal evidence, repeatable validation tests.

Out of scope (explicit exclusions)

UPS architectures, data center power distribution, rack PDU design.
Full battery-pack BMS (balancing, cell chemistry deep dive, multi-kWh storage systems).
Energy harvesting / MPPT front-end design (belongs to Energy Harvesting Front-End).
Cloud/OTA/security platform architecture; certification walkthroughs.

Practical boundary rule: this page owns the energy delivery path (entry → protected bus → controlled rails) and small hold-up (ride-through), while avoiding large-scale backup or energy-generation topics.

Figure F1 — Scope map: power-path + hold-up (and what is deliberately excluded)

Diagram style note: labels are intentionally minimal to keep mobile readability; details are expanded in text cards below.

Backup definition: time-scale + “critical action” framing

Hold-up should be sized for a target action window, not for “continuous power.” Typical windows:

10–200 ms: ride through connector bounce, short dips, PoE renegotiation glitches.
0.5–10 s: graceful shutdown, event logging, last-gasp message, controlled actuator release.
10–180 s: short outage tolerance where only the keep-alive rail stays powered.

Engineering success depends on reproducible waveforms and clear fault attribution (trip reason + temperature + event timeline), not on theoretical “backup capacity.”

H2-2 — Power Path Topology: Entry → Controlled Turn-On → Bus → Critical Loads

Build a power path that survives real transients, avoids MOSFET SOA abuse, and supports deterministic “keep-alive” behavior.

Three practical topology templates (edge-scale, not UPS-scale)

The following templates cover most edge devices. Selection depends on the input source, the need for a short hold-up window, and whether only a subset of loads must remain alive.

Template A: Single input + eFuse/hot-swap + DC/DC Template B: Dual input ORing (main + backup) + shared bus Template C: Shared bus + keep-alive branch (critical-only hold-up)

eFuse is a “fast electronic breaker” optimized for protection + diagnostics (fault pin, current reporting, programmable limits). It excels at preventing damage and enabling root-cause evidence.

Hot-swap is a “controlled turn-on + SOA manager” that shapes inrush and keeps a pass-FET inside safe operating area during capacitor charging and fault events.

Ideal diode / ORing controls current direction and switchover behavior. In hold-up designs, the top priorities are reverse-current blocking and glitch-free transfer—not only low forward drop.

Figure F2 — Three topology templates (single-column diagram, minimal labels)

Topology selection deliverable: scenario → template → must-check specs → minimum validation

The table below is designed as an execution tool. It prioritizes measurable indicators and a minimum validation set to prevent “it works on the bench but fails in the field.”

Scenario signal	Recommended template	Key specs to lock early	Minimum validation set
Single entry (24V/PoE/12V) with large input capacitance or unknown load inrush.	Template A	Inrush control method; MOSFET SOA margin; UVLO hysteresis; fault response time; current limit accuracy; thermal protection behavior.	Waveforms: V_IN, V_BUS, I_IN/sense, GATE, FAULT. Tests: cold plug-in, step load, hard short, brownout ramp.
Main power plus small backup source; requirement is “no reboot” through short outage.	Template B	Reverse-current blocking; switchover glitch; priority behavior; ORing forward drop vs thermal; backup ESR impact under burst.	Waveforms: both input currents (direction), V_BUS, ORing control signals. Tests: main drop-out, fast return, burst load during transfer.
Only critical rails must survive; large loads can drop immediately to reduce required stored energy.	Template C	Keep-alive gating leakage; critical rail UVLO and hold-up window; load shed threshold; charge limit into storage; drop trajectory determinism.	Waveforms: V_BUS, V_KEEP, EN/PG timeline. Tests: outage events with “critical action” completion criteria (log flush / last-gasp).

Boundary reminder: the goal is a field-stable power path and edge-scale hold-up. Large-scale backup (UPS/PDU) and energy harvesting belong to separate pages.

H2-3 — Front-End Architectures: Rectification → Boost/Buck-Boost → Storage

Map practical source-to-storage chains for PV, thermoelectric, and vibration harvesters, and choose the right topology using a decision path (not guesswork).

Architecture templates by source type (PV / TE / Vibration)

Rectify Cold-start path Boost / Buck-Boost MPPT / Matching Storage-first

PV (DC source) typically uses a direct buck/boost/buck-boost conversion stage with a lightweight MPPT loop. Under low irradiance, efficiency often improves when the converter shifts into PFM / burst sampling rather than maintaining continuous regulation.

Thermoelectric (ultra-low voltage) frequently requires a dedicated cold-start mechanism (self-oscillating, transformer-coupled, charge-pump, or coupled-inductor assisted) to build a usable bias rail before handing off to a higher-efficiency main converter.

Vibration (AC source) starts with rectification (bridge or synchronous). For piezoelectric sources, a voltage clamp + energy extraction stage is often necessary because open-circuit voltage can be high while usable power remains limited by source impedance and waveform.

Placement rule: storage-first (harvester → storage → gated delivery) is usually more robust than “regulate-first” when the load is bursty or the harvester is weak/variable, because regulation overhead can consume the harvested energy before storage accumulates.

Figure F3 — Architecture map with markers (M = measurement, C = control, L = loss)

Markers highlight practical probe points (M), control hooks (C), and dominant loss risks (L) without crowding the diagram.

Selection path: choose architecture with six yes/no questions

1) DC or AC input?

AC sources require a rectification decision first (bridge vs synchronous), and piezo sources often require a clamp location decision.

2) Is cold-start mandatory?

If the minimum source voltage/power cannot sustain control circuitry, a dedicated cold-start path must build bias before main conversion begins.

3) Is the source impedance high?

High-impedance sources (common in TE/vibration) cannot tolerate high sensing or control overhead; matching/MPPT must be lightweight.

4) Is the load bursty?

Bursty loads favor storage-first: accumulate energy, then deliver through gated power-path to prevent repeated UVLO resets.

5) What storage dominates leakage?

Supercaps can leak enough to block cold-start in weak conditions; thin-film batteries can be more leakage-friendly but capacity-limited.

6) Is intermittent operation acceptable?

If yes, burst sampling and intermittent regulation can increase net harvested energy by reducing always-on overhead.

Architecture choice should be validated by waveforms and energy accounting (storage gain vs control overhead), not by “steady-state efficiency” alone.

When the wrong architecture is chosen: symptom → first evidence → next probe

“Charges on bench, fails in low light / cold”

Evidence: V_STORE never reaches enable threshold
Next probe: leakage paths, rectifier drop, IQ in cold-start phase

“High open-circuit voltage, but no usable energy”

Evidence: V rises without I; storage barely increases
Next probe: clamp/extraction placement, rectifier loss, source impedance

“One step forward, two steps back (sawtooth)”

Evidence: V_STORE ramps then collapses repeatedly
Next probe: load gating threshold, UVLO hysteresis, hidden leakage

Common probes: V_IN, V_RECT, V_STORE, EN/PG, and one “loss suspect” node (rectifier drop or leakage branch). Keep instrumentation loading in mind.

H2-4 — Cold-Start: the Hard Part (Thresholds, Leakage, Sequencing)

Cold-start success is about leakage budgets and deterministic gating. A system can look “fine” after warm-start while still failing in true 0 V conditions.

Cold-start vs warm-start: definitions that prevent false confidence

Cold-start is the transition from 0 V (or too-low-to-run) to a stable bias rail that can support control logic. Warm-start resumes operation with remaining storage voltage. Field failures often happen because only warm-start was tested.

Practical rule: if a design cannot repeatedly reach a stable bias threshold from 0 V under worst source conditions, MPPT and regulation tuning will not rescue it.

Figure F4 — Cold-start state machine + key thresholds (minimal labels)

The three cold-start killers (and how to treat them as budgets)

Leakage budget

PCB contamination / moisture
TVS/ESD leakage (often underestimated)
Storage self-discharge
Divider resistors too low

Rectifier drop

Diode drop dominates at low voltage
Synchronous rectifier can help, but adds overhead
Placement errors waste available energy

Control IQ budget

Always-on sensing can eat harvested power
Cold-start mode must be “ultra-lean”
Handoff should minimize brownout loops

Core reality: if harvested input power is below the sum of leakage + rectifier loss + cold-start overhead, the system will never cross the first threshold—no matter how good MPPT is later.

Sequencing strategy: bias first → MPPT next → load last (mandatory gating)

Cold-start sequencing prevents oscillation. The load should remain gated until the storage node crosses a reliable threshold with hysteresis.

Phase 1 — Bias build: reach a stable internal rail (VCS_start) that can run minimal control logic.
Phase 2 — MPPT/matching enable: increase net energy capture with controlled overhead (VMPPT_en).
Phase 3 — Load connect: connect only after storage is strong enough to avoid immediate collapse (VLOAD_en).

Field-stable gating behaviors

Hysteresis is essential. Without it, the system can chatter at thresholds and consume more energy than it harvests.

Keep the “critical load set” small during cold-start. Non-critical loads should remain off until warm-start stability is confirmed.

Symptoms → first evidence → next step (cold-start triage)

Repeated resets: V_STORE reaches a level then collapses → check UVLO hysteresis and load gate timing (EN/PG timeline).
Sawtooth storage voltage: charge/discharge cycles → isolate leakage contributors (TVS/ESD, storage self-discharge, divider network).
Low-temp / low-input failure: marginal thresholds → quantify rectifier drop and cold-start IQ under worst conditions.
“Works when load is disconnected”: load steals energy before bias stabilizes → enforce gated delivery and re-check VLOAD_en setting.
Very slow ramp: net input too small or control overhead too high → reduce sensing cadence, consider burst operation, re-evaluate matching/MPPT cost.

Minimum probe set during cold-start: V_IN, V_RECT, V_STORE, EN/PG/UVLO pins (or equivalents). Instrument loading should be minimized when power is in the µW–mW range.

H2-5 — MPPT in Practice: Methods, Sensing Cost, and Tracking Speed

Make MPPT a budgeted engineering decision: net energy gain must exceed sensing, control, and perturbation overhead—especially in µW systems.

MPPT is not “free”: define net gain before choosing a method

In micro-power harvesters, MPPT can reduce delivered energy if measurement and control overhead consume more than the tracking benefit. A practical MPPT plan starts with a net-gain view:

Tracking benefit: extra harvested energy from operating closer to the true maximum power point.
Paid costs: voltage/current sensing, sampling cadence, control computation, and unavoidable perturbation loss.
Decision rule: enable MPPT only when the expected benefit is larger than the full overhead over the same time window.

Field-stable sequence: ensure cold-start repeatability and storage ramp stability first, then add MPPT with measured overhead.

Method matrix: applicability, sensing needs, and overhead

PV / TE / Vibration V-only vs V+I Overhead level

P&O (Perturb & Observe)

Best for: PV, many variable sources
Sensing: V (+I if available)
Overhead: Medium
Risk: can chase wrong peak in multi-peak conditions

Fractional Voc

Best for: PV (slow variations)
Sensing: V only
Overhead: Low–Medium (needs periodic open-circuit sampling)
Risk: sampling windows interrupt energy capture

Constant-V

Best for: tight budgets, mild dynamics
Sensing: V only (or fixed target)
Overhead: Low
Risk: misses MPP when conditions shift

Fractional Isc

Best for: PV when short sampling is acceptable
Sensing: current sample event
Overhead: Medium–High
Risk: sampling perturbation can be costly for weak sources

TE impedance matching control

Best for: TE (high source impedance)
Sensing: minimal V/I trend is often enough
Overhead: Low–Medium
Risk: “accurate” sensing may cost more than it saves

Constant-Power / coarse search (principle)

Best for: bursty or fast-changing conditions
Sensing: V trend + storage growth rate
Overhead: Medium
Risk: avoid continuous scanning in µW regimes

This page keeps algorithm details out-of-scope. The focus is method selection, sensing cost, and practical validation evidence.

Figure F5 — MPPT method map + “overhead vs benefit” intuition (trend-only)

The chart shows relative placement only. It encourages a measurement-led plan: track more only if storage growth rate improves net energy.

Sensing cost: what is paid for voltage and current information

Voltage sampling cost

Divider leakageADC energyCadence

Divider networks and always-on monitors can block cold-start. Prefer intermittent sampling windows and high-impedance sensing where feasible.

Current sampling cost

Shunt lossDCR sensingSwitch-node estimate

Shunts are straightforward but add loss and drop. DCR sensing reduces resistive loss but needs clean filtering. Switch-node estimation can be “trend-good” without extra components, but accuracy varies.

Practical priority: reduce “always-on” sensing in weak-source phases. Lower sampling cadence often yields more net energy than faster MPPT tracking.

Dynamics: fast tracking is not automatically energy-saving

Slow-changing sources: reduce cadence; avoid continuous perturbation.
Fast-changing sources: use bounded updates and stable fallbacks; do not scan continuously.
Weak-source phases: prioritize storage ramp stability; MPPT can be downgraded to a coarse rule until energy margin grows.
Multi-peak / intermittency: prefer principles that limit wasted perturbations; validate with storage growth rate, not only instantaneous power.

Selection decision tree (method choice under budget constraints)

Only V available and budget is tight: Constant-V or Fractional Voc (PV) with intermittent sampling.
V + I available and dynamics moderate: P&O with bounded step size and bounded cadence.
TE with high impedance: impedance-matching style control with minimal sensing; avoid high-overhead “accuracy-first” approaches.
Rapid transients / bursty conditions: coarse tracking plus stable fallback; let storage growth confirm net gain.

This page intentionally avoids algorithm deep-dive; it provides selection rules and validation evidence planning.

H2-6 — Micro-Current Boost: Efficiency from nW–mW (PFM, DCM, Inductor Choices)

In nW–mW harvesters, light-load behavior and startup power are decisive. Converter mode and passive realities often dominate over “headline efficiency”.

Why fixed-frequency control can lose at micro-power

At very light load, each switching event carries an energy cost. A fixed-frequency PWM converter can pay that cost continuously even when the load is tiny, collapsing net efficiency.

PFM / pulse-skipping: reduces average switching events to cut overhead.
DCM operation: transfers energy in packets; helps when average power is low and intermittent.
Tradeoff: ripple and response can increase, but net energy delivery often improves in µW regimes.

Loss intuition across nW → µW → mW (which loss dominates where)

nW–µW: “static wins”

IQ, leakage, divider loss
protection leakage
always-on monitors

µW–mW: “events matter”

switching-event overhead
gate-drive / control costs
mode selection (PFM/DCM)

mW+: “conduction rises”

R_DS(on), inductor DCR
rectifier conduction loss
thermal & copper losses

Common pitfall: optimizing conduction loss while IQ/sensing/leakage dominate the operating point. Fix the dominant term first.

Figure F6 — Mode map + efficiency-vs-load shape (trend-only)

The curve is conceptual: it highlights why light-load modes (PFM/DCM) and low overhead can matter more than peak-efficiency numbers.

Inductor and capacitor realities (why “looks fine” parts still fail)

Inductor selection pitfalls

L value: impacts peak current and energy packet size in DCM/PFM.
DCR: matters more as power rises; not always the first-order loss at µW.
Saturation current: pulse modes can hit higher peaks than average power suggests.
Leakage/packaging: layout and parasitics can add hidden loss.

Capacitor selection pitfalls

DC bias: ceramic capacitors can lose effective capacitance at operating voltage.
Too-large C: increases startup time and can worsen weak-source ramp behavior.
Leakage: storage and protection leakage can dominate in nW–µW.
Ripple role: mode transitions change ripple; storage placement must tolerate it.

Validation tip: measure ramp time and storage growth rate with the chosen L/C. If growth slows unexpectedly, suspect DC-bias capacitance loss, hidden leakage, or pulse-mode peak current limits.

Parameter checklist (what determines startup power and light-load success)

Startup & weak-source

startup power threshold
minimum input range
cold-start enable thresholds
handoff stability (avoid brownout loops)

Light-load efficiency

IQ (and mode-dependent overhead)
minimum on/off time
PFM/skip behavior
switching-event energy cost

Power-path limits

maximum switch current
rectifier loss (diode vs sync)
inductor saturation margin
layout parasitics that raise loss

Use this checklist as a mechanical review: if the operating point is in µW, prioritize IQ, startup threshold, and mode behavior before chasing conduction loss.

H2-7 — Storage Management: Supercap vs Thin-Film vs Rechargeable (Harvest Scale)

At harvest scale, storage selection is a leakage and lifetime decision first. Capacity alone can be a trap when self-discharge dominates.

Storage is not “bigger is better”: define the system KPI first

Energy harvesting systems often fail because storage and protection leakage consume more power than the source can deliver. Treat self-discharge and leakage as first-class KPIs:

P_{harvest_avg}: average harvested power under the weakest expected condition.
P_{loss_total}: storage self-discharge + protection leakage + divider/monitor leakage + PCB leakage.
Pass/fail rule: if P_{loss_total} ≳ P_{harvest_avg}, storage will never accumulate energy reliably.

Practical order: confirm repeatable cold-start and a rising Vstore trend with load disabled, then optimize capacity and burst capability.

Three storage classes: what each one “buys” and what it “costs”

Leakage / Self-discharge Pulse power Charge limits

Supercap

Strength: strong pulse power
Cost: leakage/self-discharge sensitivity
Good fit: burst loads, short ride-through

Thin-Film Battery

Strength: low leakage, stable keep-alive
Cost: small energy, limited pulses
Good fit: ultra-low average power

Rechargeable (small)

Strength: higher energy density
Cost: stricter charge rules
Good fit: longer autonomy targets

Selection rule: choose the storage class that keeps P_{loss_total} below the weakest P_{harvest_avg}, then size for burst energy.

Figure F7 — Storage node and leakage KPI callouts (system-first view)

Figure focus: the storage node (Vstore) must keep rising under weak source conditions; leakage is often the top-level limiter.

Charge termination and protection (high-level, harvest-friendly)

Protection must be sufficient but low-overhead. Over-engineering the charger can consume the harvested budget.

OVP (voltage ceiling)

avoid irreversible over-voltage
use a clear top-of-charge threshold
limit quiescent overhead

Trickle / current limit

prevent weak-source collapse
reduce brownout oscillation
support stable ramp

Temperature window

simple allow/deny gating
avoid “always-on” sensing
protect lifetime in field

Harvest-scale principle: keep protection logic simple and gated. If monitoring is always-on, it becomes part of P_{loss_total}.

Series/parallel and balancing: when it is needed (and when it is not)

At harvest scale, extra management can add leakage and complexity. Use series/balancing only when voltage requirements force it.

Need balancing: series storage is required to meet a bus voltage beyond a single element rating.
Often avoid balancing: a single element (or low series count) covers the operating range with acceptable droop.
Hidden cost: balancing networks and monitors can become a continuous leakage path.

Design traps and a short evidence chain (why “never starts” happens)

Trap storage leakage eats the harvest budget. Trap TVS/ESD leakage or divider loss prevents Vstore from ever reaching enable thresholds.

Step 1: disable the load and confirm Vstore rises continuously under the weakest condition.
Step 2: isolate suspected leakage paths (TVS, dividers, monitors) and compare Vstore ramp rate.
Step 3: repeat under temperature/humidity extremes to expose PCB leakage or component leakage drift.

If Vstore ramps only after removing a protection or sensing path, the “fix” is often leakage control—not more capacity.

H2-8 — Power-Path to the Load: Ideal Diode, Load Switch, and Burst Handling

Deliver harvested energy reliably to real loads. Burst handling requires gating, thresholds, and waveform evidence—not guesswork.

Power-path elements (harvest scale): roles and why each matters

Ideal diode / ORing

prevents backflow
selects inputs cleanly
reduces path drop

Load switch

enables “store-then-release”
isolates brownout loops
supports staged start

Soft-start / current limit

tames inrush and bursts
prevents Vstore collapse
improves repeatability

Without gating and limiting, burst loads can turn a “charging” system into a permanent brownout oscillator.

Burst handling: a simple, field-stable enable strategy

For TX bursts and wake-up compute events, the most reliable approach is threshold-gated delivery:

Charge phase: Vstore climbs to a readiness threshold (VREADY).
Enable phase: load switch turns on with soft-start / limit.
Burst phase: the task runs while Vstore droops but stays above UVLO with margin.
Protect phase: if Vstore crosses UVLO, turn off the load and return to charge.

This chapter stays at harvest scale; it does not expand into backup-system architecture.

Two-source case (harvest + auxiliary): minimal priority rules

Prefer harvest when it can sustain charging and load delivery.
Use auxiliary only when Vstore cannot meet task thresholds (avoid frequent cycling).
ORing/ideal diode is used to prevent backflow and unstable handover.

Keep the policy simple: clean handover and no backflow are more important than clever scheduling at µW–mW.

Waveform evidence: what Vstore, Vload, EN, and PG should look like

Most field failures are visible on a 4-channel scope capture. The goal is to separate “insufficient energy” from “poor gating/thresholds”.

Success signature: EN rises → Vload ramps smoothly → Vstore droops but recovers → PG stays stable after blanking.
Failure signature: EN rises → Vstore crosses UVLO → repeated sawtooth resets → PG chatters or never asserts.

Figure F8 — Harvest-scale power-path + simplified “SUCCESS vs FAIL” waveforms

Use these signatures as a quick field check. If Vstore repeatedly crosses UVLO after EN asserts, the fix is usually gating thresholds, current limiting, or leakage reduction—not more MPPT aggressiveness.

Debug evidence chain (a fast way to isolate the real limiter)

Energy evidence: Vstore growth rate, droop depth, and recovery time during a burst.
Gating evidence: EN/PG timing, UVLO threshold crossings, blanking/debounce windows.
Path evidence: ORing direction (no backflow), switch drop, and current-limit behavior during inrush.

A clean 4-channel capture (Vstore/Vload/EN/PG) usually separates “insufficient harvest” from “power-path misbehavior” in one iteration.

H2-9 — Protection for Harvest Inputs: OVP / Clamp / Reverse and Real-World Transients

Harvest sources live in long wires, outdoor exposure, and mechanical stress. Protection must survive transients without consuming the leakage budget needed for cold-start.

Protection design rule: survive the real world without killing cold-start

Input protection is not optional, but harvest-scale systems have a unique failure mode: protection leakage and voltage drop can prevent energy from ever accumulating. A practical design starts with placement and budgets:

Leakage budget first: clamp/TVS leakage must not dominate the weak-source power budget.
Drop budget first: avoid adding series drop that effectively raises the startup threshold.
Return-path discipline: ESD and surge energy must have a short, intentional return path.
Do-no-harm test: with load disabled, Vstore must rise continuously under the weakest condition.

If adding protection turns a clean ramp into a stall or sawtooth, leakage or drop is the likely root cause—not MPPT behavior.

PV protection (DC outdoor / long wires): must-do, caution, and common misuses

Must-do

reverse polarity tolerance
night backflow blocking
basic ESD return path
input over-voltage guard

Use with caution

TVS leakage vs survivability
series drop from protection
always-on dividers/monitors
clamp placement and loops

Common misuses

large clamp loop area
TVS chosen without leakage check
backflow path left uncontrolled
protection “works” but cold-start fails

Field symptom pattern: Vstore rises in lab, but stalls outdoors or after rain/humidity changes—often pointing to leakage paths and return-loop issues.

TE protection (ultra-low voltage): protect the cable, not the budget

Must-do

cable ESD management
short return path planning
bias current discipline
cold-start safe placement

Use with caution

any clamp with leakage
unnecessary series elements
always-on sensing chains
protection that adds drop

Common misuses

PV-style “strong clamp” copied to TE
monitoring that consumes µW budget
ESD current returning through control silicon
startup that never reaches bias threshold

TE systems are leakage-limited. If protection leakage is not audited, the converter may never reach the warm-start region.

Vibration / piezo protection (open-circuit spikes): clamp and provide a safe dissipation path

Must-do

open-circuit spike clamp
explicit dissipation path
rectifier stress control
safe high-voltage spacing

Use with caution

clamp that shorts energy away
placement far from input pins
large loop inductance
leaky clamp that hurts startup

Common misuses

rectification only, no clamp
clamp return path not controlled
spikes hit the converter first
temperature/humidity drift causes failures

Piezo sources can generate high voltage under open-circuit conditions; protection must prevent overstress while keeping leakage acceptable at harvest scale.

Fast evidence chain: is protection helping or harming?

Step 1: disconnect the load and confirm Vstore ramps smoothly.
Step 2: compare “with vs without” suspected leakage paths (clamp, divider, monitor) and check ramp rate changes.
Step 3: repeat under humidity/temperature extremes to expose leakage drift and return-path weakness.

Figure F9 — Protection placement map and the “leakage budget” callout

Placement message: protection must provide an intentional return path and survive spikes, while keeping leakage and drop within the cold-start budget.

H2-10 — Measurement & Debug Hooks: How to Prove You’re Actually at MPP

Engineering success is proving net gain, not believing the algorithm. Use a minimal measurement set and A/B energy evidence to confirm MPPT benefit.

Minimal measurement set (proof-oriented, harvest-friendly)

A harvest system needs the smallest set of signals that can explain energy flow and burst events without consuming the budget.

Must-have

Vin (source voltage)
Vstore (storage node)
Iin (or an equivalent estimate)
Event marker (EN / burst GPIO)

Nice-to-have

mode flag (PFM / limit)
UVLO indicator
sample window marker
simple status pin

Avoid always-on

continuous dividers
always-on current sense
high-rate sampling
debug LEDs

Proof is energy over time. A clean event marker prevents mistaking load bursts for “MPPT failure”.

How to prove MPPT benefit: A/B net-energy evidence (not snapshots)

To confirm operation near MPP, compare net stored energy with MPPT enabled versus disabled under the same environment class.

A/B setup: MPPT ON vs MPPT OFF (or a fixed operating point) with identical load policy.
Metric: net change in storage energy over a window (ΔE_store), not a single-point Pin.
Environment classes: shading/illumination changes (PV), gradient changes (TE), spectrum changes (vibration).
Decision rule: if extra sampling/control overhead reduces ΔE_store, MPPT “activity” is not a real gain.

A fast tracker that burns power can lose to a slower method at µW–mW. Net energy is the only verdict.

Common false conclusions (instrument loading and sampling overhead)

Pitfall measurement can change the operating point of weak sources. Pitfall sampling overhead can hide the true gain.

Instrument loading: meter resistance, probe capacitance, and ground lead inductance can distort Vin behavior.
Sampling overhead: dividers, ADC duty cycle, and sense amplifiers can consume the same order of power as the harvest.
No event marker: burst-induced Vstore droop is misread as MPPT instability without EN/burst tags.

Production and field debug hooks (simple, low-overhead)

Test points: Vin, Vstore, GND, EN, PG/UVLO (short ground return for probes).
Isolation pads: optional 0Ω links to disable dividers or clamps for leakage diagnosis.
GPIO indicators: short pulses for “MPPT step / limit / UVLO” states (no telemetry platform required).
Periodic self-check: a brief MPPT on/off compare window to confirm the gain persists in the field.

Figure F10 — Energy budget proof loop (measure points + ON/OFF compare)

Focus: the only trustworthy verdict is net stored energy over time under comparable conditions. Keep measurement overhead within the harvest budget.

H2-11 — Design Workflow: From Source Characterization to BOM Selection

A harvesting front-end fails most often because the workflow skips a “system budget” step: source limits, cold-start thresholds, leakage budget, storage self-discharge, and burst handling must close together. This section provides an executable 7-step flow, with a sizing checklist and example material numbers for fast BOM narrowing.

7-step workflow (deliverables-first)

Each step produces a measurable artifact. If an artifact cannot be produced (or cannot be reproduced), the design is not ready for BOM finalization.

Step 1 — Characterize the source: capture I–V (PV), V–I vs ΔT (TEG), or open-circuit peak + equivalent capacitance/impedance (piezo). Deliverable: a “source envelope” (min/typ/max).
Step 2 — Choose the front-end architecture: rectification + boost/buck-boost + MPPT/MPPC mapping to the source envelope. Deliverable: architecture choice + why alternatives fail.
Step 3 — Close the cold-start loop: prove 0 V → bias rail → MPPT enable → load enable sequencing under worst case (low light / low ΔT / low vibration). Deliverable: cold-start waveform set.
Step 4 — Pick MPPT method with sensing cost: decide what can be sensed continuously vs intermittently (Voc sampling, current sense, or constant-V). Deliverable: “MPPT energy overhead” estimate.
Step 5 — Size conversion parts for nW–mW: pick mode (PFM/DCM), min on/off timing, inductor DCR and saturation, and capacitor DC-bias reality. Deliverable: efficiency-vs-load trend (measured or vendor curve).
Step 6 — Select storage + protection to match leakage budget: supercap vs thin-film vs rechargeable, with OVP/termination and a strict leakage allowance for TVS/ESD/PCB. Deliverable: “leakage budget table” + pass/fail margin.
Step 7 — Validate net energy gain and field debug hooks: compare MPPT on/off net stored energy; add test points and event markers (EN/PG/load burst). Deliverable: proof of net gain + debug evidence chain.

No false reset Cold-start passes worst case Leakage budget closes Burst load stays controlled Net energy gain is measurable

System KPIs that must be budgeted (not guessed)

Leakage budget: sum of PMIC IQ + storage self-discharge + protection leakage + PCB contamination leakage.
Cold-start power: minimum source power needed to reach the bias rail and keep it above UVLO hysteresis.
Burst energy: energy per load event and acceptable droop window (Vstore_hi → Vstore_lo).

Figure W1 — Harvesting design workflow swimlane (artifacts + iteration loop)

Read left-to-right inside each lane. The iteration loop is triggered by cold-start failures, leakage budget misses, or missing net energy gain.

Sizing checklist (engineering-level, no long derivations)

Use the following sizing relations to prevent “reads well but cannot be built”. Replace placeholders with measured worst-case data.

Burst energy: E_burst ≈ V_load × I_burst × t_burst (add margin for DC/DC inefficiency and startup overhead).
Storage capacitor for droop window: C ≥ 2·E_burst / (V_hi² − V_lo²). Pick V_hi/V_lo from UVLO + load requirements.
Average power closure: P_src,avg × η − P_mppt − P_conv,iq − P_leak ≥ P_load,avg.
Leakage budget sanity check: at low Vstore, leakage current often dominates. Ensure I_leak,total is comfortably below the available source current at the intended operating point.
Cold-start pass criteria: worst-case source must raise Vstore above the bias/UVLO threshold and survive the first MPPT and load enable events without collapsing below UVLO hysteresis.

Fast “design smell” checks

Leakage smell: Vstore climbs, then stalls below enable threshold for minutes/hours → protection/PCB/storage leakage too high.
Sequence smell: sawtooth Vstore with periodic resets → load enable too early or UVLO hysteresis too tight.
MPPT smell: enabling MPPT reduces net stored energy → sensing/compute overhead larger than harvested gain in that regime.

BOM sizing inputs to record (paste into a design doc): – Source: PV I-V curve (min/typ/max), TE ΔT range + Rin, or piezo peak + Ceq/Req – Cold-start: min VIN / min source power to reach bias rail – Storage: target Vhi/Vlo window, self-discharge, temperature range – Load: Iavg, burst profile (Iburst, tburst, duty), minimum Vload – Leakage budget: PMIC IQ + protection leakage + storage leakage + PCB leakage – Validation: MPPT on/off net energy gain method, waveform capture points (VIN/Vstore/Vload/EN/PG)

BOM selection guide (example orderable part numbers)

The table below lists example material numbers commonly used in harvesting-scale designs. Final selection must match voltage/current, cold-start behavior, leakage budget, temperature range, and availability.

Block	When it fits	Example material numbers	Must-check parameters
PV / general harvester PMIC	DC sources with MPPT/MPPC, storage charging, optional regulated rail	TI BQ25570 TI BQ25505 TI BQ25504 ST SPV1050	Cold-start VIN, operating VIN min, IQ/ship mode, storage OVP, MPPT method, max switch current
Ultra-low voltage TE (TEG) start	Very low VIN (tens of mV) TEG sources; transformer-assisted start	ADI LTC3108	Minimum start VIN, transformer requirement, regulated rails options, leakage at storage node
Piezo / vibration harvester	AC/piezo with high peak voltages; rectification + energy extraction	ADI LTC3588-1	Input clamp behavior, rectifier loss, output regulation mode, startup energy requirement
Energy harvesting “power supply” + regulated output	Need to combine harvesting with a regulated output and/or prioritize stored energy	ADI LTC3330 ADI LTC3331	Quiescent current, regulated output options, how it sources load vs charges storage, cold-start behavior
Power mux / source priority	Harvest + auxiliary input (e.g., primary cell) with clean handover	TI TPS2121 (wide VIN) TI TPS2113A (lower VIN)	VIN range, RON, switchover droop, reverse conduction blocking, ILIM behavior
Ideal diode / ORing	Minimize loss when ORing sources or isolating storage from backfeed	ADI LTC4412 (controller + external PFET) TI LM66100 (integrated ideal diode)	Reverse leakage, forward drop at target current, control pin behavior, startup/enable thresholds
Load switch / gating	Strict sequencing (enable only when Vstore high enough); prevent early load collapse	TI TPS22916 TI TPS22917	OFF leakage, RON, controlled turn-on, reverse current blocking (if needed), enable thresholds
Input ESD / transient clamp (low leakage)	Long lines or ESD-prone handling; leakage must stay inside budget	Nexperia PESD5V0S1UL (ultra-low leakage ESD) Littelfuse SMAJ5.0A (TVS; verify leakage)	Reverse leakage at operating voltage, clamp level, capacitance (signal lines), surge rating
Inductor example (micro-power boost)	PFM/DCM boost stages; need known DCR and saturation headroom	Coilcraft LPS4018-103MRC (10 µH class)	DCR, Isat/Irms, core loss at switching regime, size vs efficiency
Storage examples	Short ride-through (supercap) or tiny backup (thin-film) at harvest scale	Panasonic EEC-F5R5H105 (supercap example) Cymbet CBC050 (EnerChip thin-film)	Self-discharge/leakage, ESR, temperature range, charge termination needs, lifecycle/availability

Note: some distributors may mark certain storage parts as obsolete while others still stock them. Availability and lifecycle should be checked during sourcing.

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H2-12 — FAQs (Troubleshooting + Selection, harvest-scale)

These FAQs stay strictly within the harvesting front-end boundary: cold-start, MPPT/overhead, micro-power conversion, storage leakage, input protection tradeoffs, power-path gating for bursts, and proof-by-measurement.

Figure F12 — Fast triage evidence chain (what to probe first)

Minimal probes for most failures: VIN, VSTORE, VLOAD, plus an event marker (EN/PG or a GPIO “burst” flag). Keep probes high-impedance; instrumentation loading is a common false diagnosis.

1Why does it charge in daytime, but keeps rebooting at dusk / cloudy conditions? What 3 waveforms should be checked first?

Fast triage: treat this as a cold-start / gating margin problem under weak-source conditions.

Capture first: VIN, VSTORE, and (VLOAD + EN/PG marker). Look for UVLO-triggered sawtooth on VSTORE.
Likely causes: load enabled too early; UVLO hysteresis too tight; leakage budget (storage + protection + PCB) consumes the weak harvest.
Next actions: raise VLOAD_EN (enable only when VSTORE is higher); add hysteresis / debounce; reduce leakage (TVS/dividers/ESD) and re-test with load disabled.

Related: H2-4 / H2-8 / H2-10

2MPPT makes it worse: algorithm issue or sensing/control overhead eating the gain? How to tell?

Decision must be evidence-based: MPPT is only “good” if net stored energy increases.

Capture first: compare ΔVSTORE (or stored energy) over the same window with MPPT ON vs OFF; record EN/PG and sampling activity.
Likely causes: sampling current and compute duty dominate at nW–mW; too frequent Voc/I measurements; hunting behavior under fast-changing conditions.
Next actions: switch temporarily to a low-overhead mode (constant-V or slower Voc sampling); reduce sample rate; then re-run ON/OFF A/B to separate “algorithm limits” from “overhead limits”.

Related: H2-5 / H2-10

3TE source is only tens of mV—why can it never cold-start? What leakage paths are most common?

TE cold-start is leakage-limited: the available power is tiny, so any unintended loss dominates.

Capture first: VIN(TEG) at the harvester input, VSTORE rise rate with load disabled, and any bias-rail/UVLO behavior.
Common leakage paths: TVS/ESD clamps with non-negligible leakage; divider networks always-on; storage self-discharge; PCB contamination/moisture; reverse paths through protection/rectifier structures.
Next actions: measure leakage at operating voltage and temperature; temporarily remove/replace protection with ultra-low leakage options; clean PCB; verify the cold-start threshold is reachable before enabling MPPT or the load.

Related: H2-4 / H2-7

4Fractional Voc vs P&O: how to choose for micro-power systems, and what is the deciding criterion?

Criterion: choose the method that maximizes net harvested energy after sensing/control overhead.

Fractional Voc fits when intermittent sampling is acceptable and overhead must be minimal; it works best with slower-changing sources.
P&O can track faster changes but typically costs more sensing/compute; in nW–mW regimes it may lose net energy if run too often.
Next actions: set a conservative sampling interval first, then validate with MPPT ON/OFF net energy comparison; adjust only if the source changes faster than the sampling window.

Related: H2-5 (and validation in H2-10)

5Piezo vibration has high open-circuit voltage but won’t charge storage—did rectification/clamping get placed wrong?

Most often yes: the clamp/rectifier placement can turn “high voltage” into “no transferable energy”.

Capture first: piezo terminal voltage (open and under load), rectified node waveform, and VSTORE rise under controlled vibration.
Likely causes: clamp placed before energy transfer so it dissipates most energy; clamp threshold too low; rectifier drop too large for the effective current; protection creates a hidden shunt path at peaks.
Next actions: verify clamp is located to protect without shorting energy extraction; confirm the rectified node sees charge packets into storage; reduce leakage and ensure a defined energy path (not just a voltage limiter).

Related: H2-2 / H2-3 / H2-9

6Low-light PV efficiency is very poor—is it inductor choice or control mode?

At micro-power, control mode is often the first suspect: fixed-frequency behavior can waste more than it delivers.

Capture first: VSTORE slope with load disabled, switching activity (if observable), and any “burst/PFM” signature vs continuous switching.
Inductor-driven issues: high DCR dominates at tiny currents; saturation or wrong L value can force inefficient operation or prevent cold-start progression.
Next actions: confirm the converter enters PFM/DCM at low power; then tune L (lower DCR, suitable Isat) and output capacitor selection (DC-bias derating) to match min on/off timing and the target power range.

Related: H2-6

7Does a bigger supercap always improve stability? Why can a larger one make it worse (self-discharge / slower startup)?

Bigger storage can lose in weak-source regimes: it raises the “time-to-ready” and increases leakage risk.

Capture first: VSTORE rise time to VLOAD_EN (load disabled), and leakage current estimate (including protection and PCB).
Likely causes: supercap self-discharge/leakage consumes harvested energy; larger C extends cold-start time so the system never reaches the enable threshold under weak conditions.
Next actions: pick storage by leakage budget first (not capacitance); consider smaller C + strict load gating; or thin-film / low-leak alternatives; verify with “VSTORE must continuously rise” under worst case.

Related: H2-7 / H2-4

8TX burst collapses the system—should storage, gating, or power-path be changed first?

Use the droop signature to decide: “where the voltage collapses” points to the fix.

Capture first: VSTORE, VLOAD, and EN/PG during the burst. Mark the burst start with a GPIO if possible.
If VSTORE collapses below UVLO: increase usable energy window (VREADY higher, VLO lower if safe) or storage; ensure load is enabled only when VSTORE is sufficiently high.
If VLOAD dips but VSTORE stays high: power-path resistance/limits dominate—improve ideal-diode/load-switch path, add local decoupling, or shape the burst (soft-start / current limit / duty control).

Related: H2-8 / H2-7 / H2-11

9TVS/ESD is “protection”—why can it cause “never starts”? How to balance protection and leakage?

Protection leakage is a first-order KPI in harvest systems: a “small” leakage can exceed the available source current.

Capture first: VSTORE rise with load disabled, and leakage current estimate at operating voltage (and at hot temperature).
Likely causes: TVS has non-trivial reverse leakage at the working voltage; ESD clamps shunt the source; divider networks and monitoring always-on create a hidden drain.
Next actions: use ultra-low leakage ESD parts for sensitive nodes; move heavy clamps to locations that do not starve cold-start; select higher standoff when safe; validate leakage across temperature before finalizing BOM.

Related: H2-9 / H2-7

10How to quickly estimate “how much average power the source can really provide in the field”?

Quick method: estimate available power, then cross-check using VSTORE slope with load disabled.

PV: sample a few I–V points (near Voc and near the expected operating voltage) to approximate the usable power window.
TEG: estimate internal resistance and use the rule-of-thumb maximum power near matched load (order-of-magnitude sizing).
Universal cross-check: disable the load and measure how fast VSTORE rises over a fixed time; convert that to stored energy change to bound average harvested power.

Related: H2-2 / H2-11

11How to prove the system is actually operating near MPP, not just “looks like it is adjusting”?

Proof requires a reference comparison: show that the chosen operating point maximizes net stored energy or input power.

Capture first: VIN and an input power proxy (IIN or estimator), plus VSTORE energy gain over the same window.
Method: briefly sweep the operating point (or compare two setpoints) and show which yields higher VIN×IIN and higher ΔESTORE under similar conditions.
Guardrail: avoid probe loading; keep the “sweep” short to prevent disturbing the source; verify with MPPT ON/OFF A/B when possible.

Related: H2-10 / H2-5

12With multi-source input (harvest + auxiliary battery), what are the most common backfeed/priority mistakes and symptoms?

Symptom-based diagnosis: priority/backfeed bugs often appear only in “night” or “weak source” states.

Symptoms: auxiliary source drains unexpectedly; storage never rises; unexpected heating; VIN nodes sit at a strange mid-level at night.
Root causes: missing reverse blocking; ideal-diode/power-mux thresholds wrong; clamp/protection unintentionally provides a return path.
Next actions: verify reverse current blocking directionally; confirm power-mux priority under all states (harvest present/absent); ensure protection does not create a parallel backfeed path; re-check with VSTORE/VLOAD + current direction evidence.

Related: H2-8 / H2-9

How to use these FAQs in the lab (one practical rule)

Before changing components, run the same scenario with load disabled. If VSTORE still cannot rise, the issue is in source/rectification/leakage. If VSTORE rises but collapses only when EN goes high, the issue is gating/power-path/burst handling.