Smart Lock / Access Control Electronics & IC Selection Guide
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This page explains a smart lock as an electronics system: which IC blocks dominate battery life, reliable actuation, stable biometric sensing, and credential protection—then shows how to debug failures using measurable evidence (rails, reset/PG, currents, and event logs).
H2-1｜Scope boundary + typical hardware forms
The practical goal is to answer three buyer/engineer questions quickly: (1) what the key IC blocks are inside a lock, (2) which blocks most often cause field failures, and (3) where to start for selection and debugging when symptoms appear.
Two power & load forms define 80% of smart-lock failures:
- Battery supply + short high-current bursts (motor/solenoid actuation). The dominant risks are rail droop, ground bounce, stall/overheat, and repeated retries that drain the battery.
- Always-on ultra-low-power + intermittent high-power events (fingerprint scan, radio Tx/Rx, actuation). The dominant risks are domain sequencing errors, noisy rails corrupting sensing, and ESD/touch injection causing resets or hung buses.
Two system roles help keep boundaries clean:
- Home smart lock (BLE/Thread/Zigbee): battery life + transient robustness are top priorities. Radio is treated as a predictable power event.
- Access control reader/controller (may expose RS-485/Wiegand): this page only touches the electrical interface constraints (ESD, isolation needs, cable-injection paths), not system architecture.
H2-2｜System block diagram: the data mainline + the power mainline
Smart locks fail most often at the intersection of two mainlines: the data/control mainline (authorization, state machine, logging) and the power mainline (domain rails, peak current, droop immunity). A robust design makes the intersection measurable: rails, reset/PG, current, and logs line up in time.
Mandatory blocks (kept hardware-only):
- MCU/SoC + RTC + wake sources: sleep-first architecture; wakes are hardware events (door-contact/tamper/keypad/radio/biometric).
- Secure Element (SE): credential protection, challenge-response, monotonic counters, tamper reaction (no cloud/IAM deep-dive).
- Fingerprint interface / AFE module: sensitive to rail noise and ESD injection; scan window must be protected from actuation/radio bursts.
- Door-contact / position / tamper: debounce + ESD + cable/body coupling; false triggers are often electrical, not “algorithmic.”
- Motor/solenoid drive stage: H-bridge / current sense / stall evidence; peak current is planned, not “surprising.”
- Power tree: battery path + protection + buck/LDO + load switches; domains isolate noise and keep always-on stable.
- Low-power radio: treated as power events (Tx spikes, coexistence) with antenna/matching constraints (no protocol tutorial).
- Peripherals: keypad/touch, buzzer/LED, optional NFC; each can inject noise and must be referenced to the right ground.
- Diagnostics: event log + error codes + production test points; without these, field debug becomes guesswork.
H2-3｜Power & energy architecture: why “ultra-low power” is the hard part
For smart locks, the hardest problem is not the average current. It is keeping the system stable when burst events happen (fingerprint scan, radio Tx/Rx, actuation), while the rest of the time must remain in µA-class standby. A robust design separates domains, budgets peak events, and prevents brief droops from turning into resets, false alarms, or corrupted sensing windows.
Conflict A — µA standby vs A-level bursts (event energy dominates):
- Standby life is set by always-on rails (RTC/wake, minimal MCU state, security keep-alive if required). Reliability is set by event rails (fingerprint, radio, motor) and their peak-current timing.
- Burst stability is primarily a rail + path problem: a short sag that crosses BOR/PG thresholds can cause a reset even if “average voltage” looks fine.
Conflict B — battery impedance vs stall current (worst case stacks):
- Low temperature and aging increase R_bat, while mechanical load and stall conditions increase I_peak/I_stall. The practical check is whether V_load_min stays above the weakest rail’s minimum requirement with margin during the event.
- Many “random” resets are actually deterministic: the same event triggers a droop that aligns with a vulnerable reset/PG window.
Domain split (recommended baseline):
| Domain | Typical loads | Common failure if wrong |
|---|---|---|
| Always-on | RTC, wake logic, minimal MCU retention, essential security state | Excess standby drain; unstable wake behavior; “phantom” wakes |
| Sensor-on | Fingerprint module / AFE, touch or keypad scan windows | Match-rate drift; scan failures; ESD sensitivity due to weak return path |
| Radio-on | BLE/Thread/Zigbee radio events (Tx/Rx bursts), RF front-end if present | Drop link; retry storms; battery drain spikes; brownout during Tx |
| Motor-on | H-bridge/driver, current sense, motor/solenoid actuation | Reset on actuation; half-open; overheating; repeated retries |
Design actions that prevent field resets (hardware-only):
- Short, low-impedance actuation path: Battery → protection → motor switch/driver → motor. Keep both the forward path and the return path short to reduce droop and ground bounce.
- Low-noise rails for sensitive blocks: MCU/SE/fingerprint AFE use local LDO or secondary filtering, with localized decoupling and a clean reference return.
- BOR/PG robustness: PG blanking/debounce and domain sequencing avoid “micro-sags” creating false resets. Event gating (fingerprint/radio/motor) should avoid overlapping vulnerable windows.
• Fingerprint scan triggers reboot → scan burst + rail droop (check VBAT/3V3 + RESET/PG alignment).
• Motor start freezes MCU → ground bounce/return-path coupling (check RESET pin, local ground reference).
• Low-battery false alarm → sampling during recovery window + R_bat rise (check sampling timing vs events).
Deliverables for engineering control:
- Power state machine (Sleep → Wake-sense → Auth → Actuate → Report) with active domains and peak events.
- Peak-current budget checklist that ties temperature/aging to allowable actuation policy and BOR margin.
H2-4｜Actuator stage: motor/solenoid drive and the evidence chain for stall & bounce
Unlock reliability is dominated by the actuator stage: the motor/solenoid load is the largest current event and the most common source of “won’t open,” “half-open,” “bounce-back,” overheating, and false unlock risk. A robust design treats actuation as a measurable process: current profile, position evidence, and rail droop must align with the lock’s decision and logs.
Load types and what the driver must control:
- DC motor + gearbox: H-bridge drive, PWM torque control, braking, reverse, and bounded retries. The key risks are stall current, ground bounce, and load variation across temperature.
- Solenoid / latch coil: pull-in + hold behavior, inrush control, and a correct freewheel/recirculation path. The key risks are excessive heat, battery sag, and slow release due to poor decay control.
Key electrical metrics that map directly to field symptoms:
- I_peak / I_stall: defines droop risk and thermal stress; worst-case is low temperature + aging + obstruction.
- Driver Rds(on) / voltage headroom: too much drop causes weak actuation and longer “time under stress.”
- Current sensing (shunt or integrated): must capture the profile shape, not just an averaged value.
- Thermal protection: repeated retries without cooldown can silently move the system into thermal limit behavior.
Evidence chain to distinguish the three common worst cases:
| Case | Current signature | Correlated evidence |
|---|---|---|
| Stall | Start peak → plateau → sustained rise toward I_stall (limited or not) | Position unchanged; VBAT sag aligns; stall flag or timeout occurs |
| Obstruction | Irregular bumps / sawtooth during motion; partial plateau shifts | Position changes but is discontinuous; retry count rises; time-to-open increases |
| Cold / weak battery | Lower plateau (less torque) + longer actuation time; peak may still spike | VBAT sag larger; BOR/PG near thresholds; success depends on cooldown or battery state |
Protection policy (inside the lock only):
- Current limit shape: constant-current vs foldback affects “can start” vs “overheat.”
- Timeout and retry bounds: prevents battery collapse and thermal accumulation; add a cooldown window between retries.
- Log everything needed for field triage: stall/timeout, VBAT margin, retry count, temperature flag (if present).
H2-5｜Fingerprint & biometric interface: AFE, noise windows, and ESD paths
When fingerprint recognition becomes unstable in the field, the fastest wins usually come from three electrical checks: (1) AFE rail cleanliness, (2) sampling-window interference, and (3) ESD/touch injection return paths. This section stays on the hardware boundary: electrical interfaces, timing risk, and protection topology—no biometric algorithms.
Common fingerprint interface forms (electrical risks only):
- SPI (most common): edge integrity and reference ground dominate. Long flex/lines can cause edge ringing, CS glitches, and occasional frame errors when burst noise overlaps the read window.
- Parallel (less common): many lines toggle together, increasing simultaneous switching noise and ground bounce. Setup/hold margins can collapse under droop or return-path coupling.
- Module UART: shared ground noise can turn into framing errors and timeouts; after ESD, module reset and host reset may desynchronize, leaving the bus “alive but not responsive.”
AFE engineering points (what changes recognition stability):
- Low-noise power: consider a clean LDO or secondary filtering for the fingerprint AFE/sensor rail; keep fast digital domains and switching edges from polluting the AFE reference return.
- Sampling window vs interference: the critical issue is overlap. Motor PWM and radio Tx bursts can inject both supply ripple and ground bounce exactly when the AFE is integrating/reading.
- ESD/touch path control: the physical touch point (fingerprint window / metal housing) must return ESD current through a controlled path (TVS + series impedance + short return), not through AFE reference or MCU reset paths.
Fast triage table: symptom → evidence → isolate → action
| Symptom | First evidence | Likely isolate | Hardware action |
|---|---|---|---|
| Match rate drifts with battery / cold | Fingerprint rail ripple during scan; VBAT sag timing | LDO headroom, domain overlap | Clean AFE rail; gate scan away from bursts |
| Fails when motor runs / LED beeps | Scan window overlaps PWM/LED; ground bounce | Return path coupling | Separate returns; add local filtering / routing fixes |
| After ESD/touch, occasional freeze | RESET/PG glitch; SPI/UART stuck; clock anomalies | ESD path through logic | Move TVS/series R; enforce short ESD return |
| “Alive but no response” module UART | Timeouts; framing errors; desynced reset | Host/module reset domain | Reset sequencing; input protection; cleaner ground |
H2-6｜Door state & tamper sensing: reliable door-contact, latch, and anti-tamper inputs
“Door open” flicker, false alarms, and tamper failures are usually not caused by the sensor alone. Reliability comes from the full input chain: sensor physics, pull network, filtering/debounce, ESD handling, and simple local consistency checks (door vs latch) with an anomaly counter.
Sensor options (selection by interference type):
- Hall: supports threshold/hysteresis behavior and can be more robust to bounce; still sensitive to strong external magnets.
- Reed: simple and low power, but can be fooled by strong magnets and can bounce mechanically.
- Micro switch: clear mechanical contact, but needs strong debounce and is sensitive to wear and vibration.
Standard input chain (what each stage protects):
- ESD + series impedance: blocks fast touch/line injection from reaching MCU pins directly.
- Pull network: sets a firm default state and reduces floating sensitivity.
- RC + Schmitt input: converts noisy edges into clean logic transitions and reduces “flicker.”
- Debounce window: ensures mechanical bounce does not become repeated events.
Local anti-magnet mitigation (no adversarial deep-dive):
- Dual-sensor consistency: confirm door state with door-contact + latch position, not one signal alone.
- Time correlation: real close/open transitions usually show a short transient then stable state; suspicious transitions can be “instant + persistent.”
- Anomaly counter: count unusual toggles or inconsistent states to trigger a local warning or a service flag.
Fast triage table: symptom → evidence → isolate → action
| Symptom | First evidence | Likely isolate | Hardware action |
|---|---|---|---|
| Door-open indicator flickers | Input waveform shows bounce/noise; threshold near mid | Weak pull / no Schmitt / poor return | Stronger pull; RC; Schmitt buffer; improve return |
| False alarm after touch/ESD | Transient on input pin; MCU pin clamp events | ESD path through logic | Add TVS/series R; shorten ESD return path |
| Magnet “spoofs” closed state | Door-contact closed but latch not consistent | Single-sensor dependence | Dual-sensor check; time correlation; anomaly count |
| Tamper switch unreliable | Repeated toggles with vibration | Debounce/RC insufficient | Debounce window; RC; mechanical mounting review |
H2-7｜Secure element in smart locks: the minimal correct use
A secure element (SE) is most valuable when it binds secrets to the device and supports challenge-response and a non-replay counter. Encrypting data “somewhere” is not enough if secrets can be copied, exported during manufacturing, or replayed after power cycles.
Minimal split of responsibilities (keep the boundary clean):
- MCU: state machine, I/O control, actuation policy, event logging, error codes.
- SE: key generation/storage, signing/verification, challenge-response, monotonic counter concept, (optional) tamper status.
Typical lock-side credentials (lock-side handling only):
- PIN / local code: verification gates an SE-backed authorization step; avoid treating EEPROM-encrypted blobs as “unclonable.”
- Card / fob / NFC token: validate a challenge-response (or equivalent) so captured traffic cannot be replayed as an “open.”
- Phone token / one-time code: verify freshness (counter/time window) in a way that cannot be rolled back by power cycling.
Common pitfalls (what fails in the field):
| Symptom | Evidence to collect | Likely root cause | Lock-side fix |
|---|---|---|---|
| Credentials “copy” across boards | Same token works after MCU/flash swap | Encryption without device binding | SE-held keys + challenge-response |
| Opens via captured/old messages | Old token accepted after retries | No freshness / no monotonic concept | Challenge + counter or freshness gate |
| Keys leak in production/RMA | Batch duplication; debug left on | Injection boundary not closed | Unique-per-device injection; close debug lifecycle |
| Power cycle “resets” security state | Rollback accepts older state | Rollback-able counters/state | Non-rollback concept; verify monotonic progression |
H2-8｜Low-power radio: hardware constraints and power events (no protocol tutorial)
Radio battery impact and link instability are often explained by event current profiles (Tx/Rx peaks), supply transients, and coexistence coupling from motor PWM and switching regulators. This section stays on verifiable hardware actions: what to measure, when to measure it, and which coupling paths matter.
Radio events that dominate “battery surprises”:
- Tx peak: short bursts can pull large instantaneous current and cause droop if the radio rail is not locally supported.
- Rx/scan windows: repeated scan/receive windows can look “low average” but stack into real drain over time.
- Clock stability: unstable startup or noisy references can worsen link margins and retry rates, increasing total energy.
Antenna/matching: verifiable actions (no long RF tutorial):
- RSSI vs VBAT: check if link margin collapses during battery sag or motor events.
- I_TX vs range: abnormal transmit current (too high or clipped too low) often correlates with matching/rail limits.
- Throughput/retry count: correlate retries with droop, PWM windows, or DC-DC frequency regions.
Coexistence coupling sources and practical hardware moves:
- Motor PWM: large return currents and EMI can inject into radio rails and antenna reference. Keep high-current loops short and controlled.
- DC-DC switching: fixed switching tones and harmonics can land near sensitive bands or IF regions; manage layout and filtering.
- AFE windows: if a fingerprint scan is sensitive, avoid overlapping high-power radio bursts with critical sampling windows.
Fast triage table: symptom → evidence → isolate → action
| Symptom | First evidence | Likely isolate | Hardware action |
|---|---|---|---|
| Battery drains during ads/conn | I_TX peaks + radio-rail droop timing | Insufficient local rail support | Strengthen radio rail; reduce overlap with other peaks |
| Range drops after antenna change | RSSI and I_TX change vs baseline | Matching/reference/placement coupling | Respect ground/reference; reduce nearby noise coupling |
| Link drops during motor action | Retry/disconnect aligns with PWM/VBAT sag | Return path + EMI injection | Control high-current loops; isolate/filter radio rail |
| Unstable link “for no reason” | Retries correlate with DC-DC tone regions | Switching harmonics / layout | Layout/filters; manage switching frequency interactions |
H2-9｜HMI & peripherals: keypad/touch, buzzer, LED — noise & injection paths
HMI instability is often explained by injection paths: ESD and common-mode noise enter through the panel and wiring, while buzzer/LED switching adds transient current and return-path disturbance. The goal is to keep input thresholds, reset/PG, and sensitive rails from sharing the same disturbance source.
Keypad / touch robustness (hardware view):
- Signal chain: panel → ESD clamp / series-R → pull network → RC shaping → Schmitt / digital input → MCU sampling window.
- Common-mode injection: long flex or metal housing coupling can shift reference; stabilizing the return strategy matters as much as filtering.
- Debounce: treat it as a timing gate on top of a clean edge; it cannot “fix” an injected reset or rail droop.
Buzzer / LED transients (why they break things):
- Current steps: fast edges and PWM can create rail droop and ground bounce if driver loops are large or share return paths with logic.
- EMI coupling: wiring and loops radiate; sensitive victims are often RESET/PG, sensor rails, and RF reference ground.
- Isolation actions: keep driver loops compact, add controlled edges (soft-start concept), and avoid overlapping critical sampling windows.
Evidence chain for “button press → unlock fails”:
| What to correlate | Healthy pattern | Failure signature | Points to |
|---|---|---|---|
| Input edge vs event log | Single clean edge; stable state | Multiple edges / glitches around the press | Input path / common-mode |
| Input edge vs RESET/PG | No RESET/PG disturbance | RESET/PG pulse aligns with HMI switching | Driver transient / return path |
| HMI switch vs VBAT | Small droop, quick recovery | VBAT sag triggers brownout | Rail support / load overlap |
| HMI switch vs RF retry | No retry spike | Retry/disconnect aligns with buzzer/LED PWM | Coupling into RF reference |
H2-10｜Field debug evidence chain: minimal instruments to solve 80%
Fast on-site triage works when measurements follow a fixed order and each step outputs the same three items: what to measure, what “healthy” looks like, and what the anomaly points to. A minimal kit (scope + current measurement + logs) is sufficient for most cases.
Recommended triage order (copyable):
Healthy: controlled droop and fast recovery.
Points to: rail support / load overlap / stall events.
Healthy: no RESET/PG pulses during actuation or HMI switching.
Points to: brownout, injection into reset/PG, or rail noise.
Healthy: repeatable profile; no runaway rise or abnormal duration.
Points to: stall/overload/backdrive and protection policy.
Healthy: stable states; minimal chatter during vibration or EMI events.
Points to: wiring coupling, poor input conditioning, or magnetic interference.
Healthy: retries do not spike with actuation/HMI transients.
Points to: coupling into radio rail/reference or rail clipping.
Healthy: consistent order (input → auth → actuate → report).
Points to: missing/invalid transitions, resets, or sensor false triggers.
Quick symptom-to-first-evidence matrix:
| Symptom | First evidence | Most likely bucket | Next check |
|---|---|---|---|
| Reboot during unlock | VBAT sag + RESET/PG pulse | Power / injection | Motor current profile |
| Does not actuate / half-actuate | Motor current shape abnormal | Stall / mechanical load | VBAT recovery and protection timing |
| False alarm / door state flips | Input chatter timing | Input chain / coupling | Common-mode and ESD path review |
| Link drop during actuation | Retries align with motor/DC-DC windows | Coexistence / rail clipping | Radio rail and reference coupling |
H2-11｜Figure set (2–3), unified 3:2 block-diagram style + example material numbers
This page benefits from a small, consistent figure set: one “system map” (power + signal + protection boundary), one “cause-and-effect” plot (motor peak → VBAT sag → PG/RESET), and one “ESD path map” (touch → clamp/return → victims). Each figure is designed to be referenced across sections without expanding into protocols or cloud security architecture.
How to read:
- Power mainline: BAT → PROTECT → Power Tree (AON/SENS/RF/ACT domains).
- Signal mainline: Inputs → MCU → SE (auth) → Actuator + Radio reporting.
- Protection boundary: ESD/TVS placement and return strategy determine which nodes become “victims” (RESET/PG/AFE/RF ref).
Example material numbers (by block):
| Block | Typical function | Example material numbers (choose per spec) |
|---|---|---|
| Reverse / ideal-diode | Reverse polarity + low drop | TI LM66100 · Analog Devices/Linear LTC4412 · onsemi NSI45020 (alt current-reg use cases) |
| eFuse / load protection | Current limit, surge control | TI TPS25940 · TI TPS2595 · Analog Devices LTC4366 (OV/UV protection families) |
| ESD diode (IO) | Fast ESD clamp | TI TPD1E10B06 · Nexperia PESD5V0S1BA · Littelfuse SP0503BAHT |
| Main buck | VBAT → system rails | TI TPS62743 (ULP buck) · TI TPS62840 · ADI LTC3337 (energy-harvesting/buck-boost class) |
| ULP LDO | Quiet rail for AFE/SE | TI TPS7A02 · TI TLV755P · Microchip MCP1700 |
| Load switch | Domain gating (SENS/RF) | TI TPS22916 · TI TPS22918 · onsemi NCP45520 |
| MCU / low-power SoC | State machine + IO + sleep | ST STM32L4 series · Microchip SAML21 · NXP Kinetis KL series |
| Radio SoC (BLE/Thread/Zigbee) | RF + baseband + MCU | Nordic nRF52840 · Silicon Labs EFR32MG21 · TI CC2652R7 |
| Secure element | Keys, sign/verify, counters | Microchip ATECC608B · NXP SE050 · Infineon OPTIGA Trust M (SLS32AIA family) |
| RF matching / balun | 2.4 GHz matching network | Johanson 2450BM14E0003 (balun) · Murata LDB212G4005C (balun class) · Johanson 2450AT18A100 (chip antenna) |
| Fingerprint module (examples) | Sensor + AFE + interface | Fingerprint Cards FPC1020 family (module/sensor lines) · Synaptics fingerprint module families (verify exact P/N per sourcing) · Goodix fingerprint module families (verify exact P/N per sourcing) |
| H-bridge motor driver | PWM drive, braking, protection | TI DRV8833 · TI DRV8871 · ST L6206 (family) |
| Current sense amplifier | Stall/overload evidence | TI INA180 · TI INA181 · ADI AD8418 (high-side current sense class) |
| Door / latch sensing | Hall / reed / switch | TI DRV5032 (Hall) · Infineon TLE4964 (Hall class) · Standex-Meder MK24 (reed switch) |
| Capacitive touch (keys) | Touch sensing frontend | Microchip AT42QT1070 · Microchip AT42QT2120 · Azoteq IQS333 (family) |
Purpose: visualize the synchronized chain: I_MOTOR peak → VBAT sag → PG/RESET threshold → reboot / mis-action risk.
Example material numbers (focused on Figure 2 chain):
- Motor driver (H-bridge): TI DRV8833 · TI DRV8871 · ST L6206 (family)
- Current sense: TI INA180 / INA181 · ADI AD8418 (class)
- Supervisor / reset: TI TPS3839 · Microchip MCP1316 · onsemi NCP303
- ULP buck / rail support: TI TPS62743 · TI TPS62840 · ADI LTC3337 (class)
- Load switch (domain gating): TI TPS22916 · TI TPS22918
This map explains “ESD then intermittent faults” using a simple rule: entry point + clamp placement + return path determine which nodes see stress (AFE pins, MCU pins, RESET/PG).
Example material numbers (focused on Figure 3 path):
- ESD diode (single-line): TI TPD1E10B06 · Nexperia PESD5V0S1BA
- ESD array (multi-line): TI TPD4E05U06 · Nexperia PESD5V arrays (family)
- TVS for power entry: Littelfuse SMF5.0A (family) · Vishay SMBJ series (family)
- Capacitive touch controller (keys/panel): Microchip AT42QT1070 · Azoteq IQS333 (family)
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H2-12｜FAQs ×12 (hardware evidence-first)
Each answer stays on-lock (power, actuator, sensing/AFE, ESD, SE, RF hardware events, and field evidence). Example material numbers are provided for fast part scouting.
1) Why does the lock reboot when unlocking even though the battery indicator still shows “OK”? Which two waveforms should be captured first?
Start with a time-correlated capture of VBAT and RESET/PG (or 3V3 rail) during the motor start window. If VBAT sags sharply and RESET/PG toggles, the failure is usually a transient power-margin problem rather than “battery percentage.”
- Measure #1: VBAT at the battery pads (not after long traces) + motor command edge.
- Measure #2: RESET/PG and the MCU rail (3V3 / 1V8) on the always-on domain.
- Common root causes: battery internal resistance (cold/aged), long/high-impedance power path, insufficient bulk/decoupling, reset threshold too aggressive, poor ground return between motor and AON domain.
2) The motor sometimes “half unlocks” or “bounces back.” How to tell mechanical sticking from an overly conservative current limit?
Use the motor current shape as the primary discriminator. Mechanical sticking typically shows a rising current toward stall with insufficient motion evidence, while conservative current limiting shows an early flat-top or foldback signature before the actuator completes travel.
- Capture: I_MOTOR (shunt + amplifier or current probe) + motor voltage/PWM.
- Mechanical jam indicators: current ramps upward and stays high; motion/position (if available) does not progress.
- Limit too conservative indicators: current clamps early; repeated retry cycles; travel stops consistently at the same point under load.
3) Failure rate jumps in low temperature. Should battery internal resistance or motor stall current be checked first?
Check battery internal resistance (via VBAT sag under load) first, because cold increases battery impedance and turns a normal motor peak into a brownout trigger. Then verify whether the motor is pushing closer to stall due to higher friction.
- Step 1 (power margin): compare VBAT droop at motor start vs room temperature.
- Step 2 (load severity): compare I_MOTOR peak and plateau; look for stall ramp or prolonged high current.
- Practical rule: if VBAT crosses reset/PG thresholds, power path/domain strategy must be fixed before tuning motor profiles.
4) Fingerprint success rate swings up and down. How to decide between supply noise, ESD, or interface timing issues?
Separate by correlation: supply noise correlates with motor PWM or RF Tx/Rx events on the fingerprint rail; ESD correlates with touch/dry conditions and may disturb reset/clock/IO; timing correlates with bus retries/timeouts without rail disturbance.
- Noise check: monitor V_FP_LDO ripple and ground bounce during motor/RF events; look for sampling-window collisions.
- ESD check: watch RESET/PG, clock, and interface lines after touch events; intermittent lockups often trace to IO injection paths.
- Timing check: capture SPI/UART activity (logic analyzer if available) and confirm stable clocks and clean reset release.
5) After ESD, occasional crashes or bus lockups appear. What are the three most common injection paths?
Most intermittent post-ESD issues come from (1) IO pin injection, (2) RESET/PG/clock victimization, and (3) return-path / common-mode injection that shifts references for AFE/MCU thresholds.
- Path #1 (IO): touch → clamp too far away → residual surge reaches sensor/serial pins → interface state machine hangs.
- Path #2 (reset/clock): touch → coupling into RESET/PG/XTAL nets → spurious reset or partial reset behavior.
- Path #3 (return): clamp return flows through signal ground → ground bounce → ADC/AFE or digital thresholds drift.
6) Door-contact signal “chatters” and causes false alarms. Should debouncing/filtering be done in hardware or software?
Use hardware for baseline protection and edge-shaping when the signal is exposed to ESD/noise or long wiring, then apply software debouncing for deterministic event decisions. Pure software is fragile if input spikes can violate MCU thresholds or trigger interrupts repeatedly.
- Hardware baseline: ESD clamp + series resistor + modest RC (or Schmitt input) near the MCU pin.
- Software layer: time-based debounce + state consistency checks (door vs latch status).
- Evidence: scope the input pin for spikes/glitches at the exact times false alarms occur.
7) Magnet spoofing risk: how to reduce it with engineering measures (not “just algorithms”)?
Reduce spoofing risk by adding redundancy and cross-checks at the hardware event level: multiple sensing points (or mixed sensor types), consistency between door-contact and latch/bolt state, and anomaly counters for abnormal patterns. This raises the effort required for deceptive triggering without relying on complex inference.
- Redundant sensing: dual Hall sensors at different geometry, or Hall + mechanical micro-switch.
- Consistency checks: door-contact change must align with latch travel evidence (current profile or position).
- Anomaly evidence: repeated short toggles or impossible sequences increment tamper counters and alter behavior locally.
8) When is a Secure Element truly necessary? Why is “encrypted storage only” not enough?
A Secure Element is justified when credential compromise directly enables unauthorized access or cloning. “Encrypted storage only” can still allow copying or replay if secrets are not bound to a tamper-resistant key store and a challenge-response or monotonic counter scheme.
- SE minimum job: key generation/storage, signing/verification, challenge-response, monotonic counters (anti-replay).
- MCU job: state machine, IO, user flows—calling the SE for cryptographic proofs.
- Engineering trigger: multiple users, shared credentials, remote issuance, or any scenario where cloning equals physical access.
9) During production programming or service access, what are the most common key-leak vectors, and how can hardware reduce the risk?
Key leaks most often happen through (1) exposed debug/program ports, (2) accessible test points/fixtures that remain usable after shipping, and (3) service modes that bypass normal credential checks. Hardware risk reduction focuses on lifecycle separation and minimizing secret exposure outside the Secure Element.
- Debug ports: disable or physically gate SWD/JTAG/UART after provisioning; use one-time straps/jumpers where appropriate.
- Test access: avoid leaving high-value signals on easy-to-probe pads; isolate “factory-only” access from field connectors.
- Secret handling: generate/store keys inside SE; keep MCU flash free of long-term root secrets whenever possible.
10) Power spikes during advertising/connection: should RF or power-domain partition be checked first?
Check power-domain partition and rail integrity first. RF Tx/Rx events are naturally peaky; if the RF rail shares impedance with motor/AFE domains, the “normal” peak becomes a system-level disturbance. After rail isolation is confirmed, inspect RF matching/antenna if current remains abnormally high.
- Power-first evidence: scope V_RF (or VDD_PA/VDD) during Tx bursts; confirm it does not dip with motor/other loads.
- RF-second evidence: compare Tx current vs RSSI/link quality; poor matching can increase current for less range.
11) Wireless disconnects when the motor runs. Should ground return or DC-DC switching noise be investigated first?
Start with ground return because motor current can create instant reference shifts that break RF/MCU stability. If disconnects persist even with improved return/segregation, investigate DC-DC switching noise coupling into RF/clock/sensitive rails.
- Ground-return signature: V_RF or MCU rail shows a sharp step at motor edge; RESET/PG may glitch; RF disconnect aligns tightly in time.
- Switching-noise signature: interference aligns with a switching frequency/harmonics; changes with converter mode/frequency/LC placement.
- Fix direction: separate high-current loop, star/segregated returns, RF rail filtering or quiet LDO where needed.
12) With only a multimeter and a small oscilloscope on-site, what is the minimal debug order to find root cause fastest?
Use a strict evidence order: VBAT → 3V3/PG/RESET → motor waveform → key inputs (door/tamper) → RF event correlation. This isolates power-margin failures early and prevents chasing symptoms.
- 1) VBAT under actuation: droop depth and duration at motor start.
- 2) 3V3 + RESET/PG: detect brownout vs software reset patterns.
- 3) Motor drive + I estimate: identify stall/limit signatures and retries.
- 4) Door/tamper pins: check for spikes/glitches that trigger false events.
- 5) RF correlation: align disconnect time with motor edges or rail events.
