AC-Direct LED Driver: Electrolytic-Free PFC & Flicker Control
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Core idea: An AC-direct LED driver trades bulk electrolytic energy storage for lifetime and size, so performance is won by shaping the half-cycle energy flow—controlling VBUS ripple → ILED ripple while keeping iIN waveform acceptable for PF/THD and dimmer compatibility.
In practice, the “right” design is the one that meets your flicker target and protection behavior using only small-cap buffering and measurable evidence (VBUS/ILED/iIN/TRIAC waveforms), not assumptions.
H2-1. Core takeaway + when AC-direct is the right choice
Core takeaway: AC-direct LED drivers trade bulky electrolytic energy storage for waveform engineering: input-current shaping (PF/THD) and 100/120 Hz ripple control (low-frequency flicker). The design goal is not “no capacitor,” but “small-cap with predictable metrics.”
Fast decision rule: If lifetime/volume/temperature rules out electrolytics, then AC-direct is viable only when (a) the flicker target is achievable with the allowed small-cap, and (b) PF/THD targets can be met without creating extreme charging spikes.
Use AC-direct when the project is constrained by lifetime, enclosure, or temperature, and the following measurable targets can be negotiated:
- Electrolytic-free / small-cap is a hard constraint (sealed luminaire, high-ambient, long service interval).
- Flicker target is defined as percent flicker or flicker index at 100/120 Hz (not a vague “looks OK”).
- PF/THD targets are stated as a pre-check gate (measured at rated load and worst-case line).
- Power level matches small-cap reality: higher power increases the half-cycle energy gap; the allowed capacitance must scale accordingly.
Define the project in fields (this becomes the design review “inputs” and prevents scope drift):
| Category | Field | Why it matters (evidence link) |
|---|---|---|
| Input | VAC range, 50/60 Hz, surge assumption |
Sets conduction window and stress. Impacts iIN spikes and VBUS ripple margin. |
| Load | VLED string, ILED, strings/channel count |
Defines output power and the minimum regulation headroom during low line valleys. |
| Flicker | % flicker / flicker index at 100/120 Hz |
Directly ties to ΔVBUS and ΔILED (verify via VBUS+ILED waveforms). |
| Power quality | PF, THD targets |
Input shaping must avoid narrow spikes; validate with current clamp and PF/THD meter. |
| Cap constraint | Allowed type + max capacitance (small-cap) | Caps set the energy bucket. Too small → 100/120 Hz ripple dominates; too “peaky” charging → THD rises. |
| Dimming | Phase-cut/triac: Yes/No (pre-check only) | Triac compatibility changes input current behavior; may require controlled bleeder/hold current. |
When NOT to choose: If the application demands extremely strict low-frequency flicker at deep dimming while simultaneously limiting capacitance severely, the design is typically forced into higher-complexity shaping or a re-negotiation of metrics.
H2-2. What “AC-direct” really means: energy flow over a mains half-cycle
Core contradiction: LEDs prefer near-constant current for stable light output, but rectified mains delivers pulsating energy. When storage is constrained (electrolytic-free/small-cap), the remaining degrees of freedom are:
- Allow more ripple: ILED follows the rectified envelope → higher 100/120 Hz modulation (flicker risk).
- Store and release energy: buffer the energy gap with allowed capacitance → lower ripple, but charging behavior affects PF/THD.
- Reshape the input current: widen the conduction window to reduce peak charging spikes and improve PF/THD while keeping ripple manageable.
Practical link: Small capacitance tends to increase 100/120 Hz ripple. Adding capacitance can reduce flicker but may create narrower, higher peaks in input current—often worsening THD unless the conduction window is deliberately shaped.
Use a minimal energy view to prevent “trial-and-error” capacitor sizing:
- Capacitor energy window (how much the small-cap can bridge):
E ≈ 0.5 · C · (Vhi2 − Vlo2) - Energy demand over the valley interval (order-of-magnitude):
ΔE ≈ Pout · Δt, whereΔtis on the order of the peak-to-peak gap of rectified mains (≈10 ms at 50 Hz, ≈8.3 ms at 60 Hz).
Interpretation: If the allowed small-cap cannot cover the half-cycle energy gap at low line, the system must accept higher 100/120 Hz ripple (flicker) or move to stronger current shaping that broadens the conduction window and reduces extreme charging peaks.
Measurement discriminator (avoid misdiagnosis): If the dominant light modulation tracks 50/60 Hz (i.e., 100/120 Hz after rectification) and shifts with line frequency, the root cause is usually energy buffering/conduction window. If modulation becomes irregular (beating, burst, subharmonic patterns), suspect control/injection behavior rather than pure energy deficit.
Three probes that close the loop (evidence chain):
- TP1: VRECT — rectified mains envelope (baseline energy availability).
- TP2: VBUS — buffered bus ripple (ΔV shows energy gap not filled).
- TP3: ILED — output ripple that maps to flicker risk.
H2-3. Architecture taxonomy: passive vs semi-active vs active current shaping
Goal of this taxonomy: classify AC-direct solutions by the performance they can realistically deliver under a small-cap constraint—so PF/THD and 100/120 Hz flicker targets map to a clear tier instead of vague “options.”
Selection logic: When the allowed energy buffer is small, the design is forced to “pay” for stability somewhere—either accept more 100/120 Hz ripple (flicker risk), or deliberately widen the conduction window and shape input current (PF/THD control), or both.
Tier summary (what each tier buys):
- Passive limiting / simple segmentation: lowest cost; typically narrow conduction and higher ripple sensitivity; PF/THD and flicker are most constrained.
- Semi-active (valley-fill / charge-pump / switched-cap): widens conduction window using charge transfer paths; improves bus valleys with limited capacitance; medium complexity.
- Active shaping (quasi-PFC): treats input current as a controlled waveform; best lever for PF/THD and predictable behavior across line/load; highest complexity.
Evidence chain fields (measure to place a design in the right tier):
- iIN waveform (current clamp): spike width/height vs “spread” conduction; directly reflects THD risk.
- PF/THD (pre-check gate): validate at rated load and worst-case line.
- VBUS ripple (ΔV) and ILED ripple (ΔI/I): correlate to 100/120 Hz modulation and flicker metrics.
- Inrush signature: startup charging peak and stress margin; watch for nuisance trips and component overstress.
| Tier | Typical capability boundary (pre-check) | Primary “prove it” measurement | Most common risk |
|---|---|---|---|
| Passive | Works best when PF/THD targets are relaxed and flicker tolerance is moderate. | iIN shows narrow, high peaks; ΔVBUS and ΔILED often track line valleys. | THD and 100/120 Hz ripple become hard limits; inrush spikes can be harsh. |
| Semi-active | Extends workable range under small-cap by widening conduction and lifting valleys. | iIN becomes “wider”; VBUS valleys rise; ILED ripple reduces if headroom holds. | Charge-transfer edges can raise EMI; inrush and surge stress need discipline. |
| Active shaping | Best choice when PF/THD must be consistent across line/load and flicker is tightly controlled. | iIN waveform is intentionally shaped; PF/THD has margin; ripple is engineered. | Higher complexity; switching noise management and protection coordination matter. |
H2-4. Small-cap / electrolytic-free energy buffering: what you can and can’t “store”
Key idea: with electrolytics removed, the remaining “small-cap” is an energy bucket. For a fixed output power, the allowed bus swing (ΔV) determines how much capacitance is required—and a tight capacitance ceiling forces larger ripple.
Engineering translation: if the energy bucket cannot bridge the half-cycle energy gap at low line, the gap will appear as VBUS ripple, then as ILED ripple, and finally as worse 100/120 Hz flicker metrics.
Smallest useful sizing path (no heavy derivation):
- Capacitor energy window (usable energy between two bus voltages):
E ≈ 0.5 · C · (Vhi2 − Vlo2) - Energy demand across the valley interval (order-of-magnitude):
ΔE ≈ Pout · Δt, withΔton the order of the rectified peak-to-peak gap (≈10 ms @ 50 Hz, ≈8.3 ms @ 60 Hz). - Decision: if
E < ΔE, then the remaining energy deficit must show up as ripple—either accepted (higher flicker) or reduced by widening the conduction window / shaping the input current (ties back to H2-3).
Evidence chain fields (what to capture on the bench):
- VBUS (ΔV): measure valley depth at worst-case low line and rated power.
- ILED (ΔI/I): measure 100/120 Hz ripple component; correlate to percent flicker / flicker index.
- iIN shape: confirm that reducing ripple did not create narrow, higher peaks that push THD upward.
| Item | What to confirm | Why it matters here |
|---|---|---|
| Allowed ΔV | Define Vhi and Vlo where constant-current operation still holds. | Too small ΔV forces higher C; too large ΔV forces more ripple and flicker. |
| Effective capacitance | Check effective C at operating voltage (watch for bias-dependent reduction). | Budget errors are common when “nameplate C” collapses at high DC voltage. |
| Ripple current / heating | Validate ripple current stress and temperature rise for the chosen capacitor type. | Small-cap runs harder; heating becomes reliability risk under high ripple. |
| Ripple → flicker | Correlate ΔI/I at 100/120 Hz to percent flicker / flicker index. | Prevents “VBUS looks okay” misreads when ILED ripple is still large. |
H2-5. PF & THD: input current shaping knobs (and what breaks them)
PF/THD is not a slogan. In AC-direct drivers, the pass/fail story is usually visible in the input current waveform: conduction angle, peak height, and sharp charging pulses. If the waveform is narrow and spiky, THD will rise even if average power looks fine.
Bench rule: Always capture VAC and iIN together. PF/THD numbers are summaries; iIN shape tells why they moved and which knob to turn.
Evidence chain fields (measure, then decide):
- iIN waveform (current clamp or shunt): conduction window width, peak height, and any “needle” spikes.
- PF and THD (power analyzer / metering): record at rated load and worst-case line.
- VBUS + ILED ripple (context): improvements that widen conduction must not re-create large 100/120 Hz ripple or deep-dim instability.
Three shaping knobs (what each one changes in iIN):
Knob #1 — Conduction angle
Widen the phase window where current is drawn from the mains. A wider window typically reduces narrow spikes and lowers high-order harmonics.
- Prove it: iIN turns from “needle spikes” into a wider hump across the half-cycle.
- Watch out: widening via charge-transfer can add edge spikes that raise THD or EMI if not smoothed.
Knob #2 — Peak limiting
Limit the maximum current and di/dt of charging events. This directly targets the THD driver: tall, narrow peaks.
- Prove it: peak height drops while delivered energy stays adequate at low line.
- Watch out: over-limiting can starve energy near valleys, increasing VBUS/ILED ripple.
Knob #3 — Shaping strategy
Define how the circuit distributes energy draw over the mains cycle: passive, semi-active charge transfer, or active quasi-PFC shaping.
- Prove it: iIN becomes intentionally “spread” with controlled peaks and stable PF/THD across line/load.
- Watch out: stronger shaping usually means more switching edges to manage for EMI and stress.
What breaks PF/THD (common failure modes in AC-direct):
- Bridge + cap peaky charging: a small bus capacitor can create very narrow, high charging pulses near the rectified peaks—THD jumps even if average current is modest.
- Valley-fill / charge-transfer edge spikes: conduction window may widen, but switching/transfer edges can inject repetitive spikes that dominate harmonic content.
- Phase-cut input distortion: the mains waveform is truncated; iIN becomes discontinuous and can re-form spikes at the phase boundary, destabilizing PF/THD behavior.
H2-6. Low-frequency flicker control (100/120 Hz): metrics, targets, levers
Low-frequency flicker in AC-direct is usually a direct consequence of 100/120 Hz ripple propagating through the chain: VBUS ripple → ILED ripple → light output modulation. This chapter turns flicker into measurable metrics and actionable levers.
Practical framing: IEEE 1789 is a reference for thinking about risk vs frequency and modulation; the engineering work here is to measure ripple and keep modulation out of the visible-risk region without breaking PF/THD.
Flicker metrics (what to report):
- Percent flicker: based on peak-to-valley modulation depth of light output.
- Flicker index: captures waveform shape (two waveforms with similar amplitude can yield different index).
- Frequency context: in rectified mains systems, the dominant component is commonly 100/120 Hz unless additional control artifacts appear.
Evidence chain fields (three waveforms to always capture):
- VBUS: valley depth and peak-to-peak ripple at worst-case low line.
- ILED: 100/120 Hz ripple component (ΔI/I) and any discontinuous regions.
- Light output proxy: photodiode / sensor signal to confirm what becomes visible (modulation depth + shape).
Actionable levers (what to change, what to re-check):
Lever #1 — Reduce ILED ripple at the source
Increase usable energy bridging or widen conduction so the bus valley does not starve the constant-current stage.
- Prove it: ΔVBUS decreases and ΔILED/ILED decreases; light proxy modulation drops.
- Re-check: iIN does not revert to narrow, taller peaks that raise THD.
Lever #2 — Prevent ripple from becoming “visible”
Choose a current control and dimming strategy that avoids amplifying low-frequency ripple in the visible band, especially at deep dim levels.
- Prove it: light proxy percent flicker and flicker index improve at the same electrical ripple.
- Re-check: no new low-frequency artifacts appear from mode switching or discontinuous conduction.
Lever #3 — Deep-dim stability (avoid ripple amplification)
Deep dimming reduces headroom and increases visibility of modulation. Any threshold crossings, discontinuity, or noise injection can turn modest ripple into strong visible flicker.
- Prove it: VBUS + ILED + light proxy remain smooth when dimming below low-percent levels.
- Re-check: no burst-like behavior or mode toggling is triggered near valleys.
H2-7. Phase-cut / Triac compatibility: bleed, hold current, and misfire failure modes
In AC-direct lighting, “Triac compatible” is a waveform problem: keep the dimmer’s triac latched when it should be on, avoid dV/dt-triggered false firing, and prevent low-level burst flicker. Failures often appear only on certain dimmers because the interaction depends on the dimmer trigger method, the load’s effective impedance, and the EMI network.
Pass criteria (practical): stable firing across a dimming range, no random misfire, no dropout events, and no burst flicker at low brightness.
Evidence chain fields (measure first):
- VTRIAC (triac voltage, across MT1–MT2): phase-cut angle, firing stability, and any unexpected “re-firing” points.
- iIN (input current): continuity during the conduction window, peak/spike patterns, and drop-to-zero events.
- Failure timing: align VTRIAC edges with iIN collapse to classify misfire vs dropout vs burst operation.
Control knobs (what is adjustable and what it can break):
Knob #1 — Bleeder/hold-current level
Provide a controlled minimum load current so the dimmer sees a “real” load and the triac remains latched through the intended conduction interval.
- Prove it: fewer VTRIAC re-open events; iIN stays non-zero through the intended window.
- Watch out: extra bleeder power reduces efficiency and can worsen PF/THD if it re-creates peaky current.
Knob #2 — Bleeder threshold & timing
Decide when bleeder current is injected (phase region / bus condition) so it supports latching without amplifying low-frequency ripple or causing visible modulation.
- Prove it: stable firing at low dim levels without burst flicker.
- Watch out: poor timing can create repetitive current steps that increase EMI and visible artifacts.
Knob #3 — dV/dt immunity strategy
Prevent false triggering caused by fast edges, ringing, or EMI-filter interaction. The goal is predictable firing, not random latching.
- Prove it: misfire probability drops; VTRIAC firing points become repeatable.
- Watch out: over-damping can increase conduction loss or shift the phase interaction.
Three failure modes (how to classify quickly):
- Misfire: triac fires at an unintended moment (often dV/dt or ringing related). Look for unexpected VTRIAC collapse not aligned to the dimmer edge.
- Dropout: triac unlatches mid-window (hold current insufficient). Look for iIN falling to zero and VTRIAC returning high before the expected commutation.
- Burst flicker: at deep dim, energy delivery becomes discontinuous (periodic fire/skip patterns). Look for repeating on/off groups in iIN and in light proxy.
Always re-check: fixing triac behavior by adding bleeder current can increase spikes (PF/THD) or increase low-frequency modulation (flicker). Verify VTRIAC + iIN + (optional) light proxy together.
H2-8. EMI, inrush, and surge in AC-direct designs (practical pre-check)
This is not an EMC standards lesson. It is an AC-direct pre-check checklist: identify where noise current is created, why inrush happens at plug-in, and how surge protection parts fail in real products. The goal is to catch “obvious killers” early with minimal tools.
Evidence chain fields (what to observe on the bench):
- dv/dt nodes after the bridge: fast edges and ringing that correlate with conducted peaks.
- Charge-transfer / switching edges: repetitive spikes that can dominate EMI signature.
- Common-mode return paths: parasitic coupling paths that feed noise into line/cable references.
- Inrush event: plug-in current peak magnitude and duration, plus repeatability across re-plugs.
- Surge protection chain status: MOV/TVS/NTC/fuse behavior and any available event counters/logs.
EMI: why AC-direct is sensitive
AC-direct stages frequently create narrow charging pulses and fast transfer edges. These produce high harmonic content and excite parasitic loops. Fixes that improve PF/THD can still fail EMI if they introduce sharp edges or large loop areas.
- First proof: correlate “worst peaks” in iIN with bridge-node ringing and transfer-edge spikes.
- Design focus: minimize high-di/dt loop area and manage dv/dt coupling paths.
Inrush: plug-in transient reality
At plug-in, a discharged bus and transfer capacitors can pull a large current spike. Inrush is not just a fuse issue—large spikes can trigger nuisance trips, cause arcing, and stress rectifiers and NTCs.
- Measure: iIN peak and pulse width at cold start; repeat across re-plugs.
- Interpret: if inrush grows after warm-up, suspect NTC state or control timing.
Surge: protection chain and failure modes
Surge energy is handled by a chain. Parts may degrade silently before a hard failure. The pre-check is to verify where energy is intended to go and what a “failed” state looks like.
- Typical chain: MOV / TVS / NTC / fuse (implementation-dependent).
- Pre-check: confirm no single part becomes the only sink; watch thermal signs and repeated event response.
Minimal-tool pre-check (repeatable steps): (1) scope + current clamp for inrush and iIN spikes; (2) scope for bridge-node dv/dt and transfer-edge ringing; (3) optional near-field probe / spectrum snapshot to compare “before/after” tuning; (4) log each knob change vs observed peaks and temperatures.
H2-9. Protection & safety behaviors: OVP, open-string, short, thermal foldback
Protection should be specified as behavior (threshold → false triggers → response → recovery), not as a feature list. In AC-direct designs, protection actions can unintentionally create visible artifacts (burst flicker, sudden off) because they change conduction timing and energy delivery across the mains half-cycle.
Evidence chain fields (log these per test): OVP threshold & blanking, open-string detect rule/time, short limit & hiccup timing, thermal foldback slope & hysteresis, recovery ramp (soft-start), retry count / cooldown.
OVP + open-string (AC-direct special risk)
Why it is different: an open string removes the energy sink. In small-cap AC-direct stages, bus energy can concentrate into VBUS overshoot at specific phase moments.
- Threshold: OVP trip (VBUS), plus a short blanking/deglitch time.
- False triggers: connector bounce, deep-dim discontinuities, phase-cut input anomalies.
- Response modes: clamp/limit, hiccup retry, or latch-off (application dependent).
- Recovery: require open-string cleared + soft-start ramp; avoid fast repetitive retries.
- Measure: VBUS overshoot peak + duration; confirm ILED is not forced into a visible pulse pattern.
Short / overcurrent (spike + thermal coupling)
Short conditions can stack charging spikes with fault current, pushing bridge, transfer path, and sense elements into worst-case stress.
- Threshold: ILED limit and/or fast current limit (if implemented).
- False triggers: startup inrush interpreted as fault; phase-cut transients.
- Response: limit (continuous) vs hiccup (pulsed). Prefer behaviors that do not create visible flicker patterns.
- Recovery: cooldown + retry count; stop rapid retry loops when the short persists.
- Measure: iIN peak during fault + ILED limiting waveform; check thermal proxy rise rate.
Thermal foldback (slope matters)
Thermal protection that only defines “OTP threshold” often causes brightness hunting. A defined foldback slope and hysteresis prevents oscillation near the boundary.
- Threshold: warning/entry temperature + shutdown temperature (if used).
- False triggers: sensor placement, airflow variation, potting gradients, NTC noise.
- Response: gradual foldback (slope) + optional hard cutoff for extreme cases.
- Recovery: hysteresis + ramp-back (avoid “sudden bright” recovery).
- Measure: NTC (junction proxy) + ILED vs temperature curve; ensure no periodic pulsing enters the visible range.
Write each protection as a 4-line spec (repeatable):
- Trip: what quantity + threshold + deglitch time
- Mis-detect: what normal condition can look like this fault
- Action: limit / hiccup / latch (and why)
- Recover: conditions + cooldown + ramp (and visibility constraints)
H2-10. Validation checklist: what to measure, in what order (bench → pilot run)
A repeatable validation order turns a “lights up on the bench” prototype into a pilot-ready design. Each step below uses the same pattern: Goal → First 2 measurements → Pass/Fail → Fast isolate. The sequence is chosen to surface safety and visibility risks early, then converge on waveform metrics and compatibility.
Fixed test points (TP map): TP1 VRECT (bridge out), TP2 VBUS, TP3 iIN, TP4 ILED, TP5 VTRIAC, TP6 Light proxy, TP7 dv/dt hotspot node, TP8 NTC / temp proxy.
Step 1 — Electrical safety & thermal sanity (bench gate)
Goal: no abnormal overshoot, no runaway heating, no protection oscillation.
- First 2 measurements: TP2 (VBUS) + TP8 (temp proxy).
- Pass/Fail: stable VBUS behavior and monotonic thermal trend; no repeated hiccup events.
- If fail, isolate: check startup/inrush, open-string detection, thermal sensor placement.
Step 2 — Flicker at worst-case + deep dim
Goal: suppress 100/120 Hz modulation and avoid burst behavior at low level.
- First 2 measurements: TP4 (ILED ripple) + TP6 (light proxy).
- Pass/Fail: flicker metrics meet the target tier; no burst flicker patterns at deep dim.
- If fail, isolate: ripple injection path (VBUS→ILED), loop stability at low current, dimming strategy.
Step 3 — PF/THD waveform check
Goal: input current is not dominated by narrow charging spikes.
- First 2 measurements: TP3 (iIN waveform) + PF/THD readout.
- Pass/Fail: conduction window is sufficiently wide; peaks are bounded; improvements are consistent across line conditions.
- If fail, isolate: charge-transfer timing, inrush/charge spikes, current shaping settings.
Step 4 — Triac compatibility sweep
Goal: no misfire, no dropout, no burst patterns across dimmers and settings.
- First 2 measurements: TP5 (VTRIAC) + TP3 (iIN).
- Pass/Fail: stable firing points; no mid-window unlatch; low-level operation stays continuous or smoothly reduced.
- If fail, isolate: hold-current strategy, bleeder threshold/timing, dV/dt immunity interaction with EMI network.
Step 5 — EMI practical pre-check
Goal: identify dominant spike sources and confirm fixes reduce hotspot activity.
- First 2 measurements: TP7 (dv/dt hotspot) + TP3 (iIN spikes).
- Pass/Fail: worst ringing/spikes reduce when knobs are tuned; no new extreme edges appear.
- If fail, isolate: high di/dt loop area, switching edge control, DM/CM return paths.
Step 6 — Simplified fault injection (pilot gate)
Goal: protections behave per spec and recover without visible artifacts.
- First 2 measurements: TP2 (VBUS overshoot) + TP4 (ILED limiting / hiccup behavior).
- Pass/Fail: state transitions match the intended policy; recovery uses soft-start; no visible-rate hiccup patterns.
- If fail, isolate: threshold margins, deglitch timing, retry cooldown, thermal hysteresis.
H2-11. IC selection & BOM anchors (with concrete MPNs)
This chapter turns the earlier targets (PF/THD, 100/120 Hz flicker, phase-cut compatibility, small-cap constraint) into a repeatable selection funnel: architecture tier → controller class → must-have features → minimum bench proof. MPNs below are practical anchors (always validate against the latest datasheet and the H2-10 checklist).
A) Lock the inputs first (so the BOM can’t drift)
Selection inputs (copy these into the “Evidence” card for your build log):
- Line: VAC range (min/nom/max), 50/60 Hz, surge assumption (kV class as a design assumption, not a standards lecture).
- LED load: ILED target, VLED,string min/max, allowed conduction window (how “AC-direct” the string can tolerate).
- Flicker targets: choose at least one hard metric: Percent Flicker and/or Flicker Index; define deep-dim floor (e.g., 1–10%) and “no burst flicker” expectation.
- PF/THD targets: PF goal + THD goal in engineering terms; the real proof is iIN waveform + meter.
- Energy buffering constraint: electrolytic-free or “total C limit” (µF ceiling + allowed types: film / HV MLCC / switched-cap bank).
- Phase-cut (TRIAC) requirement: leading/trailing edge, minimum hold-current strategy, and acceptable bleeder power budget.
B) Architecture tier → controller class (MPN anchors)
Use this map to avoid “random IC shopping”. First pick the performance tier, then pick the IC class that can actually hit it.
| Tier | What it buys | What usually breaks | Concrete IC examples (MPNs) |
|---|---|---|---|
| Passive / minimal control |
Lowest BOM; simplest current limiting / segmenting. lowest costsimple |
Flicker and THD often worst; phase-cut compatibility unstable; protection behavior can create visible artifacts. |
(Use only when flicker/PF demands are relaxed.) Example “reference-only” controller style: SW5909-based designs appear in vendor app notes (see BOM anchors in section D). :contentReference[oaicite:0]{index=0} |
| Mid-tier: (Self) Valley-Fill / switched-cap shaping |
Enlarges conduction angle under small-cap limits; significantly improves flicker index while keeping PF decent. small-cap friendlyflicker improvement |
Switching edges can inject EMI; valley-fill transitions can create input current spikes if not damped; triac misfire if hold-current path is weak. |
onsemi direct-AC drivers with proprietary Self Valley-Fill (SVF): • FL77904MX :contentReference[oaicite:1]{index=1} • FL77944 :contentReference[oaicite:2]{index=2} • FL77905 :contentReference[oaicite:3]{index=3} (SVF + phase-cut options are explicitly called out in product/datasheet materials.) :contentReference[oaicite:4]{index=4} |
| High-tier: active current shaping (quasi-PFC control) |
Best control of iIN shape and dimming behavior; PF/THD can be managed more predictably alongside flicker targets. PF/THD controlrobust dimming |
Complexity and tuning; EMI/inrush management becomes “system level”; more bench proof required (H2-10). | Renesas (Dialog) iW3989-00: AC-direct, phase-cut dimming, magnetics-free positioning (vendor stated). :contentReference[oaicite:5]{index=5} |
Rule: if the requirement list includes both “tight flicker” + “good PF/THD” + “wide phase-cut compatibility”, start from SVF/direct-AC or active shaping classes, then prove with the H2-10 waveform order.
C) Controller IC shortlist (MPNs) + feature checklist
Must-have (ties back to H2-5/H2-6/H2-7/H2-9):
- Flicker lever under small-cap: SVF / switched-cap / active shaping path (not just “it lights”).
- Input current shaping hooks: conduction angle widening + peak control (PF/THD depends on waveform, not slogans).
- Phase-cut support (if needed): dimmer detection + hold-current strategy + misfire immunity.
- Fault behavior you can live with: open/OVP/OTP recovery must avoid visible burst flicker.
Concrete IC MPN anchors (pick the class that matches your tier):
- Renesas (Dialog) iW3989-00 — AC direct, phase-cut dimming oriented (vendor stated). :contentReference[oaicite:6]{index=6}
- onsemi FL77904MX — direct AC line driver; SVF mentioned for flicker index improvement; phase-cut support shown. :contentReference[oaicite:7]{index=7}
- onsemi FL77944 — direct AC line driver family with phase-cut capability (datasheet). :contentReference[oaicite:8]{index=8}
- onsemi FL77905 — direct AC line driver; SVF referenced for flicker index improvement (datasheet). :contentReference[oaicite:9]{index=9}
- SW5909 — appears in AC-direct application note designs (use as BOM reference anchor; validate availability/fit). :contentReference[oaicite:10]{index=10}
- ACL406AS — direct-AC driver app note exists (use as another reference anchor if the supply chain matches). :contentReference[oaicite:11]{index=11}
Kill-switch (common “hits spec on paper, fails in field” reasons):
- Needs large electrolytic to stay stable (violates this page’s constraint).
- Deep dim devolves into burst mode visible flicker (fails the human-visible requirement).
- Phase-cut only works with a hot/high-loss bleeder (efficiency + thermal drift + dimmer compatibility degrade).
D) Concrete BOM anchors (non-IC parts) — example MPNs by function
These are widely used “anchors” so the BOM is concrete. Ratings/package must be chosen per VAC and power. Keep the selection logic tied to the H2-10 measurement order (iIN → VBUS → ILED → light proxy).
| Function | MPN examples (anchors) | Why it matters in AC-direct |
|---|---|---|
| Direct-AC controller IC | iW3989-00; FL77904MX; FL77944; FL77905; SW5909; ACL406AS | Defines the achievable tier for PF/THD, flicker and phase-cut behavior. |
| Bridge rectifier | DF10S / DB107-style bridges (vendor-multiple); ABS10 (family) — pick by IFSM and thermal. | iIN spikes and high peak current can overstress the bridge even at modest average power. |
| HV MOSFET (if design uses discrete switching) | FDD5N60NZTM (appears in SW5909 BOM examples); plus common 600 V families like ST / Infineon / onsemi equivalents (choose by Qg vs EMI). :contentReference[oaicite:12]{index=12} | Switching edge control trades EMI vs loss; avalanche robustness matters during surge events. |
| Zener / clamp (bias & protection) | UDZ18B (18 V zener shown in SW5909 BOM example); choose clamp levels per bias rail. :contentReference[oaicite:13]{index=13} | Bias stability affects dimming stability; clamp choices affect hiccup behavior and recovery artifacts. |
| Small-cap buffering (film / HV caps) |
Film families often used: KEMET R46 series; TDK/EPCOS B3292x families (choose by DC bus rating). (Keep “effective C” in mind for MLCC under DC bias.) |
Directly sets the 100/120 Hz ripple energy you can “borrow” → flicker metrics. |
| Inrush limiter (NTC) | B57236S0200M000 (EPCOS/TDK NTC ICL series example). :contentReference[oaicite:14]{index=14} | Without electrolytic, inrush still exists (especially with switched-cap/valley-fill). Limits peak stress and EMI bursts. |
| Surge clamp (MOV) | V275LA20AP (Littelfuse MOV example); MOV-14D471K (Bourns example). :contentReference[oaicite:15]{index=15} | Surge events can reshape iIN and cause catastrophic failure; MOV selection must match VAC region and surge class. |
| Common-mode choke (EMI pre-check) | 744823210 (Würth WE-CMB series example). :contentReference[oaicite:16]{index=16} | Direct-AC topologies can have sharp dv/dt events; CM path control is usually the fastest way to calm emissions. |
| Bleeder / hold-current (phase-cut) | High-value HV resistor networks (e.g., 270 kΩ class shows up in SW5909 BOM tables); select by power dissipation at max line and dim angles. :contentReference[oaicite:17]{index=17} | Too weak → misfire/dropout/burst flicker; too strong → thermal + wasted power + dimmer interaction. |
Practical note: a “good-looking BOM” is not proof. Proof is the waveform set: iINVBUSILEDTRIAC VLight proxy measured in the H2-10 order.
F11) AC-direct IC selection funnel (architecture → features → bench proof)
E) Copy-paste MPN starter list (so the BOM is concrete)
Controller IC anchors: iW3989-00; FL77904MX; FL77944; FL77905; SW5909; ACL406AS.
Protection / EMI anchors: B57236S0200M000 (NTC); V275LA20AP (MOV); MOV-14D471K (MOV); 744823210 (CM choke).
Discrete anchors from AC-direct app note BOM: FDD5N60NZTM (HV MOSFET); UDZ18B (zener clamp). :contentReference[oaicite:18]{index=18}
Next step (H2-10 alignment): verify with iIN waveform first (PF/THD cause), then VBUS ripple, then ILED ripple, then light proxy; only after that tune bleeder/hold-current for phase-cut.
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H2-12. FAQs (AC-Direct LED Driver)
Every answer is evidence-based and stays within this page: VBUS / ILED / iIN / TRIAC waveforms, thresholds, state machine timing, and EMI current loops.
Q No electrolytic, but the light visibly “breathes”—bus ripple or control instability?
Short“Breathing” is either energy ripple (VBUS 100/120 Hz) coupling into ILED, or a loop/mode instability that creates a low-frequency envelope.
- Measure: VBUS ripple and ILED ripple simultaneously; add a light-proxy (photodiode) to confirm optical modulation.
- Discriminator: If ILED tracks VBUS with stable phase → energy shortage; if VBUS is steady but ILED shows bursts/beat notes → control/mode switching.
- First fix: Improve conduction-angle shaping / SVF timing for energy cases; add damping/compensation margins for deep-dim stability cases.
Maps to H2-2 (half-cycle energy flow) & H2-6 (flicker levers).
Q PF looks fine but THD is terrible—what waveform feature usually causes this?
ShortHigh PF with bad THD usually means the input current has narrow, tall spikes—phase alignment can still be “okay” while harmonics explode.
- Measure: iIN with a current clamp and overlay it on rectified line voltage; log PF/THD from the same operating point.
- Discriminator: Spikes concentrated near line peaks indicate bridge+cap charging; spikes at repeated switching instants suggest valley-fill / switched-cap transitions.
- First fix: Widen conduction angle and limit peak current (timing/damping/soft edges) before chasing “meter settings.”
Maps to H2-5 (PF/THD knobs & iIN waveform).
Q Flicker is okay at full power but awful at deep dim—what changed?
ShortDeep dim often changes the operating mode: the controller may enter burst/skip, valley-fill thresholds shift, or phase-cut conduction windows become fragmented—amplifying visible 100/120 Hz modulation.
- Measure: VBUS, ILED, and (if phase-cut) TRIAC voltage at both full power and deep dim; add light-proxy to confirm visibility.
- Discriminator: If flicker worsens only with TRIAC → hold-current/misfire; if it worsens under PWM/I²C dim → loop/mode transition.
- First fix: Prevent burst energy from entering the visible band; tighten deep-dim stability and reshape conduction under dim conditions.
Maps to H2-6 (metrics/levers) & H2-7 (phase-cut interactions).
Q TRIAC dimmer works on one brand but not another—hold current or dV/dt misfire?
ShortBrand-to-brand incompatibility is usually either insufficient hold current (dropout) or dV/dt-triggered misfire caused by EMI filter interaction and fast edges.
- Measure: TRIAC voltage, iIN, and the timing of dropouts/misfires relative to the phase angle.
- Discriminator: Dropout happens when iIN dips below hold current; misfire shows unexpected re-triggering correlated with steep dv/dt and ringing.
- First fix: Tune bleeder/hold-current strategy within a power budget; add damping and edge control to reduce dv/dt sensitivity.
Maps to H2-7 (phase-cut compatibility).
Q Power-on causes a brief flash then settles—inrush or OVP clamp interaction?
ShortA brief flash typically comes from startup energy overshoot: inrush/charge events spike VBUS or ILED, or the OVP/state machine clamps and releases during the first half-cycles.
- Measure: Startup VBUS overshoot, ILED peak, and any hiccup/soft-start timing; correlate with iIN spike magnitude.
- Discriminator: VBUS overshoot preceding ILED step suggests OVP clamp interaction; huge iIN spikes with minimal VBUS overshoot suggests charge-path/inrush shaping.
- First fix: Add inrush limiting and damping; align OVP thresholds and startup ramps to avoid visible “one-shot” behavior.
Maps to H2-8 (inrush/EMI) & H2-9 (protection behavior).
Q Open-string sometimes kills the driver—OVP threshold or energy dump path?
ShortIn AC-direct, an open string can remove the load while rectified energy still arrives, causing VBUS runaway; failure is usually OVP response/timing or an inadequate energy dump path.
- Measure: VBUS rise rate and peak during an induced open-string; log OVP trigger timing and the state machine response (hiccup/latch/retry).
- Discriminator: If VBUS exceeds device ratings before OVP reacts → threshold/latency issue; if OVP triggers but stress remains → dump path/current path issue.
- First fix: Tune OVP thresholds and ensure a controlled discharge/limit path that does not create visible recovery flicker.
Maps to H2-9 (fault state machine) & H2-2 (energy flow).
Q Why does adding more small-cap improve flicker but worsen EMI?
ShortMore capacitance reduces 100/120 Hz ripple energy deficit, improving flicker, but it can also concentrate charging current into narrower intervals and sharpen dv/dt—raising conducted/radiated EMI.
- Measure: Compare VBUS ripple (should drop) and iIN peak/spike content (often rises); observe DM/CM noise with near-field probe or LISN pre-check.
- Discriminator: If iIN spikes grow while VBUS ripple shrinks, EMI is driven by charge-pulse shape rather than average power.
- First fix: Add damping/soft edges and tighten current loop areas; rebalance conduction-angle shaping so energy is drawn more smoothly.
Maps to H2-4 (energy buffering) & H2-8 (EMI loops).
Q Input current has narrow spikes—valley-fill timing or bridge+cap charging?
ShortNarrow spikes come from either classic bridge + cap charging near the line peaks or from valley-fill / switched-cap transitions that create discrete charge steps during the half-cycle.
- Measure: iIN waveform with phase reference to rectified voltage; if possible, observe the valley-fill node timing vs spikes.
- Discriminator: Peak-only spikes point to bridge+cap; spikes that repeat at fixed thresholds/times point to valley-fill switching events.
- First fix: For bridge+cap, widen conduction/limit peak; for valley-fill, add transition damping and adjust timing to avoid impulse-like current.
Maps to H2-3 (taxonomy) & H2-5 (PF/THD knobs).
Q Thermal foldback causes visible steps—how to make derating “smooth”?
ShortVisible steps usually mean the thermal protection is thresholdy (hard trips, no hysteresis) or the foldback curve is segmented, causing noticeable brightness discontinuities.
- Measure: Temperature proxy (NTC), ILED, and dimming state; check foldback slope, hysteresis, and recovery timing in the state machine.
- Discriminator: If ILED toggles between two levels near a threshold → insufficient hysteresis/filtering; if ILED changes in large plateaus → foldback quantization.
- First fix: Increase hysteresis and smooth the foldback slope; ensure recovery does not enter burst-like visible flicker.
Maps to H2-9 (protection behaviors).
Q Surge tests pass, but field failures happen—what evidence should be logged?
ShortPassing a lab surge does not guarantee field immunity because coupling paths vary; field debug needs event-level evidence tied to VBUS peaks, protection triggers, and reset/fault counters.
- Measure/log: Max VBUS, OVP/OTP trigger count, hiccup timing, reset count, and (if available) “last-fault” reason; correlate with line disturbances.
- Discriminator: Repeated OVP/OTP triggers before failure suggests protection stress; sudden hard failure without triggers suggests clamp/energy path overstress.
- First fix: Add minimal event logging and rerun the H2-10 bench→pilot sequence with the same measurement points and pass/fail gates.
Maps to H2-8 (surge/inrush) & H2-10 (validation order).
Q Percent flicker vs flicker index—when do they disagree and which matters?
ShortThey disagree when the light modulation waveform shape changes: percent flicker is sensitive to peak-to-valley extremes, while flicker index reflects how the waveform’s area is distributed over a cycle.
- Measure: Light-proxy waveform (not just ILED) and compare shapes at the same average brightness.
- Discriminator: Sharp spikes can drive high percent flicker but a different flicker index than a smooth sinusoidal ripple with the same amplitude.
- First fix: For human-visible comfort, prioritize the metric that correlates with the observed waveform and application; then reduce modulation by lowering VBUS→ILED coupling.
Maps to H2-6 (flicker metrics and levers).
Q How to quickly estimate minimum capacitance for a flicker target?
ShortStart from an energy view: the smaller the allowed VBUS ripple (ΔV), the more “borrowed” energy must come from capacitance, and that directly limits 100/120 Hz ILED modulation.
- Estimate: Use Pout, line frequency, allowed ΔV (or ripple %) to size C; then correct for MLCC DC-bias by using an effective capacitance.
- Discriminator: If the estimated C improves VBUS ripple but flicker remains, the issue is control/mode coupling rather than energy alone.
- First fix: Validate with the H2-10 order (VBUS→ILED→light proxy) and adjust shaping/valley-fill timing before simply increasing C further.
Maps to H2-4 (energy buffering) & H2-6 (flicker targets).
