H2-1. One-line Thesis + What problems this page solves

Buck-boost constant-current (CC) LED drivers deliver a regulated LED string current across a wide input range, while keeping buck↔boost transition seamless and deep dimming flicker-free.

This page focuses on the three engineering constraints that typically break wide-VIN CC designs: region-crossing stability, current ripple vs visible flicker, and device stress vs efficiency/thermal.

Three problems this page is designed to solve

• Brightness “steps” near VIN ≈ VLED — caused by control-loop gain/phase drifting across buck/boost regions (and boundary logic that is not smooth). The solution is a region-aware control/transition approach validated by step response and stability evidence.
• Deep-dimming flicker / low-level instability — caused by ripple fraction rising as average current drops, plus minimum on/off-time and loop-bandwidth constraints. The solution is a dimming strategy tied to measurable ripple and transient metrics.
• Efficiency drop or abnormal heating in specific VIN bands — caused by region-dependent RMS currents and switching stress (often worst around the boundary, not only at VINmin/VINmax). The solution is “worst-point” identification with stress/thermal evidence.

Evidence checklist (fields referenced throughout this page)

H2-2. Where buck-boost is required (region map) & topology choices

Start with a region map: compare the available input window VIN(min…max) with the LED string operating window VLED(min…max). If those windows overlap in a way that requires both step-down and step-up operation, a buck-boost CC stage is not optional—it is the only way to maintain regulated current across all conditions.

Region rules (fast classification)

• Buck-only region: VLED(max) < VIN(min) — always step-down.
• Boost-only region: VLED(min) > VIN(max) — always step-up.
• Overlap region: parts of operation can be buck or boost depending on VIN and VLED drift.
• Buck-boost required: VIN sweeps across VLED (common in automotive/battery rails and long strings).

Boundary band (VIN ≈ VLED) is the critical zone. This is where many “it works in the lab” designs fail in the field: control-loop dynamics shift, current sensing becomes noisier relative to the error signal, and device stress can peak unexpectedly. The boundary band must be validated with ILED continuity and no control saturation.

Topology choices (selection logic, not a schematic tutorial)

• 4-switch non-inverting buck-boost — best when efficiency and stress control matter. Watch-outs: transition logic and shoot-through prevention. Evidence: continuous ILED through boundary + stable phase margin across regions.
• SEPIC (CC) — best when a single-switch-like control preference exists and non-inverting output is needed. Watch-outs: coupled capacitor/inductor current ripple and EMI hot loops. Evidence: acceptable ILED ripple (%) at deep dimming + manageable VSW ringing.
• Zeta (CC) — best when output ripple shaping and certain layout constraints are favorable. Watch-outs: component count and energy-transfer capacitor stress. Evidence: no boundary dip in efficiency + controlled device temperature rise.

Boundary evidence (what must be proven around VIN ≈ VLED)

H2-3. Constant-current regulation architecture (what is actually controlled)

Constant-current (CC) regulation controls LED string current (ILED), not output voltage. The LED string voltage shifts with temperature, aging, and binning; a CC driver must treat voltage as a dependent variable and regulate delivered current as the primary control target.

Control chain (signal path that must remain continuous)

CC regulation is a closed loop with explicit observation points. When the loop is stable, the controller adjusts switching action so the measured current tracks the target without visible steps, boundary chatter, or dimming instability.

• Current sensing (Rsense / DCR / switch sensing) produces a feedback signal proportional to ILED (or an estimator correlated to ILED).
• Error amplifier (EA) compares the sensed current to a target (IREF or dimming-scaled reference) and outputs a control voltage.
• COMP node is the loop “control effort” signal; saturation or discontinuity here is a primary failure fingerprint.
• PWM modulator / current-mode core converts COMP into duty-cycle and/or peak-current thresholds.
• Power stage (buck-boost plant) moves energy through inductor/switches; inductor current (IL) is the energy carrier, while ILED is the delivered output.

Peak vs average current-mode: what changes in ripple, compensation, and boundary behavior

• Peak current-mode reacts quickly and simplifies certain loop dynamics, but is more sensitive to switching-edge noise and can require stronger attention to slope compensation and blanking. Boundary risk: peak-sense distortion can create apparent current steps when VIN ≈ VLED.
• Average current-mode measures a filtered/averaged current signal, improving ripple control and deep-dimming behavior when properly implemented. Boundary risk: overly aggressive filtering can slow the loop and increase the chance of boundary “wobble” during dimming steps.

Slope compensation: why it becomes mandatory in wide VIN and fast duty shifts

As duty ratio moves across a wide range (especially near boundary conditions), the effective inductor current slope changes. Slope compensation stabilizes the inner current loop by preventing subharmonic behavior and limiting period-to-period oscillation that would otherwise show up as ILED ripple bursts and low-frequency flicker signatures.

Minimum evidence set (3 measurements that localize most CC loop issues)

H2-4. Seamless region crossing (buck↔boost transition) without current steps

Seamless region crossing means the driver maintains continuous ILED when VIN moves from buck-dominant to boost-dominant operation (and back) — especially inside the boundary band where VIN ≈ VLED. The primary failure signature is a current step (ΔILED) or a brief “hiccup” that is visible as flicker.

Why boundary transitions fail (mechanisms with diagnostic fingerprints)

• Plant shift across regions — small-signal dynamics change; phase margin drops near boundary. Fingerprint: dimming step triggers ringing; COMP shows oscillatory recovery.
• Limiter/threshold swap — current limit, OVP, or soft-start/commit thresholds change abruptly. Fingerprint: ΔILED step coincides with a limiter flag or a restart pattern.
• Noise magnification — sense spikes become significant relative to the error signal. Fingerprint: sensed-current spikes align with COMP jitter and boundary flicker bursts.
• Energy-path discontinuity (4-switch) — conduction path changes introduce body-diode loss or shoot-through risk. Fingerprint: VSW waveform changes shape; boundary efficiency/temperature shows a unique “valley.”

Strategy A: single-loop control + unified modulation

A single CC loop can remain continuous if the modulator smoothly redistributes duty between buck and boost action rather than switching control objectives. Validation focuses on: no COMP discontinuity, stable step response, and consistent phase margin across a VIN scan.

Strategy B: dual-mode control + state machine (required conditions for smooth switching)

• Entry/exit conditions defined around VIN − VLED with hysteresis to prevent mode chatter.
• Debounce time to reject short transients and measurement noise (no rapid toggling).
• Soft switching action such as clamping d(COMP)/dt or ramping thresholds to avoid ILED steps.

4-switch energy-flow management (avoid hidden losses and current steps)

In a 4-switch non-inverting implementation, the control must avoid overlap that risks shoot-through, while also preventing extended body-diode conduction that increases loss and heats the bridge. Region crossing should maintain a predictable energy path and keep inductor current trajectories continuous.

Must-pass criteria (region crossing acceptance checklist)

H2-5. Dimming without flicker (deep dimming, PWM/analog, hybrid)

“Flicker-free dimming” is not a slogan. It is an ILED waveform requirement: keep the delivered current free of low-frequency envelope modulation, avoid current steps during dimming transitions, and ensure repeatable pulse formation at the minimum brightness point.

Define flicker in measurable terms (what must be controlled)

PWM dimming: pulse formation inside the on-window

With PWM dimming, the LED current is gated by a switching “window.” The core risk at deep dimming is that the on-window becomes shorter than the current build-up time, so ILED never reaches a repeatable plateau. The result is nonlinearity, pulse-to-pulse variation, and visible low-frequency modulation even if the PWM frequency is high.

• Build-up time: ILED must rise fast enough within Ton to form a stable pulse (repeatable peak/average).
• Decay path: ILED must reliably fall during Toff without unintended tail current or bounce-back.
• Common failure fingerprints: “missing pulses,” pulse height variation, COMP rail hits during each PWM cycle, or a forced minimum on-time that distorts the dimming curve.

Analog dimming: why ripple ratio increases as current decreases

Analog dimming reduces the current target (IREF). At low ILED, the same absolute ripple becomes a larger fraction of the average (ripple/avg increases). In addition, loop gain and effective control range can shift with operating point, making the system more sensitive to noise and boundary dynamics.

• Stability at low current: avoid operating regions where COMP becomes near-saturated or enters nonlinear behavior.
• Ripple suppression: focus on reducing envelope modulation and keeping ripple/avg below a chosen threshold at the minimum analog current.
• Evidence: measure ILED ripple (%) and LF envelope at both nominal and minimum analog current settings.

Hybrid dimming: choose a switching point that avoids both “short Ton” and “high ripple/avg”

Hybrid dimming typically uses analog dimming for low-to-mid brightness and PWM for ultra-low brightness. The switching point is not arbitrary: it should be placed where PWM Ton approaches the minimum stable pulse formation limit, or where analog ripple/avg becomes unacceptable.

• Switch point rule: change method before PWM pulses become “incomplete,” and before analog ripple/avg becomes dominant.
• Hysteresis: use different thresholds for entering/exiting PWM mode to prevent “method chatter.”
• No brightness step: enforce continuity of average ILED and avoid abrupt COMP changes at the transition.

IEEE 1789 as a metrics hook (no standard deep-dive)

Use IEEE 1789 only as a practical reminder: reduce low-frequency modulation depth and keep the waveform’s low-frequency content and ripple ratio under control at the dimmest operating point. The waveform itself is the compliance-ready evidence.

Dimming evidence checklist (minimum set for acceptance)

H2-6. Current sensing methods & noise immunity (why CC lies)

CC regulation only works if the feedback represents the real LED current. In wide-VIN buck-boost operation, the most common root cause of “brightness drift, noise, or flicker” is not the power stage — it is the sensing chain: offset, temperature drift, switching spikes, and layout coupling that make the loop react to the wrong signal.

Three common sensing approaches and their error fingerprints

• Rsense (shunt): accuracy depends on Kelvin routing and thermal gradient. Fingerprint: current error shifts with board temperature; sense node shows ground-bounce spikes.
• DCR sensing: strong temperature dependence and calibration sensitivity. Fingerprint: low-current accuracy degrades; drift appears as temperature-dependent dimming mismatch.
• Switch/inductor current sensing: vulnerable to switching-edge spikes and blanking/window timing. Fingerprint: COMP jitter correlates with SW-node ringing; boundary mode shows more noise-induced modulation.

Filtering tradeoff: reject spikes without slowing the loop into instability

RC filtering is necessary to prevent switching spikes from entering the error amplifier, but excessive filtering increases loop delay and reduces phase margin — making boundary crossing and dimming steps less stable. The practical rule is to filter spikes while preserving the loop’s required dynamic bandwidth.

Layout and return paths: the hidden coupling channel

High dv/dt at the SW node capacitively injects noise into nearby sense routing, and improper return paths create ground bounce that appears directly as “current.” Correct Kelvin routing and controlled return paths prevent the CC loop from chasing switching artifacts.

• Kelvin pair: dedicated sense+ and sense− routing to the shunt endpoints (not to a shared power/ground segment).
• Return control: keep the sense return inside a quiet reference region; avoid large current loops sharing the same return segment.
• SW proximity: keep sense traces away from the switch node and its high-current loops; minimize parallel run length.

Evidence checklist (minimum measurements to prove sensing integrity)