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Dimmable PSU Stage for LED Drivers (0–10V, PWM, Triac)

Dimmable PSU Stage for LED Drivers (0–10V, PWM, Triac)

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A dimmable PSU stage is reliable only when the dim input is treated as an industrial interface: conditioned, protected, and mapped into the control loop through a stable injection point. The goal is predictable deep dimming (no flicker, no mis-trigger, no audible noise) verified by measurable evidence on DIM_IN/COMP/ILED and EMI deltas.

H2-1. Decision Entry: Choose the dimming interface and lock constraints

This section turns “support dimming” into a measurable input definition. The goal is to decide which interfaces must be supported (0–10V/1–10V, PWM input, triac phase-cut) and to lock the constraints that will determine stability and compatibility.

Decision record (must be fixed before schematic/layout):

  • Interface set: 0–10V / 1–10V / PWM input / triac phase-cut (leading-edge, trailing-edge).
  • Isolation boundary: DIM side isolated or shared reference with the PSU control ground.
  • Cable & wiring: line length, routing vs mains wiring, shield/connector quality.
  • Dimming target: minimum level (e.g., 1%), dim-to-off requirement, allowed flicker/noise envelope.
  • Triac window (if used): phase-angle range + hold current / minimum load behavior.

Measure-first evidence (do not guess):

  • 0–10V / 1–10V: input range, source impedance/drive capability, line noise amplitude.
  • PWM: frequency window, low-duty resolution, edge jitter/noise sensitivity.
  • Triac: phase-angle range, notch/edge type, hold current and minimum load threshold.
F1 — Interface Selection Map (Risk vs What to Measure) Lock constraints first, then measure the parameters that define risk. Low risk short cable · stable reference Medium long cable or noisy wiring · deep dim High isolation + triac compatibility + deep dim 0–10V Measure V range Source Z Line noise Cable + GND 1–10V Measure Min clamp Linearity Noise floor No true off PWM Measure fPWM Edge/jitter Low duty De-glitch Triac Measure Phase Hold I Min load Lead/Trail Rule: if any key parameter is unknown, measure it before choosing filters, isolation, or injection.
Measure-first selection prevents “mystery flicker” later by fixing interface constraints and the evidence list upfront.
Cite this figure: See References · Conceptual block map

H2-2. System Architecture: Place the dimming stage and define noise boundaries

A robust dimmable PSU stage follows a fixed chain: Input Conditioning → Command Mapping → Injection. The same node names are reused for validation and field debug to avoid ambiguity.

3 recommended test points (TP):

  • TP1 — DIM_SENSE: input integrity (noise, jitter, phase detection quality).
  • TP2 — DIM_CMD: mapping behavior (low-end clamp, slope limit, stability).
  • TP3 — COMP (or injection node): loop interaction (low-frequency wobble, headroom, injected noise).

Noise coupling paths to control (define early):

  • dv/dt coupling: switching-node capacitive injection into DIM wiring/sense networks.
  • Return shift: shared return impedance moves the DIM reference and distorts DIM_CMD.
  • Common-mode injection: long cable/enclosure coupling creates false triggers at the conditioning stage.
F2 — Dimmable PSU Stage Architecture (Nodes + TP + Noise Paths) Condition → Map → Inject, with a measurable DIM chain. Inputs 0–10V / 1–10V PWM Triac Input Conditioning RC · clamp · isolation Command Mapping curve · clamp · slope Injection REF · COMP · gate · burst PSU Control Loop Error Amp / REF COMP PWM Modulator Power LED Output (ILED) TP1 DIM_SENSE TP2 DIM_CMD TP3 COMP / injection Isolation boundary (optional) Noise paths dv/dt → cable return shift CM injection
Fix the node model (DIM_SENSE → DIM_CMD → injection) and always probe TP1/TP2/TP3 to separate input integrity issues from loop interaction issues.
Cite this figure: See References · Conceptual system block

References

Add your preferred vendor datasheets / application notes for: 0–10V interface expectations, PWM input thresholds, and triac phase-cut behavior (hold current, minimum load). This page uses conceptual block diagrams to define test points and design boundaries.

H2-3. 0–10V / 1–10V Front-End: impedance, filtering, mapping, protection

A robust 0–10V / 1–10V front-end is an interface contract: the dimming port must remain stable under cable noise, wiring mistakes, and small ESD events—without random brightness jumps or slow recovery.

0–10V vs 1–10V (must be enforced in mapping):

  • 0–10V: 0V may represent “off” or “minimum level”, depending on system policy.
  • 1–10V: true shutoff is typically not allowed; voltages below ~1V should clamp to Min Level (not “off”).
TP: DIM_IN TP: DIM_SENSE TP: DIM_CMD

3.1 Port impedance & default behavior (open cable)

Define input impedance and bias so external controllers can drive the port, while the port remains quiet on long cables. A pull-up/pull-down is not only for “reading a voltage”—it defines what happens when the cable is open or floating.

  • Input impedance: balances noise pickup vs controller drive capability.
  • Bias (pull-up / pull-down): sets the default state under open cable (max / min / hold-last policy).
  • Min clamp: guarantees a stable minimum output when DIM is near 0V (critical for 1–10V).

3.2 Filtering: choose RC by what the cable carries

The RC filter must reject cable-borne noise without making the interface sluggish. Choose the cutoff using measurable inputs: cable noise amplitude/frequency content and required response time (step-to-settle).

  • Noise evidence: observe DIM_IN noise (scope) and note dominant disturbance bands.
  • RC evidence: verify cutoff effect at DIM_SENSE and measure discharge/leakage time constant.
  • Mapping evidence: sweep DIM voltage and confirm DIM_CMD curve + min clamp threshold.

3.3 Protection & survivability (miswire + small ESD)

Protection is designed around real field abuse: accidental over-voltage, reverse connection, and low-energy ESD. After an event, the port must return to the same DIM_CMD mapping without offset drift or “stuck” behavior.

  • Over-voltage clamp: prevents damage if the DIM line is accidentally tied to a higher control voltage.
  • Reverse polarity guard: avoids dragging the reference or injecting fault currents into the control ground.
  • ESD (low energy): port survives without false dimming events or persistent offsets.
  • Optional open/short detect: useful when the system needs diagnostics; otherwise keep it minimal.

Evidence checklist (pass/fail oriented):

  • DIM_IN noise (peak-to-peak) → DIM_SENSE noise (peak-to-peak) shows clear attenuation.
  • Step response: DIM_SENSE settles within the target time constant (no long tail).
  • Mapping: DIM_CMD clamps at Min Level (especially for 1–10V) and does not collapse to “off”.
  • After a clamp/ESD event: DIM_CMD offset returns close to baseline (no persistent drift).
F3 — 0–10V / 1–10V Front-End (Equivalent Blocks + TPs) Port → Protection → RC → Sense → Mapping + Min Clamp → DIM_CMD DIM Port 0–10V / 1–10V TP: DIM_IN Noise pickup (cable / EMI) Protection Clamp · ESD · Reverse RC Filter cutoff + discharge fc bubble + τ bubble TP: DIM_SENSE Sense ADC / Comparator Mapping linear / curve + default state Min Clamp 1–10V: clamp below ~1V Dim-to-off boundary DIM_CMD TP: DIM_CMD Optional Diagnostics open/short detect · stuck line
Equivalent front-end blocks for 0–10V / 1–10V dimming. The test points (DIM_IN, DIM_SENSE, DIM_CMD) make noise rejection, response time, and min clamp behavior measurable.
Cite this figure: See References · Conceptual interface block

H2-4. PWM Dimming Input: frequency window, edge shaping, immunity criteria

A PWM dimming input must remain stable under EMI and cable coupling, while not destabilizing the PSU control behavior. The design is an immunity chain: deglitch → clean logic → timing/averaging → DIM command.

Define the PWM contract (before implementation):

  • Frequency window: supported range and “out-of-range” behavior (ignore / clamp / fallback).
  • Duty resolution: minimum effective pulse width at low dim levels.
  • Edge behavior: excessive edge speed increases EMI and susceptibility to false toggles.
TP: PWM_IN TP: PWM_CLEAN TP: DIM_CMD TP: ILED Ripple

4.1 Edge shaping & deglitch (stop EMI from becoming brightness jitter)

A practical front-end uses a small filter to reject narrow glitches and a Schmitt stage to restore a clean threshold. This prevents coupled noise from turning into false edges.

  • Deglitch filter: suppresses short spikes without destroying duty resolution.
  • Schmitt clean-up: converts slow/noisy edges into deterministic logic transitions.
  • Fault tolerance: define behavior for stuck-high, stuck-low, and open input (default / hold / clamp).

4.2 From PWM to dim command: two paths, two verification metrics

PWM can drive dimming via direct gating or via averaged analog command. The choice is validated by measurable outcomes, not preference.

  • Direct gating: simple but may increase ILED ripple and trigger low-frequency wobble at deep dim levels.
  • Averaged command: smoother command but introduces response delay and requires stable low-duty handling.

Evidence checklist (immunity + interaction):

  • PWM_IN vs PWM_CLEAN: false edges are eliminated (jitter and glitch count reduced).
  • DIM_CMD stability: low-duty operation does not wander or chatter.
  • ILED ripple delta: gating/command path does not cause unacceptable ripple increase.
F4 — PWM Immunity Chain (Noise → Clean → Command → Verify) PWM_IN → Deglitch → Schmitt → Timing/Average → DIM_CMD, then choose gating vs analog command. PWM_IN cable / connector Deglitch RC / spike reject Schmitt clean threshold Timing / Average duty → command TP: PWM_IN TP: PWM_CLEAN Noise injection (EMI / crosstalk) DIM_CMD stable low-duty TP: DIM_CMD Path A: Direct Gating verify ILED ripple delta Path B: Averaged Command smooth command + response time TP: ILED Ripple
PWM immunity is verified at three points (PWM_IN, PWM_CLEAN, DIM_CMD) and closed by an output metric (ILED ripple delta). This separates false-edge problems from loop interaction problems.
Cite this figure: See References · Conceptual immunity chain

References

Add vendor datasheets and application notes for analog dimming inputs (0–10V/1–10V) and PWM dimming threshold requirements. The figures in this section are conceptual block diagrams intended to define measurable test points and interface behavior.

H2-5. Triac Phase-Cut Compatibility: detect → hold → stable dim

“Triac-compatible” is an engineering state machine: detect the cut type, hold conduction under light load, then keep dimming stable without flicker, random jumps, or nuisance trips.

Core behaviors to implement (conceptual, not firmware):

  • Detect: leading-edge vs trailing-edge based on missing voltage interval within each half-cycle.
  • Hold: maintain conduction with a controlled bleeder / hold-current path when the load is too light.
  • Stabilize: filter phase-angle estimates to avoid “jumping” brightness under noisy mains.
  • Recover: handle misfire / restart / trip with predictable fallback (no rapid oscillation).
TP: LINE_V TP: LINE_I TP: ZC TP: BLEEDER_I

5.1 Leading-edge vs trailing-edge: waveform risks that matter

  • Leading-edge: higher dv/dt at turn-on can provoke inrush, false triggering, and audible buzz with capacitive inputs.
  • Trailing-edge: cut near the end of the half-cycle can reduce some inrush behaviors, but still needs robust angle detection and hold control.

5.2 Phase-angle detection model (block-level)

Use zero-cross as a time reference, then measure conduction delay and define a sampling window that avoids switching noise while still capturing the phase-cut “gap” reliably.

5.3 Bleeder / hold current: prevent light-load flicker and random shutoff

Under deep dim or light load, the line current can become discontinuous and the triac may unlatch mid half-cycle. A controlled hold-current path prevents dropout, but must be bounded to avoid excessive loss and buzz.

  • Too little hold current: LINE_I drops to zero mid half-cycle → misfire, brightness steps, or repeat restarts.
  • Too much hold current: unnecessary heat and potential audible artifacts.

Evidence checklist (fast diagnosis):

  • LINE_V: confirm cut type by the missing interval position (front vs end of half-cycle).
  • LINE_I: check for mid half-cycle dropout (hold failure signature).
  • Restart / trip events: correlate with sudden loss of conduction or excessive inrush at turn-on.
  • Hold-current threshold: verify that enabling bleeder reduces dropouts without unacceptable temperature rise.
F5 — Phase-Cut Waveforms + Detection Window + Hold Path Leading-edge vs Trailing-edge · ZC reference · sample window · bleeder hold current Hold Strategy Bleeder / Hold Current Enable Logic deep dim / light load Bleeder Path bounded hold current Verify LINE_I continuity TP: BLEEDER_I Leading-edge cut time ZC Conduction angle Sample window TP: LINE_V TP: LINE_I Risk: inrush / misfire Trailing-edge cut ZC Conduction angle Sample window Risk: dropout / flicker hold current
Phase-cut detection uses a ZC time base and a defined sampling window. Hold-current control is validated by LINE_I continuity under deep dim and light load.
Cite this figure: See References · Conceptual phase-cut model

H2-6. Dimming Injection: control-point choice without breaking stability

Dimming is not a single pin pull. It is a choice of injection point plus a stability check under deep dim constraints (minimum on-time, loop gain shift, burst low-frequency ripple, and audible artifacts).

Three injection classes (choose by constraints, then verify by evidence):

  • Inject at REF: change the target current/voltage reference (command-like behavior).
  • Inject at COMP/EA: influence error amplifier / compensation node (most sensitive to stability).
  • Inject by gating/burst: modulate energy packets (strong deep-dim tool, highest LF ripple risk).
TP: DIM_CMD TP: COMP TP: SW cadence TP: ILED LF ripple

6.1 What fails first in deep dim (and what proves it)

  • Minimum on-time limit: command decreases but output stops tracking → pulse width hits a floor.
  • Loop gain shift: compensation that is stable at high power becomes underdamped at low energy.
  • Burst LF ripple: energy packets create a visible envelope (flicker) if packet rate enters the sensitive band.
  • Audible artifacts: periodic energy packets excite mechanical/acoustic resonances.

Evidence-first measurement plan (no firmware tutorial):

  • COMP waveform: look for saturation, slow wobble, or repeating low-frequency modulation.
  • Switching cadence / packet rate: confirm burst/skip behavior and correlate with LF ripple.
  • ILED ripple: separate high-frequency ripple from low-frequency envelope under deep dim.
  • Audio spectrum (method only): record and identify dominant peaks; compare against packet cadence.

6.2 Injection decision: pick the control point, then lock pass/fail

The selection is validated by measurable outcomes: stable COMP behavior, bounded LF ripple, and predictable dimming steps down to the target minimum.

F6 — Injection Points (REF vs COMP vs Gating) + What to Verify Same PSU block · three injection arrows · risks exposed by COMP, SW cadence, and ILED LF ripple DIM Chain Input Conditioning filter · clamp · isolate (if needed) Mapping + Min Clamp curve · limits · default DIM_CMD TP: DIM_CMD PSU Control Loop (simplified) REF EA / COMP TP: COMP PWM Mod gating / burst Power Stage ILED TP: SW cadence TP: ILED LF ripple Inject @ REF Inject @ COMP Inject @ Gating/Burst Pros: direct target control Risk: gain shift at low power Pros: fine dynamic shaping Risk: stability / COMP wobble Risk: LF ripple / audible
Injection-point choice is validated by evidence: COMP behavior (stability), switching cadence (burst/skip), and ILED low-frequency ripple (flicker risk).
Cite this figure: See References · Conceptual injection map

H2-7. Flicker & Deep Dimming: envelope ripple vs command jitter

Flicker in deep dimming is best treated as a two-class diagnosis. The corrective action depends on whether the visible change is driven by low-frequency energy envelope (phase-cut / gating / burst packets) or by command/loop jitter (DIM command noise coupling into COMP/FB). This chapter focuses on practical, scope-based evidence and avoids a full IEEE 1789 standards walk-through.

Fast discriminator (measurement-first):

  • DIM_CMD steady + ILED shows a periodic low-frequency envelope → energy-envelope flicker.
  • DIM_CMD jitters and COMP/FB jitters in sync → command/loop jitter flicker.
TP: ILED TP: DIM_CMD TP: COMP (or FB) TP: SW cadence

7.1 Flicker class A — low-frequency energy envelope

Phase-cut and packetized power delivery can impose a slow envelope on the output current. Even with a clean dimming command, the delivered energy per unit time can vary at a rate that becomes visible.

  • Signature: ILED waveform exhibits a clear low-frequency envelope (periodic “breathing”).
  • Correlation: envelope rate often correlates with mains half-cycle behavior or burst/skip packet cadence.
  • Primary proof: DIM_CMD is stable while ILED envelope remains present.

7.2 Flicker class B — command/loop jitter

If noise, crosstalk, or marginal stability injects jitter into the dimming command path or control loop, ILED can flicker in a more random or step-like manner.

  • Signature: DIM_CMD shows jitter/steps; COMP (or FB) shows synchronous modulation.
  • Correlation: ILED changes track DIM_CMD changes rather than forming a clean periodic envelope.
  • Primary proof: COMP waveform “wobbles” or saturates during deep dim transitions.

7.3 Deep dimming guardrails (page-relevant only)

  • Minimum dim clamp: avoid operating zones where minimum on-time / minimum energy packet dominates and forces visible steps.
  • Packet cadence control (concept): if burst/skip is required, keep packet cadence away from visibly sensitive bands and verify by ILED envelope.
  • Loop hygiene: maintain a clean COMP/FB path and stable injection behavior under low energy conditions.

Evidence checklist (what to capture):

  • ILED: high-frequency ripple + low-frequency envelope (separate them by time scale).
  • DIM_CMD: look for jitter, steps, or noise bursts at deep dim.
  • COMP/FB: confirm whether COMP/FB modulation is driving ILED variation.
  • SW cadence: confirm burst/skip packet timing and correlate with the envelope.
F7 — Flicker Discriminator: Envelope Ripple vs Command Jitter Use evidence: ILED envelope + DIM_CMD stability + COMP correlation Class A: Energy Envelope DIM_CMD steady · ILED has LF envelope Class B: Command/Loop Jitter DIM_CMD jitters · COMP/FB modulates ILED waveform HF ripple + LF envelope DIM_CMD steady ILED waveform tracks jitter/steps DIM_CMD jitter / steps Check: COMP/FB modulation correlates with DIM_CMD jitter TP: ILED TP: DIM_CMD TP: COMP/FB
Use a two-class discriminator: (A) periodic LF envelope on ILED with stable DIM_CMD vs (B) DIM_CMD jitter with correlated COMP/FB modulation.
Cite this figure: See References · Conceptual waveform evidence model

H2-8. Anti-Crosstalk: why dimming lines get polluted and how to cut the path

Crosstalk must be treated as three physical coupling paths. Each path has a distinct signature and a distinct “cut point”. The goal is a dimming input that remains stable under switching dv/dt, load transients, and long-cable common-mode pickup.

Three coupling paths (mechanism → signature → cut point):

  • Capacitive coupling: SW node dv/dt injects spikes into DIM line → cut by layout separation + input conditioning.
  • Ground impedance: shared return shifts DIM reference → cut by single-point reference + controlled return routing.
  • Common-mode pickup: long cable behaves like an antenna → cut by cable strategy + CM hardening / isolation principles.
TP: DIM_IN noise TP: SW timing TP: DIM_GND − PWR_GND Method: touch/route test

8.1 Path A — capacitive coupling from SW dv/dt

  • Evidence: DIM_IN spikes are time-aligned with switching edges (strong synchrony with SW timing).
  • Cut points (principle): reduce coupling area, increase separation from the hot loop, and harden the input (RC + edge conditioning where applicable).

8.2 Path B — ground impedance and reference shift

  • Evidence: dimming reference drifts with load current; DIM command shifts during power transients.
  • Cut points (principle): single-point reference, controlled return path, and avoid sharing high di/dt ground with DIM reference.

8.3 Path C — common-mode injection on long cables

  • Evidence: DIM_IN noise changes by touching the cable, moving it near mains wiring, or changing its routing.
  • Cut points (principle): shielding/twisting, impedance control at the port, and isolation when boundary conditions demand it.

Verification (simple, repeatable):

  • Synchrony check: DIM_IN noise vs SW timing (is the noise switching-synchronous?).
  • Reference check: measure DIM_GND − PWR_GND during load changes (is the reference moving?).
  • Cable sensitivity check: touch/route test; note amplitude change and whether DIM_CMD stability improves with hardening.
F8 — Crosstalk Paths + Cut Points (Capacitive / Ground / Common-Mode) Draw the path, prove it by TP correlation, then cut it at the right boundary DIM Front-End DIM_IN high-impedance risk RC / Edge Hardening cut point DIM_CMD TP: DIM_IN noise Power Switching SW node dv/dt source TP: SW timing Capacitive coupling CUT Return / Reference PWR_GND (high di/dt) DIM_GND (reference) Single-point cut point Ground impedance → ΔVref TP: DIM_GND − PWR_GND External Cable Long cable common-mode pickup CM injection Shield/Twist Isolation CUT
Prove which coupling path dominates by correlation (DIM_IN vs SW timing), reference delta (DIM_GND − PWR_GND), and cable sensitivity. Then apply the matching cut point (input hardening, single-point reference, cable strategy/isolation principles).
Cite this figure: See References · Conceptual coupling-path model

H2-9. EMI Pre-Compliance: why Triac + PWM is harder and what to check first

Triac phase-cut adds large, time-localized conduction edges (sharp transitions within each half-cycle), while PWM dimming adds fast control-line edges. Combined with the PSU’s own switching dv/dt, the system often shows both conducted noise on L/N and radiated hotspots on cables/fixture. Pre-compliance here means relative deltas and correlation—identify which source and which path dominates before the final lab run.

Minimum toolchain (fast, practical):

  • Conducted preview: LISN + spectrum/receiver (relative delta only).
  • Radiated preview: near-field probe to find hotspots (board + cable exit + fixture).
  • Time correlation: scope alignment to ZC / phase-cut edge to catch “only-during-cut” spikes.
TP: LISN (L/N) TP: Near-field hotspot TP: Phase edge window Compare: before vs after

9.1 Noise sources that dominate in dimming modes

  • Triac conduction transient: the phase-cut edge produces wideband spikes concentrated in a short time window within each half-cycle.
  • PSU switching dv/dt: the switching node and hot loop act as a persistent broadband source (strong CM/radiated sensitivity).
  • PWM edge injection: fast dimming edges can turn the dim line into a coupling antenna and can also stress internal edge conditioning.

9.2 Coupling paths: conducted vs radiated

  • Conducted (L/N): noise reaches the mains through the input path and shows up at the LISN measurement port.
  • Radiated (cable/fixture): common-mode current on the cable/fixture creates strong near-field hotspots and radiated issues.
  • Time-localized bursts: phase-cut edges often create spikes only during specific segments of the half-cycle—easy to miss without time correlation.

9.3 A repeatable pre-check workflow (relative deltas)

  • Step 1 — lock the operating point: test at three brightness points (100% / mid / deep dim), and in both “Triac active” and “Triac bypass” modes.
  • Step 2 — LISN scan (delta-based): capture a baseline spectrum, then apply one change at a time and record Δ (not absolute pass/fail).
  • Step 3 — near-field scan: locate hotspots at (a) hot loop region, (b) input filter area, (c) cable exit/connector, (d) fixture chassis points.
  • Step 4 — time correlation: align a scope view to ZC/phase edge and confirm whether the largest spikes occur at the phase-cut transition.
  • Step 5 — pick the fix by path: reduce hot-loop emission, harden edges, and suppress common-mode where the coupling is strongest.

9.4 “Top 3” changes to try first (no part list)

  • Shrink the hot loop: minimize loop area and coupling surface around the switching dv/dt region. Expect near-field hotspot reduction.
  • Control edges: reduce unnecessary dv/dt and PWM edge aggressiveness where it feeds coupling paths. Expect wideband floor reduction.
  • Suppress common-mode: focus on cable/fixture exits and return paths. Expect cable/fixture hotspot reduction and improved radiated behavior.

Evidence to save (pre-compliance log):

  • LISN: baseline + Δ after each single change (same brightness point).
  • Near-field: hotspot location + amplitude change after the fix.
  • Phase window: spikes aligned to phase-cut edge / ZC region (time-tagged).
F9 — EMI Path Map (Pre-Compliance): Sources → Coupling → External Paths Measure deltas: LISN (conducted) + near-field (hotspots) + phase-edge correlation Noise Sources Triac phase edge wideband spikes Switching dv/dt hot loop region PWM edge control-line coupling Coupling / Paths Conducted path to L / N (LISN delta) Radiated path CM current on cable / fixture near-field hotspot scan What to Measure L / N → LISN relative spectrum Δ TP: LISN port Near-field scan hot loop / cable exit TP: hotspot location Phase-edge window spikes vs ZC/edge Priority Fixes (try in this order) 1) Shrink hot loop 2) Control edges 3) Suppress common-mode
Use deltas and correlation: identify whether phase-edge spikes, switching dv/dt, or PWM edge injection dominates—and whether the issue is conducted (L/N) or radiated (cable/fixture).
Cite this figure: See References · Conceptual EMI path + pre-check workflow

H2-10. Fault Handling & Miswire: predictable behavior under abnormal dim inputs

A dimmable PSU must remain predictable when the dim input is abnormal: no rapid brightness jumping, no oscillating restarts, and no “random” recovery behavior. The strategy is a unified input validity model and a small state machine with lockout, hold-last-good, controlled retry, and a safe dim level.

Four policy parameters (make them explicit):

  • T_lock: minimum time to hold after entering Invalid (stability first).
  • T_retry: retry interval (prevents rapid toggling).
  • T_ramp: ramp time when returning to normal (prevents visible jumps).
  • Safe level: defined fallback brightness (or hold last-known-good).
Evidence: TH_xxx Evidence: T_lock Evidence: T_retry Evidence: T_ramp Evidence: Counters

10.1 0–10V / 1–10V abnormal conditions

  • Open / floating: treat as Invalid if the input becomes unstable (noise-driven). Recommended action: Hold last-known-good, then retry after T_lock.
  • Short to GND: enters a deterministic low command. Recommended action: apply a controlled ramp to Safe level (no “snap to off”).
  • Overvoltage: clamp/limit at the port (if available), then go Invalid → Hold → Retry. Do not “hunt” between states.
  • Reverse / miswire (if supported by front-end): immediate Invalid with lockout; recovery only after the input returns to a valid range for a stability window.

10.2 PWM dim input abnormal conditions

  • Stuck-high / stuck-low: treat as a static command; apply slew-limited brightness changes to avoid visible jumps.
  • Floating input: if deglitching/edge conditioning detects unstable edges, mark Invalid and Hold last-known-good.
  • Jitter beyond threshold: use a jitter counter and a time window; when exceeded, enter Invalid to avoid random flicker.
  • Out-of-window frequency: ignore or mark Invalid depending on the system policy; avoid interpreting noise as valid PWM.

10.3 Triac-related abnormal conditions

  • Dropout / “trip-like” behavior: loss of expected phase-cut behavior should enter Hold, then Retry; avoid repeated fast restarts.
  • Conduction angle jumps: apply command slew limiting; large step changes should not produce instantaneous brightness steps.
  • Minimum load not met: misfires and discontinuous conduction should increment a misfire counter; enter a safe deterministic mode rather than flickering.

10.4 Evidence fields (what to measure or log)

  • Thresholds: TH_OV (0–10V overvoltage), TH_float (floating detection), TH_jitter (PWM jitter), TH_angle_jump (Triac angle rate), TH_misfire.
  • Timers: T_lock, T_retry, T_ramp_up, T_ramp_down.
  • Counters: Cnt_invalid, Cnt_miswire, Cnt_misfire, Cnt_retry, Cnt_restart (if available).

Design goal check:

  • Predictability: the same fault must lead to the same visible behavior every time.
  • Stability: entering Invalid must stop flicker/jumps immediately (Hold or Safe).
  • Recovery: returning to Normal must use a ramp and a stability window (no snapping).
F10 — Dimming Input State Machine (Predictable Fault Handling) Normal → Invalid → Hold → Retry → (Normal or Safe). Use T_lock, T_retry, T_ramp, counters. Normal Input valid & stable Invalid TH exceeded / floating misfire / dropout Hold Keep last-known-good Lockout for T_lock Retry Re-check after T_retry Increment Cnt_retry Safe dim level Deterministic fallback Apply T_ramp TH exceeded stabilize now T_lock done input stable window return with T_ramp Cnt_retry limit periodic retry Evidence fields TH_xxx thresholds T_lock T_retry T_ramp Counters
Use a small deterministic state machine to prevent flicker/jumps during invalid dim inputs. Make thresholds, timers, and counters explicit so field behavior is repeatable and debuggable.
Cite this figure: See References · Conceptual fault-handling state model

H2-9. EMI Pre-Compliance: why Triac + PWM is harder and what to check first

Triac phase-cut adds large, time-localized conduction edges (sharp transitions within each half-cycle), while PWM dimming adds fast control-line edges. Combined with the PSU’s own switching dv/dt, the system often shows both conducted noise on L/N and radiated hotspots on cables/fixture. Pre-compliance here means relative deltas and correlation—identify which source and which path dominates before the final lab run.

Minimum toolchain (fast, practical):

  • Conducted preview: LISN + spectrum/receiver (relative delta only).
  • Radiated preview: near-field probe to find hotspots (board + cable exit + fixture).
  • Time correlation: scope alignment to ZC / phase-cut edge to catch “only-during-cut” spikes.
TP: LISN (L/N) TP: Near-field hotspot TP: Phase edge window Compare: before vs after

9.1 Noise sources that dominate in dimming modes

  • Triac conduction transient: the phase-cut edge produces wideband spikes concentrated in a short time window within each half-cycle.
  • PSU switching dv/dt: the switching node and hot loop act as a persistent broadband source (strong CM/radiated sensitivity).
  • PWM edge injection: fast dimming edges can turn the dim line into a coupling antenna and can also stress internal edge conditioning.

9.2 Coupling paths: conducted vs radiated

  • Conducted (L/N): noise reaches the mains through the input path and shows up at the LISN measurement port.
  • Radiated (cable/fixture): common-mode current on the cable/fixture creates strong near-field hotspots and radiated issues.
  • Time-localized bursts: phase-cut edges often create spikes only during specific segments of the half-cycle—easy to miss without time correlation.

9.3 A repeatable pre-check workflow (relative deltas)

  • Step 1 — lock the operating point: test at three brightness points (100% / mid / deep dim), and in both “Triac active” and “Triac bypass” modes.
  • Step 2 — LISN scan (delta-based): capture a baseline spectrum, then apply one change at a time and record Δ (not absolute pass/fail).
  • Step 3 — near-field scan: locate hotspots at (a) hot loop region, (b) input filter area, (c) cable exit/connector, (d) fixture chassis points.
  • Step 4 — time correlation: align a scope view to ZC/phase edge and confirm whether the largest spikes occur at the phase-cut transition.
  • Step 5 — pick the fix by path: reduce hot-loop emission, harden edges, and suppress common-mode where the coupling is strongest.

9.4 “Top 3” changes to try first (no part list)

  • Shrink the hot loop: minimize loop area and coupling surface around the switching dv/dt region. Expect near-field hotspot reduction.
  • Control edges: reduce unnecessary dv/dt and PWM edge aggressiveness where it feeds coupling paths. Expect wideband floor reduction.
  • Suppress common-mode: focus on cable/fixture exits and return paths. Expect cable/fixture hotspot reduction and improved radiated behavior.

Evidence to save (pre-compliance log):

  • LISN: baseline + Δ after each single change (same brightness point).
  • Near-field: hotspot location + amplitude change after the fix.
  • Phase window: spikes aligned to phase-cut edge / ZC region (time-tagged).
F9 — EMI Path Map (Pre-Compliance): Sources → Coupling → External Paths Measure deltas: LISN (conducted) + near-field (hotspots) + phase-edge correlation Noise Sources Triac phase edge wideband spikes Switching dv/dt hot loop region PWM edge control-line coupling Coupling / Paths Conducted path to L / N (LISN delta) Radiated path CM current on cable / fixture near-field hotspot scan What to Measure L / N → LISN relative spectrum Δ TP: LISN port Near-field scan hot loop / cable exit TP: hotspot location Phase-edge window spikes vs ZC/edge Priority Fixes (try in this order) 1) Shrink hot loop 2) Control edges 3) Suppress common-mode
Use deltas and correlation: identify whether phase-edge spikes, switching dv/dt, or PWM edge injection dominates—and whether the issue is conducted (L/N) or radiated (cable/fixture).
Cite this figure: See References · Conceptual EMI path + pre-check workflow

H2-10. Fault Handling & Miswire: predictable behavior under abnormal dim inputs

A dimmable PSU must remain predictable when the dim input is abnormal: no rapid brightness jumping, no oscillating restarts, and no “random” recovery behavior. The strategy is a unified input validity model and a small state machine with lockout, hold-last-good, controlled retry, and a safe dim level.

Four policy parameters (make them explicit):

  • T_lock: minimum time to hold after entering Invalid (stability first).
  • T_retry: retry interval (prevents rapid toggling).
  • T_ramp: ramp time when returning to normal (prevents visible jumps).
  • Safe level: defined fallback brightness (or hold last-known-good).
Evidence: TH_xxx Evidence: T_lock Evidence: T_retry Evidence: T_ramp Evidence: Counters

10.1 0–10V / 1–10V abnormal conditions

  • Open / floating: treat as Invalid if the input becomes unstable (noise-driven). Recommended action: Hold last-known-good, then retry after T_lock.
  • Short to GND: enters a deterministic low command. Recommended action: apply a controlled ramp to Safe level (no “snap to off”).
  • Overvoltage: clamp/limit at the port (if available), then go Invalid → Hold → Retry. Do not “hunt” between states.
  • Reverse / miswire (if supported by front-end): immediate Invalid with lockout; recovery only after the input returns to a valid range for a stability window.

10.2 PWM dim input abnormal conditions

  • Stuck-high / stuck-low: treat as a static command; apply slew-limited brightness changes to avoid visible jumps.
  • Floating input: if deglitching/edge conditioning detects unstable edges, mark Invalid and Hold last-known-good.
  • Jitter beyond threshold: use a jitter counter and a time window; when exceeded, enter Invalid to avoid random flicker.
  • Out-of-window frequency: ignore or mark Invalid depending on the system policy; avoid interpreting noise as valid PWM.

10.3 Triac-related abnormal conditions

  • Dropout / “trip-like” behavior: loss of expected phase-cut behavior should enter Hold, then Retry; avoid repeated fast restarts.
  • Conduction angle jumps: apply command slew limiting; large step changes should not produce instantaneous brightness steps.
  • Minimum load not met: misfires and discontinuous conduction should increment a misfire counter; enter a safe deterministic mode rather than flickering.

10.4 Evidence fields (what to measure or log)

  • Thresholds: TH_OV (0–10V overvoltage), TH_float (floating detection), TH_jitter (PWM jitter), TH_angle_jump (Triac angle rate), TH_misfire.
  • Timers: T_lock, T_retry, T_ramp_up, T_ramp_down.
  • Counters: Cnt_invalid, Cnt_miswire, Cnt_misfire, Cnt_retry, Cnt_restart (if available).

Design goal check:

  • Predictability: the same fault must lead to the same visible behavior every time.
  • Stability: entering Invalid must stop flicker/jumps immediately (Hold or Safe).
  • Recovery: returning to Normal must use a ramp and a stability window (no snapping).
F10 — Dimming Input State Machine (Predictable Fault Handling) Normal → Invalid → Hold → Retry → (Normal or Safe). Use T_lock, T_retry, T_ramp, counters. Normal Input valid & stable Invalid TH exceeded / floating misfire / dropout Hold Keep last-known-good Lockout for T_lock Retry Re-check after T_retry Increment Cnt_retry Safe dim level Deterministic fallback Apply T_ramp TH exceeded stabilize now T_lock done input stable window return with T_ramp Cnt_retry limit periodic retry Evidence fields TH_xxx thresholds T_lock T_retry T_ramp Counters
Use a small deterministic state machine to prevent flicker/jumps during invalid dim inputs. Make thresholds, timers, and counters explicit so field behavior is repeatable and debuggable.
Cite this figure: See References · Conceptual fault-handling state model

H2-11. Validation & Field Debug Playbook: symptom → evidence → isolate → first fix

This chapter is a repeatable “shortest path” debug SOP. Each symptom forces a minimal evidence loop: First 2 measurements → Discriminator (A vs B) → First fix (1–2 actions) → Verify (what must change). Keep captures and thresholds consistent to make behavior predictable and debuggable.

Standard test points (use these names in screenshots/logs):

TP: DIM_IN TP: PWM_IN TP: DIM_CMD TP: COMP TP: ILED_ENV TP: LINE_V (phase-cut) TP: LISN_Δ TP: NFP (hotspot)

Example reference parts (MPNs, pick per rating/approval): these are common building blocks for dim I/O hardening, isolation, protection, and debug-friendly conditioning. Validate electrical ratings, creepage/clearance, and regulatory approvals.

  • ESD/TVS for dim lines: Nexperia PESD1CAN, Littelfuse SMF12A
  • Schmitt / edge conditioning: TI SN74LVC1G17 (Schmitt buffer), TI SN74HC14 (Schmitt inverter)
  • Comparator / op-amp blocks: TI TLV3201 (comparator), TI TLV9001 (op-amp), Microchip MCP6001 (op-amp)
  • ADC for 0–10V mapping (examples): TI ADS1115
  • Isolation building blocks: Vishay VO615A (opto), Sharp/compatible PC817 (opto), Analog Devices ADuM110N (digital isolator)
  • Triac / ZC sensing (conceptual front-end): onsemi H11AA1 (AC-input opto), bridge rectifier MB6S
  • Noise suppression (local): Murata BLM21PG221SN1D (ferrite bead, signal rail/line)
  • Small MOSFET for controlled bleeder/hold-current switch (examples): AOS AO3400A, BSS138

Symptom S1 — “Triac mode: intermittent flicker / occasional trip”

First 2 measurements: (1) LINE_V (phase-cut edge / notch timing) (2) ILED_ENV (low-frequency envelope).

Discriminator: If spikes/flicker align to the phase-cut edge window → hold-current / misfire domain. If COMP shows large excursions correlated to dim events → injection / stability domain.

First fix: Apply slew-limited dim command + soft ramp (no snap). If misfire-like, add/enable controlled bleeder/hold-current behavior (deterministic, not hunting).

Example MPNs: H11AA1 + MB6S (phase/ZC sensing concept), AO3400A or BSS138 (bleeder switch), TLV3201 (edge window/comparator), SMF12A (transient protection where applicable).

Verify: Misfire/trip counter drops; ILED envelope no longer shows large steps at the phase edge; dim transitions remain smooth.

Symptom S2 — “0–10V / 1–10V: non-linear dim curve, worse jitter when darker”

First 2 measurements: (1) DIM_IN (noise level at low volts) (2) DIM_CMD or COMP (command stability).

Discriminator: If DIM_IN noise dominates at low level and DIM_CMD/COMP follows → input conditioning/reference issue. If DIM_IN is clean but ILED_ENV oscillates → low-end energy / cadence issue.

First fix: Tune RC corner + enforce a low-end clamp (1–10V must not interpret <1V as “off”). Add ramp on command changes.

Example MPNs: TLV9001 or MCP6001 (buffer/filter stage), ADS1115 (ADC mapping), PESD1CAN (ESD), TLV3201 (window/threshold detection).

Verify: DIM_CMD becomes monotonic and stable; COMP no longer chatters; deep-dim no longer jitters.

Symptom S3 — “PWM dimming: brightness jumps / false triggers”

First 2 measurements: (1) PWM_IN (glitches, edge ringing) (2) DIM_CMD (unexpected pulses / timing errors).

Discriminator: If PWM_IN contains short glitches that appear in DIM_CMD → input deglitch/edge conditioning gap. If PWM_IN is clean but ILED_ENV shows large low-frequency packets → gating cadence is the issue.

First fix: Add Schmitt + deglitch (minimum pulse width policy), then apply slew-limited command (avoid snap).

Example MPNs: SN74LVC1G17 or SN74HC14 (Schmitt), PESD1CAN (ESD), TLV3201 (pulse validation), ADuM110N (if isolation required for PWM).

Verify: False-trigger counter drops; DIM_CMD no longer shows narrow spurs; brightness transitions become consistent.

Symptom S4 — “Deep dimming: audible noise appears”

First 2 measurements: (1) ILED_ENV (packet/envelope frequency) (2) COMP (large excursions vs stable).

Discriminator: If a strong low-frequency envelope emerges whose rate tracks brightness → cadence/burst domain. If COMP becomes unstable → injection/stability domain.

First fix: Increase/adjust low-end clamp + enforce ramp; avoid operating in the most audible cadence zone (policy-level). If injection-related, change injection method (REF vs COMP vs gating) to keep stability.

Example MPNs: TLV9001 (command shaping), TLV3201 (mode windowing), BLM21PG221SN1D (local noise suppression on signal rails).

Verify: Envelope peak-to-peak decreases or shifts out of the sensitive band; audible noise reduces without flicker regression.

Symptom S5 — “Touching/approaching the dim wire changes brightness”

First 2 measurements: (1) DIM_IN (touch vs no-touch delta) (2) correlation to switching (use COMP disturbance timing or SW-related proxy).

Discriminator: If DIM_IN disturbance is strongly switching-correlated → capacitive coupling from dv/dt. If it is broadband/antenna-like and sensitive to cable routing → common-mode pickup domain.

First fix: Harden DIM port with RC + defined bias, keep a single reference point, and apply isolation when the cable environment is hostile.

Example MPNs: PESD1CAN (ESD), TLV9001/MCP6001 (buffer/bias), VO615A or PC817 (isolation concept), BLM21PG221SN1D (local suppression).

Verify: Touch sensitivity drops substantially; DIM_IN noise floor and command variability reduce.

Symptom S6 — “EMI pre-check fails only in one dimming mode”

First 2 measurements: (1) LISN_Δ (mode A vs B delta) (2) NFP (hotspot position and delta).

Discriminator: If LISN_Δ dominates and hotspots sit near input path → conducted domain. If hotspots sit at cable exit/fixture and vary with cable geometry → radiated/common-mode domain.

First fix: For conducted: prioritize loop area + edge control. For radiated: prioritize common-mode suppression + cable/exit path control (policy-level).

Example MPNs: BLM21PG221SN1D (bead for local noise line), SN74LVC1G17 (edge conditioning for PWM-related cases), SMF12A (transient robustness where relevant).

Verify: The “only-this-mode” peak reduces; hotspot amplitude drops at the dominant location.

Symptom S7 — “After power cycling, brightness state is wrong”

First 2 measurements: (1) DIM_IN or PWM_IN during the first 200–500 ms after power-up (floating/stability) (2) DIM_CMD trajectory (step vs ramp).

Discriminator: If input floats early and DIM_CMD reacts → validity window missing. If input is stable but DIM_CMD snaps → ramp/restore policy missing.

First fix: Apply validity window (Hold or Safe level), then ramp to target with T_ramp. Keep policy deterministic (T_lock / T_retry in fault cases).

Example MPNs: SN74HC14 (stable digital edge behavior), TLV3201 (threshold windowing), TLV9001 (command shaping).

Verify: Startup brightness is repeatable; no instantaneous jumps; event counters show reduced invalid transitions.

Symptom S8 — “Multiple drivers in parallel interfere (crosstalk)”

First 2 measurements: (1) DIM_IN delta when other drivers switch/load-change (2) DIM reference shift (use a ground-reference proxy or observe DIM_IN offset under load changes).

Discriminator: If DIM_IN offset tracks load changes → shared reference/return impedance domain. If DIM_IN spikes correlate to switching → coupling domain.

First fix: Enforce single-point reference and isolate where required; harden input with RC + defined bias.

Example MPNs: VO615A or PC817 (isolation concept), PESD1CAN (port protection), TLV9001 (buffer/reference), BLM21PG221SN1D (local suppression).

Verify: DIM_IN remains stable with other channels active; parallel interaction reduces; dim tracking improves.

F11 — Field Debug Decision Tree (Shortest Path SOP) Symptom → first 2 TPs → discriminator (A vs B) → first fix → verify with deltas/counters Symptoms First 2 measurements Discriminator First fix S1 Triac flicker/trip S2 0–10V non-linear/jitter S3 PWM jumps/mis-trigger S4 deep-dim audible noise S5 touch-sensitive dim wire S6 EMI fail in one mode S7 wrong level after power-up S8 parallel drivers crosstalk TP: LINE_V + ILED_ENV phase edge timing + envelope TP: DIM_IN + DIM_CMD/COMP noise vs command stability TP: PWM_IN + DIM_CMD glitch → command spur TP: ILED_ENV + COMP cadence vs stability TP: DIM_IN + correlation touch delta + sync check TP: LISN_Δ + NFP hotspot conducted vs radiated TP: input@startup + DIM_CMD floating window vs ramp TP: DIM_IN + offset delta shared return vs coupling Phase-edge spikes? Input noise drives CMD? Glitch → spur mapping? Cadence vs stability? CM pickup or dv/dt? Conducted or radiated? Floating window? Return shift? Bleeder + ramp policy no hunting RC + low-end clamp stabilize CMD Schmitt + deglitch min pulse policy Clamp + cadence avoid reduce envelope Bias + isolation boundary cut coupling Edge/loop/CM focus by dominant path Validity window + ramp repeatable startup Single-point ref + RC reduce interaction Evidence fields: TH_xxx • T_lock • T_retry • T_ramp • Cnt_invalid • Cnt_misfire • LISN_Δ • NFP hotspot Δ
Use the same two TPs per symptom to keep the path short. Every fix must be verified by a delta (waveform stability, envelope reduction, LISN/near-field delta, or counter drop).
Cite this figure: See References · Decision-tree SOP for dim stage debug

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H2-12. FAQs — Dimmable PSU Stage (Evidence-Based)

Each answer stays inside this page’s scope and closes with measurable evidence fields (TPs, deltas, counters, timers). Example MPNs are reference building blocks only—final selection must match ratings, isolation requirements, and approvals.

Q10–10V becomes jumpy on long cables—ground return shift or cable acting as an antenna?

Decide whether the reference is moving or the cable is picking up common-mode noise. Measure (1) DIM_IN noise and (2) DIM_GND–PWR_GND (or DIM_IN offset vs load). If offset tracks load, fix return/single-point reference. If touch/routing changes it, harden the port with RC+bias, ESD TVS (PESD1CAN), and consider isolation (VO615A / ADuM110N).

Evidence: DIM_IN_RMS, GND_SHIFT, Touch_Delta, SW_Corr
Q2Why can’t 1–10V truly turn off, and how to do minimum brightness without flicker?

Many 1–10V interfaces treat <1V as “minimum” rather than “off,” so deep-dim must be stabilized, not forced to zero. Measure (1) DIM_IN noise at low volts and (2) ILED_ENV ripple/envelope. If flicker rises only at the low end, add a low-end clamp plus ramp (T_RAMP). For mapping, a stable ADC path (ADS1115) and a clean buffer (TLV9001) reduce low-level twitch.

Evidence: DIM_IN_RMS@low, ILED_ENV_PKPK, T_RAMP
Q3PWM dimming mis-triggers intermittently—what two waveforms are most effective first?

Start with the shortest mapping check: measure (1) PWM_IN (glitches/ringing) and (2) DIM_CMD (or COMP). If narrow glitches on PWM_IN appear as command spurs, add Schmitt + deglitch (SN74LVC1G17 / SN74HC14) and ESD hardening (PESD1CAN). If PWM_IN is clean but ILED_ENV forms low-frequency packets, the issue is gating cadence; apply command slew limiting and a stable injection policy.

Evidence: PWM_GLITCH_CNT, CMD_SPUR_CNT, ILED_ENV_PKPK
Q4Is higher PWM frequency always better? How to balance EMI vs resolution?

Higher PWM can reduce visible artifacts, but EMI often worsens when fast edges drive long wiring. Measure (1) LISN_Δ peak changes across PWM frequency/edge settings and (2) PWM edge slew/ringing. If LISN rises with faster edges, prioritize edge conditioning (SN74LVC1G17) and local noise containment (BLM21PG221SN1D). If LISN barely changes but hotspots move with cable geometry, focus on coupling path control and reference strategy.

Evidence: LISN_DELTA_PEAK, Edge_Slew, NFP_HOTSPOT_LOC
Q5Leading-edge Triac trips—insufficient hold current or excessive turn-on transient?

Split “trip” into hold-current failure vs edge transient. Measure (1) LINE_V at the conduction edge (spike/notch) and (2) LINE_I continuity (hold current margin). If current becomes discontinuous, use a controlled bleeder/hold-current path (AO3400A / BSS138). If LINE_V shows sharp spikes aligned to dim events, slow the dim command (T_RAMP) and validate detection/edge windowing (H11AA1 + TLV3201 as examples).

Evidence: LINE_EDGE_SPIKE, HOLD_I_MIN, T_RAMP, CNT_MISFIRE
Q6Is trailing-edge always more stable? Why can it still flicker?

Trailing-edge can be friendlier for some loads, but flicker still happens if the sampling window or energy packets become unstable at low dim levels. Measure (1) LINE_V notch timing vs flicker and (2) ILED_ENV envelope correlation to half-cycles. If flicker is half-cycle correlated, it is energy-packet dominated; enforce a low-end clamp and ramp. If COMP becomes noisy without half-cycle correlation, treat it as injection/stability and re-balance the injection method.

Evidence: Phase_Window_Corr, ILED_ENV_PKPK, COMP_PKPK
Q7Flicker starts at 1%—minimum on-time limit or burst low-frequency envelope?

Use envelope evidence to separate “controllability limit” from “cadence flicker.” Measure (1) ILED_ENV (ENV_FREQ + pk-pk) and (2) a switching-cadence proxy (burst grouping in time). A strong low-frequency envelope that tracks dim level indicates burst cadence; raise the low-end clamp and avoid the most sensitive cadence zone. If behavior snaps at a threshold without a clear envelope, it is minimum controllable energy; adjust injection scaling and apply a deterministic ramp/limit policy.

Evidence: ILED_ENV_PKPK, ENV_FREQ, Burst_Cadence, TH_xxx
Q8“Buzzing” during dimming—magnetics/piezo or control method? How to prove it?

Prove whether acoustics are driven by electrical cadence or by instability. Measure (1) ILED_ENV and (2) COMP. If the audible tone aligns with ENV_FREQ (or its harmonics), the control cadence is exciting mechanical resonance; reduce envelope amplitude with clamp+ramp and smoother injection. If COMP shows large, irregular swings paired with flicker, it is a stability/injection issue; fix the injection point and harden dim input coupling. Reference parts: TLV9001 (shaping), TLV3201 (window), BLM21 bead (local suppression).

Evidence: ENV_FREQ, ILED_ENV_PKPK, COMP_PKPK
Q90–10V curve is non-linear—check mapping first or input RC time constant first?

Use a step response to avoid guessing. Measure (1) DIM_IN → DIM_CMD step response (settling time) and (2) static DIM_CMD → brightness points. If DIM_CMD lags/drag-tails, RC/bias dominates—fix the time constant before shaping the curve. If response is fast but brightness spacing is uneven, mapping/clamp/injection scaling dominates—fix the mapping table or slope. Reference parts: ADS1115 (mapping), TLV9001 (buffer), TLV3201 (threshold windows).

Evidence: Tau_RC, Response_Time, Curve_Error
Q10Drivers interfere when installed close—common-mode coupling or ground loop?

Decide with correlation. Measure (1) DIM_IN offset while neighboring drivers change load and (2) DIM_IN spikes correlation to switching events. If DIM_IN offset follows load, it is ground/return impedance; enforce single-point reference and defined bias. If spikes track switching, it is coupling; harden the port (RC + TVS) and consider isolation for long/hostile wiring (VO615A / ADuM110N). Use PESD1CAN for ESD robustness on dim lines.

Evidence: GND_SHIFT_Corr, SW_Corr, DIM_IN_RMS
Q11EMI fails only in Triac mode—what noise path should be attacked first?

Start with a quick conducted-vs-radiated split. Measure (1) LISN_Δ comparing Triac vs non-Triac and (2) near-field hotspot location delta. If LISN peaks and input-side hotspots dominate, the Triac edge transient path is primary—reduce edge stress via ramp/hold-current determinism. If hotspots sit at cable exits and move with wiring, common-mode coupling dominates—prioritize coupling-path control and reference strategy. Helpful blocks: BLM21PG221SN1D (local), SN74LVC1G17 (edge conditioning when PWM is involved).

Evidence: LISN_DELTA_PEAK, NFP_HOTSPOT_LOC, LINE_EDGE_SPIKE
Q12When the dim input is invalid (open/short), what default brightness is the most reasonable?

The default must be predictable and recoverable, not “hunting.” Measure (1) input validity counters/thresholds and (2) the restore trajectory (DIM_CMD ramp). If the input is floating, use a validity window (Hold) and fall back to a fixed safe level (product-defined), then ramp with T_RAMP. If the input is clearly short/overvoltage, lock for T_LOCK and retry with T_RETRY. Reference blocks: TLV3201 (threshold/window), SN74HC14 (stable digital input), PESD1CAN (ESD/abuse).

Evidence: CNT_INVALID, TH_xxx, T_LOCK, T_RETRY, T_RAMP

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