H2-1. Definition & Boundary: What a Backlight Driver Must Guarantee

The engineering contract (3 non-negotiables)

What “uniformity” really means in hardware terms

• Current match: each sink channel regulates current tightly so strings do not drift apart under the same command.
• Headroom balance: the LED+ rail must leave enough voltage margin for the worst-case string, without wasting excessive drop on others.
• Dimming integrity: PWM edges and deep-dim regions must not create visible banding (current overshoot/undershoot becomes brightness artifacts).

Boundary lock (what this page covers vs. excludes)

This page covers the backlight power-and-control chain only: LED+ rail behavior, multi-channel current sinks, multi-string equalization, dimming injection points, and fault evidence (channel voltage/current + flags/counters). It does not cover pixel scanning, TCON, video links, or image algorithms.

Evidence fields (used throughout this article)

• ΔIstring%: string-to-string current mismatch under the same brightness command.
• VLED+: boost output rail level + ripple (correlates with regulation headroom and dimming artifacts).
• Vstring / Vheadroom: per-channel voltage (pinpoints the “starved” string before it drops out).
• PWM current edge waveform: overshoot/undershoot or slow settle can create visible banding.
• Fault flags + counters: OPEN/SHORT/OVP/OTP/UVLO with counts (frequency) and sequence order (timing).

H2-2. System Architecture: LED+ Boost Rail + Multi-Channel Current Sink

The backlight chain can be split into three domains that must be debugged separately: (1) LED+ rail generation, (2) per-string current regulation, and (3) control & observability. Treating them as one “black box” is the fastest way to miss the real cause of banding and mismatch.

Domain 1 — LED+ rail (boost) does “headroom,” not uniformity

• Role: keep LED+ just high enough that the worst-case string stays in regulation.
• If LED+ is too low: one string becomes headroom-starved → current collapses → visible dim string (even if the driver “commands” the same current).
• If LED+ is too high: excess drop across sinks → wasted power → hotter channels → drifting uniformity and higher artifact risk.

Domain 2 — multi-channel current sinks enforce Istring and matching

• Per-string channel: best for mismatch control and fault isolation (OPEN/SHORT per string).
• Zone grouping: used for local-dimming backlights; requires tighter headroom management and channel-level trim to avoid zone brightness drift.
• Key requirement: the design must know which string is “closest to dropout” before it actually drops out.

Domain 3 — control & observability (I²C + ADC + flags)

A backlight that cannot tell which channel is failing is not field-debuggable. Minimum observability for a multi-string design:

• VLED+ (rail level + ripple) — confirms margin and catches OVP conditions.
• Vchannel / headroom per string — pinpoints the starved string (most predictive for mismatch).
• Istring actual / error indicator — quantifies ΔIstring% vs command.
• Fault flags + counters — OPEN/SHORT/OVP/OTP/UVLO with event counts (frequency matters).
• Temperature — links thermal rise to derating and drift (later used for lumen maintenance logic).

Evidence map (how measurements point to the right domain)

H2-3. Multi-String Equalization: Current Match vs Headroom Balance

Start with the evidence: decide which mismatch you have

Mechanism A — Per-channel constant-current loop (baseline matching)

• What it guarantees: each sink channel regulates Istring to the commanded value, reducing mismatch caused by Vf spread.
• Hidden prerequisite: the channel must stay in regulation, meaning it always has enough Vheadroom.
• Evidence to confirm: steady-state ΔIstring% is low and each channel maintains a safe Vheadroom(min) across temperature and dimming range.

Mechanism B — Headroom control (use the “worst” string to set LED+)

Headroom control treats LED+ as a service rail: it should be just high enough that the highest-Vf (worst-case) string stays in regulation, while other channels are not forced to burn excess voltage.

Mechanism C — Adaptive boost margin: VLED+ = max(Vstring) + margin

• What “margin” must cover: minimum sink regulation drop + ripple valley + transient headroom + worst-case thermal Vf drift.
• Dynamic tradeoff: track too fast → more VLED+ ripple; track too slow → brief dropout during zone/brightness steps.
• Evidence to tune: VLED+ target error during steps, settling time, ripple amplitude, and whether Istring stays flat across transitions.

Mechanism D — Zone grouping balance (local dimming without headroom collapse)

Zone grouping is a current-level topic here. The goal is not image algorithms, but avoiding non-linear behavior when one zone demands higher current and becomes the first to lose headroom.

• Two-level knobs: global LED+ tracks the worst string, while per-zone/per-channel trim maintains consistency under each zone’s command.
• Failure signature: mismatch appears only during zone transitions; Vheadroom collapses for one zone group; Istring shows a “cliff” drop.

Evidence checklist (use throughout this chapter)

• Vf spread across strings (cold vs hot): which string becomes the max(Vstring).
• Per-channel headroom distribution: identify the first-to-dropout channel before it actually drops out.
• VLED+ tracking error: how closely the rail follows the required max(Vstring)+margin during steps.
• Uniformity proxy: ΔIstring% (and ΔL if you have luminance/optical feedback) versus temperature and dimming depth.

H2-4. Current Regulation Loop & Sensing: Accuracy, Ripple, and Stability

Sensing choices: integrated sense vs external Rsense

Low-side vs high-side current measurement (tradeoff in one sentence)

Low-side sensing is simpler but more sensitive to ground noise; high-side sensing can improve observability at the load side but raises common-mode and implementation constraints. The correct choice is the one that keeps the sense signal clean during PWM edges.

PWM dimming interaction: why deep dimming exposes loop limits

• PWM frequency: too low increases visible flicker risk; too high can stress the loop’s transient response.
• Edge behavior: current overshoot/undershoot at each edge can create banding or brightness “pumping.”
• Deep dimming non-linearity: noise, quantization, or dead-zones can dominate when the average current is small.

Compensation and stability: define a “stable operating window”

Stability must hold across input variation, Vf spread, temperature, and dimming depth. A practical stable window is the region where all of the following stay within limits:

• Ripple: Istring ripple (mApp) does not create visible artifacts.
• Response time: settling time after a command/PWM edge is fast enough to avoid banding.
• Overshoot: edge overshoot/undershoot stays bounded and repeatable.
• Headroom robustness: Vheadroom never collapses during the worst-case transitions (ties back to H2-3).

Evidence checklist (bring these into validation and field logs)

• Istring ripple (mApp) and ripple frequency components.
• Loop response time: settling time after step or PWM edge.
• PWM edge overshoot: peak/valley and duration.
• Stable operating window: which current, duty-cycle, and temperature ranges meet the above thresholds.

H2-9. Power Tree & Sequencing: Soft-Start, Inrush, Brownout, and Panel Coordination

Why this chapter exists: Intermittent black screen, a single flash at turn-on, or “blink then stable” behavior is often a sequencing/undervoltage problem—not a bad LED string. The goal is to make startup and brownout behavior measurable and repeatable using a small set of timing and power evidence fields.

1) A Minimal, Testable Power-Up Contract

A reliable backlight startup can be described as a four-phase contract. Each phase has a clear “pass/fail” signature on the scope. Keep the sequence strict so that “random flash” symptoms become deterministic.

• Phase A — Rails ready: input rails above UVLO and reset released; UVLO counter stops increasing.
• Phase B — Backlight enable gate: BL_EN is allowed only when prerequisites are true (delay, rails stable, internal state OK).
• Phase C — LED+ ramp: LED+ rises with a controlled slope; no overshoot beyond the OVP margin.
• Phase D — Current establish: Istring reaches the target within a defined time window; fault flags remain quiet.

2) Soft-Start and Inrush Control

LED+ overshoot is a common trigger for “flash then off then retry.” Soft-start must manage both the boost output ramp and the moment the current sinks close the loop. The key is to prevent a voltage spike at LED+ or a current spike during Istring establishment.

• What to measure: LED+ peak vs steady-state, ramp time (Tramp), and Istring step response at the first enable edge.
• Typical failure signature: LED+ overshoot → OVP flag → disable → retry cycle (reboot counter climbs).
• Design intention: keep LED+ within margin while Istring transitions from 0 to Iref.

3) Brownout: Avoid False OPEN and Reboot Loops

During a brownout, the current loop may briefly fail to regulate and look like an “open string.” If the fault logic reacts immediately, the system can enter repeated reset/retry, causing visible blinking. Brownout handling should include a short “fault mask window” that distinguishes power collapse from real OPEN/SHORT.

• Detect power collapse: UVLO event + LED+ dip slope + reset indicators (timestamp aligned).
• Mask false positives: temporarily de-sensitize OPEN/SHORT confirmation during the brownout window.
• Recover gracefully: delay before re-enable, then soft-start again; latch or derate only after repeated UVLO events.

4) Evidence Fields to Log and Correlate

The fastest way to debug “blink once” issues is to align timestamps across enable edges, LED+ ramp, and fault flags. A small set of counters and timestamps usually beats guessing hardware.

• EN timing: BL_EN, BOOST_EN, CH_EN relative order and delays.
• LED+ ramp: rise time, overshoot peak, settle time, dip depth on load step.
• Undervoltage evidence: UVLO count, minimum VIN/rail snapshot (if available).
• Restart evidence: reboot counter and “reason code” (OVP/UVLO/OTP/unknown).
• Fault alignment: OPEN/SHORT/OVP flags with timestamps, plus any mask-window indicator.

H2-10. IC/BOM Selection Checklist: What to Lock Down Before Picking a Driver

Purpose: a quantifiable checklist that keeps sourcing and engineering aligned. This section avoids vendor marketing and focuses on parameters that prevent wrong-part surprises: missing channels, insufficient headroom, unstable deep dimming, weak diagnostics, or “all-off” protection behavior.

1) Hard Limits (Cannot Be “Fixed Later”)

2) Dimming Quality and Artifact Risk (Backlight-Only)

• Dimming method: PWM / analog / hybrid, and where the modulation is injected (current command vs gate/loop node).
• Depth and stability: minimum duty or minimum current that stays stable without hunting or banding.
• PWM frequency range: must avoid visible flicker yet remain compatible with loop dynamics and noise constraints.
• Phase spreading support: reduces synchronous ripple summation across many channels (banding/EMI peaks).

3) Diagnostics, Telemetry, and Field Debuggability

• Per-channel OPEN/SHORT: independent detection and reporting (bitmap, not “global only”).
• Per-channel ADC: Vstring / headroom / LED+ / temperature snapshots enable evidence-based triage.
• Fault logs: counters + timestamps + last-reason codes (OVP/UVLO/OTP/OPEN/SHORT).
• Interrupt behavior: a clean fault IRQ helps correlate with sequencing signals and brownout windows.

4) Protection Behavior (Keep the Panel On If Possible)

• Isolation strategy: can a single bad string be shut off while others stay lit?
• Brownout handling: does the device support sensible retry policies and false-fault masking windows?
• OVP/OTP/UVLO action: derate, retry, or latch—each should be predictable and evidence-traceable.

5) A Simple Validation Hook (Before Finalizing BOM)

Before locking the BOM, validate two scenarios using the same evidence fields as earlier chapters: (1) cold start at max brightness, and (2) induced brownout dip. The selected IC should log UVLO/OVP/fault timing cleanly and recover without visible blink loops.