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Electrosurgery (ESU): HF Power Control, Feedback & Safety

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An ESU works by generating controlled HF energy, continuously sensing V/I (and impedance cues), and using a constrained feedback loop to keep tissue effects consistent while stopping safely on arcs, poor return contact (REM), leakage, or other faults. The key is not “more power,” but reliable measurement validity, bounded loop bandwidth and shutdown latency, and clear event logging for diagnosis.

What an ESU actually controls

Electrosurgery is not controlled by “a frequency setting.” It is controlled by how HF energy is delivered to tissue—via waveform shape, envelope, duty, and peak limits—so the tissue effect stays consistent as conditions change.

  • CUT / COAG / BLEND describe different output targets (envelope and peak/duty behavior), not marketing labels.
  • Tissue outcome is driven by two moving factors: delivered power / current density and tissue impedance changing over time.
  • The “load” is strongly non-linear and can jump suddenly (contact changes, wet/dry transitions, carbonization, arcing), so control must include limits and fast shutdown.
  • Everything on this page aligns to one chain: generate HF → sense V/I → compute impedance/power → adjust output → stop safely on faults.
CUT, COAG and BLEND: envelope-level control targets Three panels show envelope patterns for CUT, COAG and BLEND. Minimal labels highlight duty, peak and envelope differences without frequency values. Mode targets are envelope-level behaviors CUT COAG BLEND Envelope Envelope Envelope more continuous delivery bursts · higher peak tendency mixed envelope behavior Envelope target Duty density Peak limit (concept)
Figure F0 — CUT/COAG/BLEND are envelope-level control targets (no frequency numbers needed).

System architecture: power path, sensing, isolation, safety

A practical ESU architecture separates the noisy HF output domain from the control domain, measures V/I for impedance feedback, and enforces safety actions (REM and leakage/fault monitoring) with clear stop behavior.

  • Power path: DC bus → inverter/PA → coupling/output network → active electrode → tissue → return electrode.
  • Sensing path: V/I sense → AFE (limit, detect, average) → ADC → controller (impedance/power estimate).
  • Isolation boundary: isolate drive, isolate sensing/links where HF dv/dt would corrupt control signals.
  • Safety path: REM, leakage/ground-fault watch, OCP/OVP/OTP, arc/open/short detection, interlocks and footswitch inputs.
ESU architecture: power path, impedance sensing, isolation, and safety actions Block diagram shows controller domain, an isolation barrier, and output domain with HF power stage, V/I sensing, REM and leakage monitoring, plus arrows for drive, sense, and fast shutdown. CONTROL DOMAIN OUTPUT / PATIENT DOMAIN ISO barrier Controller / DSP Mode · limits · logs · stop control Impedance Feedback Z = V/I · averaging · rate limits Safety Actions Alarm · derate · hard shutdown HF Power Stage Inverter / PA · coupling block V/I Sense + AFE Detect · average · feed ADC REM Return pad quality Leakage Unintended path active return isolated drive V/I feedback fast shutdown drive sense safety action
Figure F1 — One-page map: power path, V/I sensing for impedance feedback, isolation boundary, and safety actions (REM and leakage watch).

Impedance feedback loop: what to sense and why it’s hard

An ESU impedance loop is only as good as its V/I sensing chain. The goal is not “perfect impedance,” but a stable, repeatable control signal that stays trustworthy under HF common-mode noise, dv/dt, parasitics, and arcing transients.

Must-sense: |V| envelope Must-sense: |I| envelope Optional: phase / sync cue Must-have: dZ/dt or d|I|/dt
  • Where “effective impedance” comes from: robust loops start from V/I amplitude (envelope or RMS-equivalent). Phase information can be added when needed to reject parasitic-driven misreads.
  • Why feedback is needed: the same setting can drift in tissue effect as contact area, wet/dry state, and carbonization change the load over time.
  • Why sensing is hard: HF common-mode injection, fast dv/dt, cable/probe parasitics, and arc bursts can create false V/I changes or saturate the measurement chain.
  • Practical pattern: band-limit + detect/shape in the AFE before the ADC, then use averaging, rate limits, and loop bandwidth limits so the controller does not “chase arcs.”
Signal to measure
Typical use
Risk it reduces
|V| envelope
Power / Z estimate
Prevents uncontrolled output drift when tissue/load conditions change.
|I| envelope
Current density proxy
Limits “hidden” current rise when contact improves suddenly or the controller overshoots.
dZ/dt or d|I|/dt
Transient gating
Stops the loop from chasing arc/contact jumps; helps avoid oscillation and re-ignition.
Phase / sync cue (optional)
Parasitic rejection
Reduces false impedance shifts caused by capacitive coupling and cable/probe parasitics.
Overload recovery time
Measurement integrity
Avoids long “blind windows” after spikes where the loop would act on stale or clipped data.
Impedance feedback loop: V/I sensing, AFE shaping, digital limits, and safe output control Block diagram shows V/I sensing feeding an AFE for band-limit and detection, then an ADC into a control block with averaging, rate limiting and bandwidth limiting. Fault cues like arc and contact jump gate the loop and trigger safe output actions. Impedance feedback needs trustworthy V/I signals HF Output Power stage + coupling block Tissue load non-linear · time-varying V I V/I sensing points AFE shaping Band-limit Detect / average ADC envelope channels Control law AVG moving average RATE slew limiting BW bandwidth limit Output command power / envelope target V/I envelope adjust output safely ARC CONTACT JUMP OPEN/SHORT gate / freeze loop sense path drive command fault cue
Figure F2 — Robust impedance control comes from shaping V/I into stable envelope signals, then constraining the loop (AVG/RATE/BW) so arc/contact transients do not destabilize output.

Patient return electrode monitoring (REM) & contact quality

REM is about return-path safety. It watches for contact degradation or detachment that can concentrate current density, then enforces a clear action ladder (alarm → derate → shutdown). This is separate from impedance feedback, which targets tissue-effect consistency.

  • Goal: detect worsening return contact before localized heating risk rises, even when the active-electrode control loop is behaving normally.
  • How it can be monitored: compare segmented return paths, track contact-quality trends, and apply thresholds that map to staged actions.
  • Boundary: impedance feedback focuses on stable tissue effect; REM focuses on safe current return. Both are required, but they drive different decisions.
  • Do not overfit to absolutes: trend and imbalance signals are often more reliable than a single “perfect” resistance number in the presence of cable and coupling variation.
Monitor approach
Decision cue
Action mapping
Segment comparison
Imbalance index
Alarm on mild imbalance, derate if worsening, shutdown on severe or rapid change.
Contact trend
Drift over time
Derate when trend crosses a safe slope; shutdown if it persists or accelerates.
Hard threshold
Out-of-range
Immediate alarm; shutdown when combined with other faults or when contact is lost.
Event logging
Level + timestamp
Record the action level (alarm/derate/shutdown) plus mode and recent contact metric trend.
REM: return electrode monitoring and staged safety actions Diagram shows a segmented return pad feeding a contact-quality monitor that generates imbalance and trend cues, then a decision block drives an action ladder: alarm, derate, shutdown, with a feedback arrow to the HF output command. REM watches return contact and drives staged actions Return pad segmented contact sense SEG A SEG B compare currents / voltages Contact monitor Balance imbalance index Trend drift over time Decision Alarm notify + log Derate reduce output Shutdown stop HF output Log level + trend sense cues derate / stop output monitor cue action alarm shutdown
Figure F3 — REM is a return-path safety chain: measure imbalance/trend, then map it to alarm → derate → shutdown with clear logging.

Leakage & fault monitoring: stop safely, log clearly

Leakage and ground-fault monitoring in an ESU exists to catch unintended return paths. It complements impedance feedback (effect stability) and REM (return-pad contact safety) by enforcing fast, conservative stop behavior and producing logs that can be reviewed after the event.

  • What is being watched: mismatch between intended output-loop behavior and measured return behavior, including signs of current escaping into a non-intended path.
  • ESU-relevant fault classes: open/short/high-Z, arc/carbonization transients, and control-input (cable/handpiece) integrity faults that can cause false triggers.
  • Stop strategy: use soft derate for controllable trends, and hard shutdown for fast or unsafe conditions (strong arc bursts, severe open/short, leakage/ground-fault cues).
  • Recovery rules: apply a cooldown window and a retry budget; escalate to lockout when repeated events suggest re-ignition risk or a persistent fault.
  • Log clarity: record event type, severity level, mode, a brief snapshot (|V|, |I|, Z_est, dZ/dt, return mismatch), timing, and the final action.
Monitor / cue
What it catches
Typical action + what to log
Return mismatch cue
Unintended return path risk
Derate or shutdown by level; log mismatch value, mode, action level, and duration.
Open / short / high-Z
Disconnected load, shorted output, extreme impedance
Fast shutdown for severe cases; log Z_est, |V|, |I|, and which threshold tripped.
Arc / transient burst
Re-ignition risk and unstable delivery
Freeze loop + shutdown/derate; enforce cooldown + retry budget; log dZ/dt peak and overload recovery time.
Input integrity (handpiece/cable)
False trigger, stuck button, intermittent enable
Debounce / ignore invalid patterns; log input state transitions and correlation with output behavior.
Repeat-event counter
Persistent fault / repeated arcing
Escalate to lockout; log retry count, cooldown windows, and final lockout reason.
Leakage and fault monitoring: classify events, stop safely, and log clearly Diagram shows the ESU output loop and an unintended return path, a fault classifier with ESU-specific event types, a staged action ladder from alarm to lockout, and a logging block that records snapshots and decisions. Fault monitoring: detect → decide → stop → log Output loop active → tissue → return Active electrode Tissue load Return electrode intended return Unintended path (leakage / ground-fault cue) Chassis / ground Fault classifier ESU-focused categories OPEN / SHORT / HIGH-Z ARC / CARBONIZATION INPUT INTEGRITY LEAKAGE / GF CUE Action ladder Alarm notify + record Derate reduce output Shutdown stop HF output Lockout manual clear Log snapshot |V| |I| Z dZ/dt reduce / stop output Cooldown window Retry budget Escalate to lockout
Figure F4 — Leakage and fault monitoring separates ESU-relevant event classes, maps them to staged actions, and logs a compact snapshot for review.

Isolation and drives: keep control clean under HF noise

Isolation in an ESU is not “extra complexity.” It is a practical way to keep the control domain trustworthy when the HF power domain produces large dv/dt and common-mode noise. The design focus is clean control, fast shutdown, and diagnosable links.

  • Why isolation is needed: prevents HF-domain noise from corrupting control signals and causing false triggers or delayed shutdown.
  • Engineering goals: high transient immunity, low and predictable shutdown latency, and built-in diagnostics for open/short/stuck links.
  • Minimum isolation set: isolated drive (control → gates), isolated sense (V/I → control), isolated comm (enable/ready/fault/status).
  • Safety tie-in: isolation links should support “stop confirmation” cues and create clear fault events when a link is unhealthy.
Isolated link
Placed between
Goal + diagnostic cue
Isolated drive
Controller → gate drive
Fast, deterministic shutdown; detect drive fault / UV / stuck channel and log it.
Isolated sense
V/I AFE → ADC/control
Keep measurement stable under common-mode noise; flag saturation, stale data, or link faults.
Isolated comm
Power domain ↔ control domain
Trustworthy enable/ready/fault; heartbeat or state cross-check to detect missing or stuck signals.
Isolation boundary map: isolated drive, isolated sense, isolated communication, and fast shutdown Block diagram shows a control domain and a power domain separated by an isolation barrier. Three isolated links cross the barrier: drive, sense, and communication. A highlighted fast-shutdown path runs from fault manager through isolated drive to the HF stage. Isolation keeps control clean and shutdown reliable CONTROL DOMAIN POWER / OUTPUT DOMAIN ISO barrier Controller / DSP mode · limits · setpoints ADC / Data conditioning envelope · averaging · flags Fault manager + Log alarm · derate · shutdown HF Power stage switching + coupling block Gate drive shutdown-critical V/I sense AFE shape before control Status / fault sensors ready · fault · integrity cues isolated drive isolated sense isolated comm fast shutdown path drive sense comm shutdown
Figure F5 — Minimum isolation set in an ESU: isolated drive, isolated sense, and isolated comm, with a highlighted fast shutdown path that stays reliable under HF noise.

IC role mapping: what blocks are actually needed

This block map keeps the ESU design focused on measurable control variables, deterministic shutdown, and traceable events. The roles below are written as “role → what specs matter → what to verify,” so component selection can be audited without drifting into other pages.

Low-latency shutdown Overload recovery Transient immunity Diagnosable links Sync & determinism

HF V/I Sense AFE

  • Dynamic range (small-signal detail + large transient headroom) and linear detection for envelope/RMS extraction.
  • Overload recovery time: must return to valid output quickly after arc spikes; long recovery creates “blind control.”
  • Input protection: withstand HF common-mode injection and dv/dt without latch-up or long saturation tails.
  • Verify: inject step/arc-like burst; measure recovery-to-valid time and envelope linearity across range.

ADC

  • Sampling strategy fit: envelope/averaged channels vs phase-sensitive outputs; avoid unnecessary HF waveform sampling.
  • Latency & determinism: conversion + digital filter group delay must be bounded; latency directly affects loop stability margin.
  • Synchronization: V and I channels need consistent timing; skew creates noisy impedance estimates and false derivatives.
  • Verify: measure end-to-end delay and channel-to-channel timing under the intended filter/decimation settings.

Isolation (sense / comm)

  • Transient immunity (CMTI): must tolerate HF dv/dt without bit flips or false transitions in fault/enable lines.
  • Propagation delay + skew: shutdown path and status sampling must be predictable; skew must stay within loop timing budget.
  • Channel count + diagnostics: enough channels for drive, sense, and fault/status; prefer link-fault detection options.
  • Verify: stress dv/dt environment and confirm no spurious toggles; validate worst-case delay and skew.

Gate Drivers / Isolated Drivers

  • Drive strength: peak source/sink current and gate charge handling aligned with the HF power switch and switching strategy.
  • Protection response: deterministic shutdown behavior, UVLO, fault pin behavior, and safe default state.
  • Noise resilience: avoid false turn-on under dv/dt; confirm negative transient handling where relevant.
  • Verify: measure shutdown latency (fault asserted → switching stopped) and confirm no re-ignition behavior during retries.

Supervisors / Comparators (hardware threshold chain)

  • Hard thresholds: over-current/over-voltage/over-temperature/interlock should not depend solely on firmware timing.
  • Response time + hysteresis: fast and stable trip; avoid chatter at threshold; define latch vs auto-retry behavior.
  • Verify: step faults and confirm trip time, clear conditions, and correct mapping to alarm/derate/shutdown/lockout.

MCU / DSP / FPGA

  • Closed-loop control: averaging, slope limiting, loop bandwidth cap, transient freeze policy, and mode-specific constraints.
  • Event logging: timestamped events with snapshots (|V|, |I|, Z_est, derivatives, REM imbalance, fault states).
  • Watchdog & safe state: defined behavior on firmware hang or clock faults; ensure hardware path still stops output.
  • Verify: forced firmware hang → watchdog action; validate log completeness and ring-buffer integrity.

Current / Voltage Monitors (REM / loop / rail monitor)

  • Accuracy vs speed trade: REM imbalance and loop checks benefit from stable, repeatable readings more than extreme precision.
  • Common-mode range + protection: tolerate switching noise and measurement points without corrupting data.
  • Verify: segment imbalance injection and confirm alarm/derate/shutdown ladder triggers at intended thresholds.
ESU IC role mapping: sense, convert, isolate, drive, supervise, control, and log Block diagram mapping HF power domain to control domain: V/I sense AFE feeds ADC; isolation bridges sense and status; isolated gate drivers control HF stage; supervisors/comparators enforce hard shutdown; MCU/DSP/FPGA runs constrained control and logging; monitors support REM and loop/rail checks. ESU block roles (what must exist) HF Power Domain HF stage inverter / PA Coupling block output network Electrodes & tissue active + return (REM) HF V/I Sense AFE protect · band-limit · detect overload recovery ADC sync · deterministic delay ISO CMTI Control Domain MCU / DSP / FPGA AVG · RATE · BW cap · freeze Event log type · time · snapshot Watchdog Drivers + HW limits isolated drive · shutdown path comparators · interlock V/I sense drive / stop hardware limits
Figure F7 — Keep the ESU scope tight: stable V/I extraction, deterministic ADC timing, high-CMTI isolation, fast shutdown drivers, hardware thresholds, and a controller that logs every action.
Example material numbers (non-exhaustive procurement reference)
  • Digital isolators (high CMTI families): TI ISO77xx / ISO67xx; Analog Devices ADuM14xx / ADuM11xx; Silicon Labs Si86xx.
  • Isolated gate drivers: TI UCC21520 / UCC217xx; Analog Devices ADuM3223 / ADuM4121; Silicon Labs Si823x; TI ISO5852S (isolated driver family).
  • Supervisors / voltage monitors: TI TPS38xx / TPS37xx; Analog Devices ADM8xxx; Maxim (Analog Devices) MAX63xx; Microchip MCP13x.
  • Comparators (fast threshold chain): TI TLV35xx / TLV36xx; Analog Devices ADCMP6xx; Microchip MCP65xx; onsemi LMV/NCV comparator families.
  • Precision current/voltage monitors (for REM/loop/rail monitoring): TI INA21x/INA24x/INA28x; Analog Devices LTC6102/LTC6103; ADI AD821x families (selection depends on common-mode range).
  • ADC examples (envelope/slow-variable acquisition): TI ADS131M0x (multi-channel delta-sigma); ADI AD7606 family (simultaneous sampling SAR); Microchip MCP356x (delta-sigma); selection depends on channel sync and latency needs.
  • MCU/DSP examples: TI C2000 (real-time control), Microchip dsPIC33, ST STM32, NXP i.MX RT; selection depends on control-loop timing and logging requirements.
Note: part numbers are examples for BOM discussions; final selection depends on HF topology, switching dv/dt, required isolation channels, and shutdown-latency budget.

Design checklist (engineer-facing)

This checklist is written for acceptance: each line asks for a concrete signal, a clear decision rule, and an observable result. It is designed to verify coverage, loop safety, fault actions, and log traceability without expanding into other subsystems.

Item What must be true Evidence / pass criteria
Sampling-point coverage Coverage exists for: output V/I, REM (return contact quality), leakage/ground-fault cue, temperature, and interlocks (footswitch/handpiece/doors). All points visible in the system map; each point has a stated use (control vs safety vs diagnostics) and a logging hook.
Measurement validity AFE and ADC paths define clipping/saturation detection and overload recovery behavior; invalid windows are marked and do not steer output. Injected burst produces: validity flag asserted; output control frozen/clamped; recovery completes within stated bound.
Closed-loop constraints Loop includes: amplitude limit, slope limit, bandwidth cap, and a freeze policy for arcs/contact jumps; mode-specific limits (CUT/COAG/BLEND) are explicit. Step tests show no oscillation; output changes respect slope limit; loop does not “chase” transient spikes.
Fault action ladder Faults map to: alarm / derate / shutdown / lockout; each action has a clear trigger and a clear release condition (including cooldown and retry budget). For each injected fault type, observed action matches the ladder; repeated events escalate to lockout as specified.
Deterministic shutdown path Hardware path exists to stop HF switching independent of firmware timing; isolation/driver delays are bounded and validated. Measured latency: fault asserted → HF switching stops within stated worst-case (scope capture + recorded limit).
REM verification REM detects segment imbalance and contact-quality trend; REM remains authoritative even if impedance loop requests more output. Segment imbalance injection triggers alarm/derate/shutdown as defined; override behavior documented and logged.
Leakage / ground-fault policy Leakage is treated as unintended return path risk; response is conservative and does not auto-retry into repeated unsafe conditions. Ground-fault cue forces derate/shutdown as specified; retry counter and cooldown windows recorded; lockout enforced when needed.
Log traceability Logs include: event type, timestamp, mode, output level, and a compact snapshot (|V|, |I|, Z_est, derivative, REM cue, action level). Post-event review can reconstruct “what happened and why”; logs show sequence order and include action outcomes.
ESU acceptance checklist flow: coverage, constraints, actions, and logs Diagram shows four acceptance pillars in sequence: sensing coverage, loop constraints, fault ladder with deterministic shutdown, and traceable event logs, with example signals listed under each pillar. Acceptance flow: prove coverage → prove control → prove stop → prove logs 1) Coverage V/I REM Leakage/GF cue Temp Interlocks 2) Constraints Amplitude limit Slope limit BW cap Freeze on arc Validity gating 3) Actions Alarm Derate Shutdown Lockout Cooldown + retry Deterministic stop 4) Logs Type + time Mode + level |V| |I| Z Derivatives REM cue Action result Pass criteria must be measurable: bounded latency, no spurious toggles under dv/dt, stable loop limits, correct action ladder, and reconstructable logs. Recommended evidence: scope captures for stop latency + log excerpts with event snapshots.
Figure F8 — Engineer-facing acceptance is a sequence: prove sensing coverage, prove control constraints, prove deterministic stop actions, and prove logs can reconstruct the event.

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FAQs × 12 (ESU)

Answers are written for readers and aligned to the ESU scope: HF generation → V/I/impedance sensing → constrained feedback → REM/leakage/fault actions → clear event logging.

1) How do CUT, COAG, and BLEND modes differ in what the ESU is actually controlling?
These modes mainly change the output waveform envelope and peak behavior, not the HF carrier concept. CUT favors a more continuous energy delivery to sustain a stable current density. COAG uses bursty, higher-peak, lower-duty envelopes to promote surface coagulation while limiting average heating. BLEND sits between them, combining continuity with controlled bursts and peak limits.
2) Which signals must be measured to run impedance feedback reliably (V, I, phase, envelope), and what is optional?
Reliable impedance feedback needs a stable representation of delivered voltage and current that remains valid during transients. In practice, an envelope or averaged magnitude for V and I plus a measurement-valid flag is the minimum set. Phase or I/Q information is optional and useful when distinguishing contact changes from reactive cable effects. Optional signals must not add excessive latency or instability risk.
3) Why can a simple power-only loop become unstable during arcing or tissue carbonization, and how is it tamed?
During arcing or carbonization, the load can change faster than the control loop and measurement path can track. A power-only loop may react to corrupted or delayed measurements, overshoot, and then chase the transient, creating oscillation or repeated arc re-ignition. Stability is improved by bandwidth limiting, slope limiting, validity gating, and a freeze or clamp policy when arc symptoms are detected.
4) What are common mistakes in V/I sensing under HF dv/dt that lead to wrong impedance readings?
Common errors include letting parasitic capacitance inject displacement current into the sense path, poor common-mode rejection that turns dv/dt into false differential signal, and front-end saturation with slow recovery after bursts. Long ground returns and inconsistent sense reference points also create phase and amplitude distortion. Good practice is tight loop area, protected inputs, band-limited detection, and explicit overload recovery testing.
5) How should the control loop bandwidth and rate limits be chosen to avoid chasing transients?
The loop should be slower than the fastest disturbance it cannot measure accurately, and faster than the tissue-side drift it must correct. Rate limits bound how quickly output can change, preventing sudden steps that ignite arcs or amplify noise. A practical approach is to set a conservative loop bandwidth, apply slope limits per mode, and freeze updates during invalid measurement windows.
6) What is Return Electrode Monitoring (REM) trying to prevent, and what triggers alarm vs derate vs shutdown?
REM protects the return path by detecting degraded contact, partial detachment, or segment imbalance that can raise local current density and heating risk. Alarm is appropriate for early trend warnings. Derate is used when contact quality is worsening but still present. Shutdown is required when thresholds indicate unsafe contact or a rapid change suggesting detachment, and REM actions must override performance-oriented control requests.
7) How can the system detect open load / short / high impedance quickly without false trips?
Fast detection uses multiple cues rather than a single threshold: expected ranges for V and I, consistency between commanded output and measured response, and short time-window persistence to reject single-sample spikes. Open load typically shows rising V with collapsing I, while a short shows the opposite. High impedance or poor contact can be detected by sustained low current density plus abnormal impedance trend, with debounce and validity gating.
8) What is arc detection in ESU, and which symptoms are most useful (spikes, impedance jumps, envelope bursts)?
Arc detection identifies brief, non-linear discharge events that distort normal tissue impedance behavior and can cause uncontrolled heating. Useful symptoms include abrupt V or I spikes, sudden impedance steps, burst-like envelope anomalies, and rapid derivatives that exceed physical tissue drift. The most practical method combines a symptom score with measurement-valid flags, then triggers a clamp or freeze response to prevent the loop from chasing the arc.
9) Where should isolation boundaries sit in an ESU, and what failures does isolation prevent in practice?
Isolation is placed where HF power-domain noise can corrupt control or safety decisions: across sense data paths, gate-drive control, and key status or interlock lines. In practice, isolation helps prevent false triggering, missed shutdown commands, and corrupted measurements caused by high dv/dt common-mode transients. Isolation choices must prioritize transient immunity, bounded propagation delay, and diagnosable link failures.
10) What should leakage / unintended current-path monitoring watch for, and what is the safest default action?
Leakage or unintended current-path monitoring looks for return currents that do not follow the intended electrode-to-return route, indicating insulation breakdown, ground fault, or unexpected coupling. Signals can include imbalance between measured supply, output, and return currents, or dedicated leakage sensing points. The safest default action is conservative: alarm and rapid derate or shutdown, with limited retries and clear lockout to avoid repeated unsafe energization.
11) What self-test or calibration checks are worth doing at startup to catch sensing/return-path faults early?
Startup checks should validate that sensing and safety channels are believable before enabling HF output. Useful tests include zero or known-load checks for V and I sensing, overload flag sanity, REM segment continuity or balance check, interlock and switch state verification, temperature sensor plausibility, and isolation link integrity. Any failed check should block enabling and generate a clear diagnostic code in the log.
12) What should an ESU event log include to make field failures diagnosable (signals, timestamps, mode, fault class)?
A field-useful log records both what was commanded and what was observed. Include timestamp, mode, output setpoint, measured V and I (or envelope), estimated impedance and derivatives, REM metrics, fault class, action taken (alarm, derate, shutdown, lockout), and retry counters. Add a short pre/post snapshot window around key events and include firmware version so behavior changes can be traced.