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Point-of-Care Test (POCT) Electronics: AFE + MCU + Disposable I/F

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POCT electronics is the discipline of turning a disposable sensor into a trustworthy result within minutes, using a compact reader that tightly controls the cartridge interface, measurement timing, and low-power states. A practical POCT design succeeds by gating bad insertions early, scheduling clean sampling windows, and linking calibration + error budget to a traceable result record.

Definition: What makes a device “POCT electronics”

Featured definition

POCT electronics is the reader-side hardware and firmware that connects to a disposable strip or cartridge, applies controlled excitation and timing, converts sensor signals with an analog front end (AFE), runs low-power orchestration on an MCU, and delivers a traceable result through a simple display and short-range I/O.

POCT designs are constrained by small size, short test time, single-use consumables, low maintenance, low power, and result traceability. These constraints push the architecture toward a strong disposable interface + timing orchestration + low-cost error budget, rather than heavy instruments or long, user-managed calibration routines.

  • Small form factor: fewer protection and shielding options; interface cleanliness and ESD become first-order design items.
  • Short test time: precision comes from controlled timing windows, not from “averaging longer”.
  • Disposable consumable: cartridge ID and calibration payload must be part of the signal path and data flow.
  • Low maintenance: built-in self-checks and contact diagnostics reduce user actions and support calls.
  • Low power: burst measurement, peripheral gating, and event-driven firmware dominate the power budget.
  • Traceable results: records typically include cartridge lot/ID, calibration version, timestamp, and measurement status flags.

Boundary note: this POCT page focuses on reader ↔ disposable interface, AFE timing, and low-power orchestration. It does not expand into PCR thermocycling, high-throughput lab analyzers, or gateway/security system architecture.

Reader and disposable architecture for POCT electronics Block diagram showing a disposable strip/cartridge with sensor zone and ID/calibration payload connected through an interface to a POCT reader containing AFE, ADC, ultra-low-power MCU orchestration, display, and short-range communications. POCT Reader + Disposable Signal Chain Disposable strip / cartridge Sensor zone Electrochem Optical Cartridge ID / Cal EEPROM NFC / ID Interface Reader AFE timing · low power · traceable result AFE TIA / Bias / Filter ADC SAR/ΔΣ ULP MCU timing · sleep/wake · checks power gating UI I/O BLE USB POCT focus: disposable interface + timing orchestration + low-cost error budget
Figure F1 — Reader ↔ disposable architecture: cartridge ID/cal flows into MCU timing, while sensor signals run through AFE → ADC → MCU → UI/I/O.

System architectures you will actually see

A practical way to avoid scattered requirements is to classify POCT designs by how the disposable connects and what sensing modality dominates. Most products fall into a small set of repeatable patterns.

Architecture types (connection × modality)
Type Disposable connection Electronics emphasis
Strip/Cartridge (insert) Pogo-pin or edge connector; minimal mechanics Contact robustness, ESD, ID/cal read, simple state machine
Cassette (caddy) More contacts + mechanical alignment + anti-reverse features Presence/latch detection, multi-contact diagnostics, tighter timing control
Electrochemical Electrodes on strip/cartridge; leakage-sensitive contacts TIA dynamic range, bias/reference stability, short/open checks
Optical Optical window + LED/PD alignment; motion/ambient sensitivity LED pulse timing, ambient blanking windows, TIA recovery and sync sampling

Common reusable core across types: AFE + ADC + ULP MCU orchestration + a simple display, with only light short-range I/O. Differences concentrate at the disposable interface and the measurement timing windows.

Two common POCT signal chains: electrochemical vs optical Side-by-side block diagram comparing an electrochemical chain (sensor electrodes to TIA to ADC) and an optical chain (LED driver to photodiode TIA to ADC) feeding a shared ultra-low-power MCU, display, and power gating. Architectures you actually see: two dominant chains Electrochemical Optical Electrodes TIA low leak ADC range LED driver PD TIA recovery ADC sync Timing windows ambient blanking + sample Shared core ULP MCU orchestration Display Power gating Light I/O BLE/USB Classification keeps requirements tight: connection mechanics + sensing modality → reusable core.
Figure F2 — Two dominant POCT chains share the same MCU/display/power core; the main differences sit at the interface and timing windows.

Disposable-sensor interface: the make-or-break layer

POCT reliability is often decided before any measurement begins. The interface must confirm correct insertion, healthy contacts, and valid cartridge identification/calibration, while protecting the AFE from ESD and preventing moisture or contamination from creating leakage paths that mimic real signals.

Practical rule: gate the measurement. Only enable AFE sampling after presence/latch, contact health, ID/cal validation, and leakage checks pass within defined windows.

  • Presence detect / latch: insertion detection, latch confirmation, and tolerance-aware “ready” criteria.
  • Cartridge ID & calibration payload: resistor code, 1-Wire, I²C EEPROM, or NFC; used to load gain/offset/time constants and traceability fields.
  • ESD / moisture / contamination: clamp and limit surge paths; treat wet contacts and residue as leakage sources that can create false currents/offsets.
  • Anti-reuse (light): one-time token, counter bit, fuse mark, or ID bind; kept simple to deter accidental reuse without building a full security system.
Interface foolproof map for POCT disposable connection Block diagram map showing disposable contacts, ID/cal payload, ESD and moisture risks feeding interface checks: presence/latch, contact health, ID/cal validation, leakage detection, and a measurement enable gate before AFE sampling. Interface “gate” before measurement Disposable Contacts ID / Cal EEPROM NFC 1-Wire Risks ESD Moisture Residue Interface Reader checks Presence / latch insertion + lock Contact health open/short window ID / Cal valid read + CRC Leakage check moisture/residue Input protection ESD clamp + series limit + guard MEASURE ENABLE only if all checks pass AFE sample Gate measurement on insertion + contact health + ID/cal validity + leakage status.
Figure F3 — Interface foolproof map: pre-checks and protection blocks feed a “measurement enable” gate before the AFE samples any sensor signal.

AFE patterns for POCT: one page, two universes

Most POCT readers reuse a common MCU/display/power core. The AFE, however, usually falls into one of two repeatable patterns: electrochemical sensing (current/voltage at electrodes) or optical sensing (LED + photodiode). The right pattern is selected by the disposable’s physics, then tuned by a cost-driven error budget.

Quick comparison (what usually matters)
Electrochemical POCT
Dominant concerns: input leakage/bias, wide dynamic range, electrode polarization settling, and contact-induced false currents.
Optical POCT
Dominant concerns: LED pulse timing, ambient subtraction windows, PD TIA noise/bandwidth, and saturation recovery time.

Electrochemical POCT (module level)

  • Excitation: voltage step, programmable current source, or DAC-driven bias to create repeatable chemistry conditions.
  • Measurement: TIA and/or electrode potential sense into a low-noise ADC with a stable reference and input protection.
  • Multi-electrode / multi-channel: MUX plus bias routing, with open/short diagnostics to catch contact faults.
  • Key metrics: input bias/leakage, noise floor, polarization settling impact, and end-to-end dynamic range.

Optical POCT (module level)

  • LED driver: pulsed or constant-current, sometimes multi-wavelength; pulse timing enables low average power and synchronous sampling.
  • PD TIA: noise and bandwidth set minimum detectable signal; saturation recovery sets how soon a valid sample window can open.
  • Timing: blanking after switching events, ambient subtraction (LED off vs on), and synchronized sampling markers.
Timing diagram for LED pulse sampling and ambient subtraction Timing diagram showing LED drive pulse, PD/TIA response, blanking interval, ambient sample window with LED off, signal sample window with LED on, and subtraction result signal minus ambient. When to sample: ambient window + signal window time LED drive PD/TIA output ADC samples pulse blanking Ambient LED off Signal LED on Result Signal − Ambient Use a blanking interval, then sample ambient (LED off) and signal (LED on) for robust subtraction.
Figure F4 — Timing diagram: a blanking interval avoids recovery artifacts, then separate ambient and signal windows enable stable “signal minus ambient” measurement.

Low-power MCU orchestration: timing is the algorithm’s chassis

In a POCT reader, reliable results come from a repeatable state machine that gates measurement, schedules short sampling bursts, and returns the system to low power immediately after each window. Timing control is the chassis that holds sensing physics, AFE behavior, and user interaction together.

Practical rule: Gate → Burst → Sleep. Gate measurement on interface checks, sample in short bursts, then power-gate AFE and I/O back to sleep.

State machine skeleton
  • Idle: deep sleep; only insertion/presence path active.
  • Insert: presence/latch, contact health, and ID/Cal read/validation.
  • Warm-up / Prime: brief stabilization of references, bias, LED/TIA; quick baseline checks.
  • Measure: burst sampling windows; gate high-power peripherals between bursts.
  • Validate: quality checks; classify contact/leakage/instability as actionable faults.
  • Display / Transmit: show result; optional short-range export; record traceable fields.
Low-power execution tactics
  • Time-sliced power: enable AFE/LED/reference only inside defined windows.
  • Peripheral gating: ADC, bias, LED driver, pull-ups, and UI backlight are state-scoped.
  • Burst sampling: short bursts reduce average power and isolate transients from steady samples.
  • Event-driven firmware: insertion, button, timer, and threshold events replace polling loops.
Diagnostics that act as gates
  • Self-test: baseline/offset sanity, ADC saturation checks, and reference-in-window tests.
  • Reference drift check: compare prime vs measure windows; retry prime if drift exceeds limits.
  • Contact anomaly checks: open/short/leakage detection and stability scoring across bursts.
POCT state machine for low-power orchestration State diagram showing Idle, Insert, Warm-up/Prime, Measure, Validate, and Display/Transmit with gate checks and fail paths. Emphasis on gating measurement, burst sampling, and returning to sleep. POCT orchestration state diagram Idle sleep Insert ID / contact Warm-up / Prime stabilize Measure burst windows Validate checks Display / Transmit UI / I-O Gate: OK Gate: Quality OK fail retry Gate measurement, sample in bursts, then sleep to minimize average power.
Figure F5 — A POCT reader runs a gated state machine: insertion checks and quality validation determine whether measurement proceeds, retries, or returns to sleep.

Display & comms (keep it minimal, POCT-specific)

POCT output is optimized for fast readability, low average power, and minimal interference with sensitive measurements. Local UI and short-range interfaces should stay simple: show a clear result, export only what is needed, and always attach traceable fields.

Display selection logic (POCT-focused)
  • Segment / simple LCD: lowest power, excellent sunlight readability, best for numeric + status UI.
  • Small mono LCD: adds icons and step prompts with modest power increase and low EMI risk.
  • Small TFT: richer guidance and error details, but backlight power and EMI management become design constraints.
Short-range interfaces: need vs tradeoff (interface-level only)
Interface Typical POCT need Power impact Notes (EMI / UX)
BLE Optional export after result; short session, user-triggered Low average if duty-cycled Schedule radio away from sampling windows; keep pairing UX simple
NFC Tap-to-read ID/cal or quick result pull Very low for brief taps Good for “minimal UI” devices; align antenna away from AFE
USB Service/maintenance, factory test, wired export Higher when active ESD on connector; isolate activity from measurement windows
Traceable record fields (local)
Result value & unit · Cartridge lot/ID · Timestamp · Calibration version · Status flags (pass/fail, retry, contact/leakage indicators)
POCT data flow from cartridge calibration to local UI and short comms Data flow diagram showing cartridge ID/cal feeding MCU orchestration and measurement, producing a result record with traceable fields, then output to local UI and short-range communications (BLE/NFC/USB). Data flow: Cal → Measure → Result → UI / Short comms Cartridge ID / Cal EEPROM NFC ULP MCU orchestration Measurement AFE + ADC Validate quality gates Result record Result Lot / ID Time Cal ver Status Local UI Short comms BLE USB NFC Keep UI and I/O simple; always attach lot/ID, time, cal version, and status to the local result record.
Figure F6 — Calibration data configures timing and measurement; validated results are packaged with traceable fields and sent to local UI and minimal short-range interfaces.

Accuracy & calibration: error budget you can actually manage

POCT accuracy becomes manageable when error sources are grouped into a small set of buckets, then matched to a calibration placement strategy and a lightweight field verification plan. The goal is a repeatable error budget that can be verified during insertion and measurement, without turning the system into a maintenance-heavy instrument.

Practical framing
Treat disposable variance and mechanical positioning as first-class error terms. Use calibration placement to attack the dominant term, and use small, repeatable checks to stop invalid runs early.
Error source grouping (what usually dominates)
  • Disposable variance: lot-to-lot and cartridge-to-cartridge gain/offset differences and chemistry/optics variability.
  • Temperature: reaction rate, LED/PD temperature behavior, leakage changes, and reference drift sensitivity.
  • Optical / electrochemical drift: LED aging/contamination, electrode polarization and fouling, response settling shifts.
  • ADC / reference: gain/offset/noise floor, reference stability and drift within the measurement window.
  • Mechanical positioning: insertion alignment, optical path repeatability, contact resistance variability.
Calibration placement: “on cartridge” vs “in reader”
Placement Best at controlling Cost / complexity Typical POCT use
On cartridge Disposable variance and lot differences Requires ID/Cal payload and validation When disposable terms dominate the budget
In reader Reader AFE/ADC/reference repeatability Factory/service calibration process When disposable variance is naturally small or tightly controlled
Field verification (keep it light)
  • Control line: a must-pass indicator that the disposable chain is functioning.
  • Internal standard: a quick reference reading to spot optical drift or path changes.
  • Sanity checks: baseline, saturation, noise, and repeatability gates that stop invalid runs early.
Error budget map and calibration placement for POCT Diagram showing grouped error sources, calibration placement options (on cartridge vs in reader), and lightweight field verification blocks that gate measurement. Manageable POCT error budget Error buckets Disposable Temp Drift ADC/Ref Mechanical Focus calibration on the dominant bucket. Calibration placement On cartridge Lot / per-unit ID + Cal payload In reader AFE / ADC / Ref Factory trim Quality gate Field verification Control line must-pass Internal standard drift spot-check Sanity checks baseline / noise Group errors → place calibration → gate runs with light checks.
Figure F7 — A practical POCT accuracy plan: group dominant errors, place calibration where it matters most, and use lightweight checks to gate invalid runs.

IC role mapping (example part numbers for POCT)

This role map keeps POCT-specific priorities in view: low average power, repeatable timing orchestration, and an error budget that can be linked to cartridge ID/cal data and traceable result records. Part numbers below are examples to represent each role; selection depends on sensor physics, cost targets, and interface constraints.

Sensor AFE
Electrochemical AFE (potentiostat-style front end)
  • ADI ADuCM355 — integrated electrochemical measurement + MCU class integration; supports “read ID/cal → configure → measure → record” loops.
  • ADI AD5940 / AD5941 — low-power electrochemical/impedance-oriented AFE family; useful for repeatable excitation + measurement blocks.
  • TI LMP91000 — configurable analog front end for electrochemical sensing; helps adapt a reader to multiple disposable behaviors with tunable settings.
Optical AFE building blocks (LED + photodiode chain)
  • TI AFE4404 — integrated timing-friendly optical measurement front end; useful as a reference pattern for synchronized sampling windows.
  • TI LMP7721 — ultra-low input bias amplifier; helps control bias/leakage error terms in very small current measurements.
  • ADI ADA4530-1 — ultra-low bias with guard buffer concept; useful where leakage paths dominate the error budget.
  • TI OPA381 — photodiode TIA-friendly op amp option; supports fast settling for pulsed LED sampling windows.
ADC / DAC / Reference (low drift, low power)
  • TI ADS1220 — low-power 24-bit ΔΣ ADC with PGA/IDAC options; useful for small-signal measurement and repeatable gain paths.
  • ADI AD7124-4 / AD7124-8 — multi-channel precision ΔΣ ADC family; supports stable, low-drift measurement paths where channel switching is needed.
  • ADI ADR4525 — precision voltage reference example; stabilizes the ADC/reference budget term across temperature and time.
  • ADI AD5683R — low-power DAC with internal reference option; useful for programmable excitation/bias in a compact BOM.
ULP MCU / BLE SoC
  • Nordic nRF52840 — BLE SoC example for short, user-triggered exports; supports deep sleep and event-driven bursts.
  • Nordic nRF52832 — smaller BLE SoC option when feature set is minimal and power/size are prioritized.
  • ST STM32L4 — ULP MCU family example for state-machine orchestration and aggressive peripheral gating.
  • TI MSP430FR series — ULP MCU example suited to event-driven control and long standby with fast wake.
Display driver / LED driver
  • NXP PCF8576C — segment/LCD driver example for ultra-low-power numeric + status UI.
  • Holtek HT1621 — common low-power segment LCD driver option for simple POCT displays.
  • TI TLC5947 — multi-channel constant-current LED driver for stable illumination and indicator LEDs.
  • TI TLC59711 — higher precision LED driver option when current matching and repeatability matter.
Power (battery / charger / PMIC) — roles only
  • TI BQ25120A — highly integrated charger/power-path style solution for small batteries and low-power systems.
  • ADI/Maxim MAX17048 — low-power fuel gauge option to support battery-aware policies and traceable logs.
  • TI TPS62840 — low-IQ buck regulator example for efficient “burst then sleep” power behavior.
  • TI TPS7A02 — ultra-low-IQ LDO example for quiet always-on rails with minimal standby drain.
IC role map for a POCT reader Block diagram showing two sensor AFE paths (electrochemical and optical) feeding ADC/reference and a low-power MCU orchestrator, with outputs to display and short comms, plus a power block for battery, charger, and PMIC roles. POCT IC role map Sensor AFE Electrochemical excite + TIA Optical LED + PD TIA ADC / Ref low drift ULP MCU timing / gates state machine Outputs UI / short comms BLE / NFC Power roles Battery fuel gauge Charger power path PMIC low IQ rails Keep roles modular: AFE → ADC/Ref → MCU timing → UI/short comms, supported by low-IQ power rails.
Figure F8 — IC role map: two sensing universes feed a shared conversion + orchestration core, then minimal outputs and low-power rails support the POCT workflow.

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FAQs

How can insertion and presence detection be robust without complex mechanics?
Use a two-stage gate: detect insertion, then verify stability. Combine a simple presence switch or latch signal with an electrical contact health check such as continuity or resistance windows. Add debounce timing and reject unstable transitions. Only unlock ID read and measurement after the gate is continuously valid for a defined settle window.
What is the most practical way to carry cartridge ID and calibration data?
Resistor coding is cheapest and works for small variant IDs, but payload is tiny. I2C EEPROM supports lot or per-unit coefficients and versioning with enough bytes for slope, offset, and temperature terms. NFC is useful for sealed cartridges and quick taps. Any method should include a version field and CRC to gate invalid payloads.
Where should blanking and settling time be placed to avoid false readings?
Put blanking right after any event that forces a transient: MUX switching, bias enabling, reference wake-up, or an LED pulse edge. Use a short settle window before the first valid sample, then sample inside a stable window. A simple approach is pre-samples to confirm settling, followed by a fixed number of valid samples for averaging.
How can ambient subtraction or baseline correction fit a low-power budget?
Use paired burst windows: an LED-off ambient sample followed by an LED-on sample with the same timing and gain. Keep the LED driver, TIA bias, and ADC enabled only during the paired window, then power-gate them. Average a few short pairs instead of running long continuous acquisition. Schedule radio and UI updates outside the burst.
What power domains should be gated in Idle, Insert, and Measure states?
In Idle, keep only the insertion detect path, RTC, and minimal memory alive. In Insert, enable the ID interface briefly, then shut it down after validation. In Measure, enable AFE, reference, and ADC only for burst windows, while keeping radio and backlight off. After Validate, enable UI and short comms for a limited session, then return to sleep.
What common mistakes raise average power even if the MCU sleeps?
Typical leaks come from always-on pull-ups, continuous ADC conversions, and polling loops that prevent deep sleep. Backlights left on and BLE advertising without strict duty cycling also dominate. Another frequent issue is leaving analog bias or LED driver quiescent current enabled between bursts. A good audit checks every peripheral clock, GPIO state, and rail enable per state.
When should calibration live on the cartridge, and when inside the reader?
Put calibration on the cartridge when disposable variance dominates, because lot and per-unit differences change gain and offset more than the reader does. Keep calibration in the reader when the analog chain is stable and disposable variance is small. A practical hybrid stores disposable slope and offset in the cartridge payload while the reader stores its own reference trims and uses both with explicit versioning.
Which error terms usually dominate POCT repeatability, and what fixes help first?
Disposable variance and mechanical positioning often dominate because they shift baselines and optical paths run to run. First fixes include carrying lot coefficients, enforcing insertion stability gates, and scoring contact health before measuring. Next, capture temperature at the same time as sampling and apply simple compensation. Use an internal standard or control line to spot drift and stop invalid runs early.
How can wet contact or contamination be detected before it corrupts measurement?
Add a quick leakage and stability gate in Insert and Prime states. Measure high-impedance paths between key pins, check for unexpected conductance, and compare against a known dry baseline window. Wet contamination often shows slow settling and unstable offsets, so short pre-bursts can detect it. If leakage is suspected, block measurement and request a cartridge replacement.
What interface-level ESD protections help without harming low-level accuracy?
Place ESD protection at the connector side using series resistance, low-leakage clamps, and careful grounding to keep sensitive nodes quiet. Avoid adding large capacitance directly on high-impedance measurement inputs. Use guard and shielding to control leakage paths and keep contamination from becoming a DC error. After an ESD event, run a fast baseline and reference-in-window self-test to validate recovery.
What self-tests are most useful right after insertion to prevent wasted runs?
Start with ID payload validation using version and CRC, then check contact health against open and short windows. Verify the reference voltage is in range and that the ADC is not saturated. Run a short baseline burst to estimate noise and settling stability. If any gate fails, present a specific error and block measurement so invalid runs do not produce misleading results.
How should BLE, NFC, or USB be chosen so comms do not disturb sampling windows?
Choose by workflow: NFC for quick tap reads, BLE for short wireless exports, and USB for service and factory use. Keep radios and high-activity interfaces off during Prime and Measure bursts, and schedule them only after Validate passes. Enforce a maximum session window, then shut interfaces down. Log transfer status with the result record so traceability does not depend on connectivity.
Data structure for POCT FAQ decisions (fields and gates)
Gate checks (typical pass-fail list)
insertion_ok · id_crc_ok · contact_health_ok · ref_in_window_ok · adc_not_saturated_ok · baseline_noise_ok · leakage_suspect=false · quality_ok · retry_count_limit_ok
Timing windows (what is usually parameterized)
t_insert_debounce · t_prime_settle · t_blank_after_switch · t_led_on · t_sample_window · t_ambient_window · n_samples · n_bursts · t_burst_gap
Calibration payload (cartridge or reader)
cal_version · lot_id · cartridge_id · slope · offset · temp_coeff · expiry_or_age_tag · crc · payload_length
Traceable result record (minimum practical set)
result_value · unit · timestamp · lot_id_or_cartridge_id · cal_version · temperature_snapshot · status_flags · retry_count · comms_export_status
Power policy (state-scoped enable rules)
always_on_domain=insert_detect+rtc+minimal_mem · insert_domain=id_if_short_window · measure_domain=afe+ref+adc+led_burst_only · comms_domain=post_validate_only_with_timeout