What this BLDC / PMSM driver page helps decide

This page is the place to plan the 3-phase bridge and driver stage for BLDC and PMSM motors in the 12–48 V range — fans, pumps, auxiliary EV motors, small servos and power tools. The focus is on selecting the right power-stage architecture and driver IC features before diving into detailed safety, sensing or front-end power design.

The content concentrates on four core decisions: whether to use an integrated driver with on-chip MOSFETs or a gate-driver plus external MOSFETs or IPM, whether the commutation style should be six-step or sinusoidal / simplified FOC, and how strongly the design relies on sensorless BEMF detection versus sensored feedback.

Safety functions, DC-link and pre-charge hardware, detailed current and voltage sensing chains, and system-level EMC are intentionally handled on dedicated pages such as servo power stages, protection and braking, phase current sensing, bus-voltage sensing, front-end power and EMC subsystems. This page keeps the discussion on the 3-phase bridge and driver IC itself.

• Define the operating voltage and current range for the motor stage.
• Choose between integrated driver + MOSFET, gate driver + MOSFET, or IPM.
• Align commutation style with driver capabilities and control MCU.
• Plan hooks for sensored and sensorless operation, including BEMF detection.

After these choices are in place, servo power stage, safety, sensing and EMC pages can refine protection, error budgets and compliance without revisiting the core BLDC / PMSM driver architecture.

Choosing the BLDC / PMSM power-stage architecture

The power-stage architecture for a BLDC or PMSM drive typically falls into three integration levels: an integrated driver with on-chip MOSFETs, a gate-driver IC plus external MOSFETs, or an intelligent power module that combines the three-phase bridge, driver and protection in one package. The right choice depends on voltage, current, efficiency, thermal headroom and cost targets for the motor channel.

Integrated driver devices are often sufficient for 12–24 V, low-to-mid current fans, pumps and blowers where compact layout and reduced component count matter more than squeezing every milliohm of R_DS(on). A discrete gate-driver plus MOSFETs becomes attractive as current rises, heatsinking improves and there is a need to optimize conduction and switching loss independently. Intelligent power modules serve higher-power compressors, servos and cabinets where the mechanical design already reserves volume for a dedicated power block.

Once DC bus voltage and phase current corridors reach multi-kilowatt levels, or when brake choppers, DC-link busbars and safety-rated interfaces come into play, the design effectively enters the servo power-stage domain. At that point, this page is used to confirm the driver architecture in broad strokes, while detailed layout, protection and safety integration are refined on the dedicated servo power-stage and protection pages.

• Integrated driver + MOSFETs for compact, lower-power 12–24 V stages.
• Gate driver + external MOSFETs when current, efficiency or thermal margin dominates.
• IPM blocks when a higher-power module with built-in protection and isolation is preferred.

AC induction and linear motor inverter topologies are covered on their own pages. This section stays with three-phase BLDC and PMSM power stages to avoid overlap and keep the guidance focused.

Commutation modes and required driver hooks

BLDC and PMSM stages typically use six-step commutation, sinusoidal control or simplified FOC, and each choice drives a different set of requirements for the driver IC. The driver is expected to provide the appropriate PWM interfaces, dead-time handling and switching behaviour, but also the right hooks for BEMF sensing, Hall inputs and fault signalling so that the control MCU can apply the chosen algorithm without fighting the power stage.

Six-step modes rely heavily on BEMF zero-crossing comparators, blanking windows and simple commutation timing logic inside or around the driver. Sinusoidal and FOC-style operation shift the emphasis toward high-resolution, symmetrical PWM, predictable propagation delay and clean linear drive behaviour over a wide duty range. In all cases, the driver pins and internal blocks must line up with the intended commutation method rather than attempting to compensate algorithm limitations in hardware.

Sensored operation benefits from integrated Hall inputs with level compatibility, filtering and optional sector decoding, while sensorless designs depend on well-placed BEMF sampling points, configurable blanking time and robust comparator hysteresis. This section keeps the focus on these driver-level hooks. Detailed PI tuning, Clarke and Park transforms and observer design are handled on dedicated FOC controller and speed or torque observer pages to avoid duplication.

• Map six-step, sinusoidal and simplified FOC modes to concrete driver features.
• Identify the minimum BEMF and Hall interface capabilities at the driver level.
• Check PWM, dead-time and propagation behaviour against the commutation method.
• Separate algorithm design topics from driver IC feature selection and pinout.

Gate-drive topology, local supplies and built-in protections

The BLDC and PMSM driver has to deliver clean, well-controlled gate signals to the three-phase bridge while respecting supply limits, short-circuit behaviour and dv/dt constraints. At low and medium voltages, high-side bootstrap schemes are widely used, whereas higher bus voltages and strong isolation requirements favour isolated gate-drive architectures. In both cases, the driver data sheet defines the allowable gate charge, peak current and common-mode slew the system can tolerate.

Dead-time control and shoot-through prevention determine how safely the bridge can be operated at the intended PWM frequency. Programmable dead-time ranges, step size and symmetry between high-side and low-side channels influence distortion and torque ripple, especially under sinusoidal or FOC operation. UVLO thresholds on logic and gate-drive supplies protect the MOSFETs from partially enhanced states, and short-circuit protection mechanisms such as desaturation or fast overcurrent detection prevent damage when phase faults occur.

This section focuses on the local gate-drive and protection functions that belong inside or around the driver IC. System-level topics such as DC-link overvoltage, inrush limiting and pre-charge contactor supervision are assigned to the DC link and pre-charge page, while brake-chopper control, dynamic braking and safe-torque-off logic are handled in dedicated protection and STO sections. The goal here is to ensure that the selected driver can support those higher-level functions without constraining safe operation of the bridge itself.

• Choose between bootstrap and isolated high-side drive based on voltage and isolation needs.
• Verify dead-time programmability, shoot-through protection and UVLO behaviour.
• Align short-circuit and fault signalling features with system protection requirements.
• Separate local gate-drive design from DC-link, braking and STO implementation.

Sensing hooks around the BLDC / PMSM driver

The driver IC sits at the centre of several sensing paths around the three-phase bridge. Low-side and phase shunt resistors provide fast overcurrent information and, in some devices, feed integrated comparators or current-sense amplifiers. BEMF and phase-voltage networks connect through dividers and filters either into driver comparators or directly to MCU ADC pins. Fault and diagnostic outputs propagate over a few pins toward the MCU and any safety monitor device and define how quickly the system can react to short circuits, overtemperature and lock conditions.

For low-side shunt sensing, many BLDC and PMSM driver ICs expose dedicated sense inputs, fast comparators and optionally gain-programmable current-sense amplifiers. These blocks allow cycle-by-cycle overcurrent shutdown at the hardware level and generate fault flags for the controller. For inline or phase shunts, the allowable input common-mode range and voltage rating of the driver inputs become critical, and in many designs the detailed conditioning is delegated to separate current-sensing AFEs or isolated amplifiers that then return a suitable signal to the driver or MCU.

On the voltage side, BEMF sampling networks scale and filter the phase voltages into the domains that driver comparators or MCU ADCs can handle. Blanking time, hysteresis and filtering decide how robust sensorless zero-crossing detection will be in the presence of switching spikes and noise. The driver aggregates overcurrent, overtemperature, undervoltage and internal lock conditions into one or more fault outputs that connect back to the MCU and, where required, to a dedicated safety monitor. Error-budget analysis, ΣΔ modulators and fully isolated measurement chains are handled on phase and bus current or voltage sensing pages; this section concentrates on how those functions hook into the driver IC.

• Identify low-side and phase shunt connection points and any integrated comparators or current-sense amplifiers.
• Plan BEMF and phase-voltage dividers and filters so that driver inputs and MCU ADCs operate within safe ranges.
• Define how fault and diagnostic pins from the driver feed the MCU and any external safety monitor IC.
• Leave detailed current-measurement accuracy and isolation design to dedicated sensing pages while keeping driver hooks consistent.

Local layout, EMC and thermal practices around the driver

The BLDC and PMSM driver and the associated three-phase bridge occupy a compact, high-energy corner of the PCB. Local layout choices around this area strongly influence switching noise, EMC, current-sense fidelity and device temperature. Short, tight gate loops, controlled switch-node copper areas and well-routed shunt connections reduce parasitics and radiated emissions. Clean ground referencing between driver logic, power and sensing domains prevents ground bounce from corrupting protection thresholds and measurements.

Gate-drive routing benefits from minimising the loop between the driver, the gate and the source or emitter return, with separate paths for high-current gate loops and low-level sense lines. Switch-node copper should be sized for current and thermal needs but kept away from sensitive traces, and large areas are preferably pushed into inner layers or shielded by ground. Shunt resistors require Kelvin connections so that the driver or AFE senses current without sharing the same path as high di/dt return currents, especially where low-side and phase shunts are combined with fast comparators.

On the ground side, driver logic, power and any analog reference pins should be tied together at a well-defined local star point, often near the shunt or driver thermal pad, instead of being stitched repeatedly across the PCB. Thermal practice around the driver favours solid copper under exposed pads, plenty of vias into inner planes and a modest distance from the hottest MOSFET or module areas to avoid overstressing the IC. System-level EMC strategies, chassis bonding, common-mode chokes and global thermal planning are described on EMC subsystem and thermal sensing pages; this section keeps the focus on layout and thermal details immediately around the driver and bridge.

• Minimise gate-drive loops and control switch-node copper placement near the driver and phase legs.
• Use Kelvin connections for shunt resistors so that sensing paths avoid high di/dt current loops.
• Define a clear local star point between driver logic, power and analog grounds.
• Provide copper and vias under the driver for heat spreading while keeping distance from the hottest power devices.

Application mapping and IC family buckets

BLDC and PMSM driver choices become clearer once the project is mapped into a few typical application families. Low-voltage fans and pumps in the 12–24 V range, 48 V e-bike and power-tool drives, and automotive auxiliary motors sit in very different voltage, current and reliability windows. Each window points toward a preferred driver architecture, such as integrated MOSFET drivers, gate drivers plus external MOSFETs or compact IPM style devices, and narrows the search to a handful of IC family buckets across the major vendors.

For 12–24 V fans, pumps, PC or server fans and many white goods actuators, continuous current and power levels typically favour highly integrated BLDC driver ICs with on-chip MOSFETs and simple six-step or sinusoidal control options. At 48 V and higher currents, such as e-bike hubs, mid-drives and power tools, gate-driver ICs paired with discrete MOSFETs or small IPMs provide more headroom for thermal design, efficiency and protection. Automotive applications including fuel pumps, HVAC blowers, small water pumps and body motors add extended temperature ranges, EMC and diagnostic requirements that push selection toward automotive-grade BLDC drivers or gate-driver platforms.

This section organises those application families by typical voltage and current ranges, recommends the matching driver architecture level and points at representative IC buckets from the major vendors. Subsequent sections can then drill down into specific series and part-number choices, or link directly into RFQ and BOM submission forms. System power supplies, EMC networks and detailed safety strategies remain on their own dedicated pages; the focus here stays on how each application maps to a practical BLDC or PMSM driver family.

• Group projects into a few common BLDC and PMSM application families by voltage, current and duty profile.
• Choose integrated drivers, gate drivers plus MOSFETs or IPMs according to power and thermal demands.
• Align each application family with suitable IC buckets from the primary motor-control vendors.
• Use this mapping as the bridge between system requirements, driver architecture and procurement planning.

Design checklist and IC mapping for BLDC / PMSM drivers

A structured checklist helps convert project requirements into a short list of compatible BLDC and PMSM driver options. Voltage, current and power levels define the basic envelope. Commutation mode and sensing strategy specify which PWM, BEMF and Hall interfaces the driver must expose. Protection features and diagnostic paths must match the safety expectations for consumer, industrial or automotive projects. Layout and thermal constraints influence how much gate-drive current, package style and integration level can be handled comfortably on the PCB.

For each checklist item, it is useful to attach one or more IC family buckets rather than single part numbers. Low-voltage integrated BLDC drivers cover compact 12–24 V fans and pumps. Mid-voltage gate-driver platforms address 36–60 V e-bike or tool drives with discrete MOSFETs. Automotive BLDC and body-motor driver families provide extended temperature ratings, diagnostic coverage and EMC guidance for auxiliary vehicle actuators. Mapping design questions to these buckets makes it easier to prepare RFQs, compare proposals and route shortlisted devices into BOMs and sourcing tools.

This section is intended as a “page in hand” checklist. Engineering teams can walk through system envelope, commutation and sensing, protection level, sensing hooks and layout or thermal constraints, then tie each group of answers to a small number of suitable driver or IPM buckets. The same structure can feed enquiry or BOM forms so that suppliers and distributors can respond with targeted driver suggestions instead of generic catalog lists.

• Capture bus voltage, current, power and thermal constraints in a structured envelope.
• Record commutation mode, sensing style and required driver-side interfaces and hooks.
• Define minimum protection and diagnostic functions by project class and safety needs.
• Map each group of requirements to one or more BLDC / PMSM driver or IPM family buckets for RFQ and BOM work.

BLDC / PMSM driver FAQs

This FAQ section groups the most common questions that come up when planning a BLDC / PMSM driver stage. Each concise answer highlights the key trade-offs and checks so design teams can review options quickly and avoid missing critical hooks on the driver side.

1. How do I decide between an integrated BLDC driver and a gate driver plus external MOSFETs for my motor?

I start from bus voltage, continuous current and peak torque. If the design sits in the 12–24 V and sub-5 A region, an integrated BLDC driver with on-chip MOSFETs usually keeps cost, size and layout effort low. Once current, voltage or thermal stress push past that window, a gate driver plus discrete MOSFETs or an IPM becomes safer.

2. When does it make sense to move from a BLDC / PMSM driver to a full servo power stage or IPM module?

I look at three triggers: power level, required safety and motion performance. Once the system approaches a few hundred watts with tight thermal limits, or needs functional safety features like STO and brake choppers, or demands high-bandwidth FOC with precise current loops, I treat it as a servo application and move to dedicated power-stage or IPM solutions.

3. What should the BLDC / PMSM driver provide differently for six-step commutation versus sinusoidal or FOC operation?

For simple six-step drives, I care most about BEMF zero-cross comparators, blanking time control and robust dead-time handling. When I plan sinusoidal or FOC control, I prioritise high-resolution, symmetric PWM outputs, clean phase-current sense hooks and predictable propagation delays. The driver does not run the control loops but must not limit their achievable quality.

4. How should a BLDC / PMSM driver handle Hall-sensor inputs versus purely sensorless BEMF detection?

With Hall sensors, I prefer drivers that integrate debounced digital inputs and simple decode logic so phase advance and commutation timing stay clean at high dV/dt. For pure sensorless operation, I focus on BEMF input range, comparator hysteresis and configurable sampling windows. In many designs I keep the option to fall back to Hall sensing in difficult start-up conditions.

5. Where should current shunts be placed for a BLDC / PMSM drive, and what support is needed from the driver IC?

I choose between low-side, phase or high-side shunts based on accuracy and protection needs. Low-side shunts pair well with drivers that have fast comparators and cycle-by-cycle current limiting. Per-phase shunts and FOC usually call for clean differential inputs or external AFEs. Whatever topology I pick, the driver must support the common-mode range and offer sensible fault signalling.

6. How does the BLDC / PMSM driver interact with external current and voltage sensing AFEs or isolators?

I treat the driver as the switching element and the AFEs or isolators as measurement front-ends. The driver must provide clear sense pins, reference levels and fault outputs that AFEs can work around. In higher-voltage or isolated designs, most accuracy and isolation work happens in the dedicated sensing chain, while the driver mainly supplies hooks and fast protection paths.

7. What gate-drive capabilities and protection features are essential in a BLDC / PMSM driver for reliable operation?

I look for enough source and sink current to move the chosen MOSFETs quickly without excessive overshoot, well-controlled dead-time, strong undervoltage lockout and fast overcurrent or desaturation protection. Short-circuit events should force predictable shutdown and clear fault signalling. In harsher environments, good dV/dt immunity and bootstrap supply supervision become just as important as raw drive strength.

8. What local layout rules around the driver and three-phase bridge help reduce EMC issues and false trips?

I keep gate loops tight, avoid routing sensitive traces near switch nodes and give shunt sense lines dedicated Kelvin connections back to the driver. The driver, shunt and local ground star point sit close together. Switch-node copper is sized for current but kept away from analog areas. These habits usually cut radiated noise and nuisance overcurrent trips significantly.

9. How should thermal design for the BLDC / PMSM driver and power stage be approached at the PCB level?

On the PCB I start with solid copper under the driver’s thermal pad, plenty of vias into inner planes and short, wide routes to the MOSFETs. The driver is kept close enough for tight gate loops but not in the hottest airflow shadow. For higher power, I plan heat-spreading planes and, if needed, simple heat-sinking or interface pads.

10. Which driver architecture buckets typically fit 12–24 V fans and pumps, 48 V e-bike drives and automotive auxiliaries?

I map 12–24 V fans and pumps to low-voltage integrated BLDC driver families. 48 V e-bike and tool drives usually land in mid-voltage gate-driver platforms with discrete MOSFETs or small IPMs. Automotive pumps, blowers and body motors sit in automotive BLDC or gate-driver families that add extended temperature ratings, diagnostics and EMC guidance.

11. How can a simple checklist be used to narrow down BLDC / PMSM driver families before requesting quotations?

I capture bus voltage, current envelope, commutation and sensing strategy, protection level, sensing hooks and layout or thermal constraints in one short checklist. Each group of answers points to one or two driver buckets instead of dozens of parts. I then send that filled checklist with my RFQ so suppliers respond with focused driver families, not random catalog pages.

12. Which questions about BLDC / PMSM control should be pushed to the motion MCU and observer pages instead of the driver?

I keep PI tuning, Clarke and Park transforms, FOC bandwidth, speed and torque observers and sensor-fusion logic squarely in the motion-MCU and observer domain. The driver is responsible for clean gate signals, sense hooks and protection. Whenever a question involves maths, firmware timing or CPU load, I treat it as a controller topic, not a driver feature.