Adapter Primary Controller for Startup, Burst and Valley Switching
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This page focuses on the offline adapter primary controller: how startup and VCC bias, burst and valley modes, spread-spectrum behavior and standby current targets shape efficiency, EMI and reliability across adapter designs.
Positioned for engineers and sourcing teams comparing adapter primary controllers rather than PFC, synchronous rectifier or secondary DC-DC solutions.
What this page solves
Many adapter projects now have to hit aggressive standby power limits while still starting reliably across wide AC ranges and cable drops, staying quiet in audio and EMI bands, and keeping transient response within protocol and load expectations. The primary controller that sits on the high-voltage side is where these constraints converge.
If the VCC startup path and handover to the auxiliary winding are not designed coherently with the controller’s thresholds and startup current, the adapter may never reach regulation, may chatter around VCC(on)/VCC(off), or may reboot whenever a heavier load is plugged in. These are not rare corner cases; they show up in low-line regions, long cable runs and high inrush loads.
At light or no load, the way the primary controller enters and leaves burst or valley-related low-power modes can make the difference between a quiet, efficient adapter and a noisy, marginal design. Poorly damped burst patterns or crude frequency foldback can:
- Drop the effective switching envelope into the audible range and produce tonal whine.
- Crush light-load efficiency precisely where end-users leave chargers plugged in for hours.
- Shift energy into EMI bands where the input filter has less attenuation, increasing the chance of test failures.
This page does not attempt to re-derive flyback or LLC waveforms or magnetics formulas. Instead, the focus is on the primary controller itself: how its startup and VCC architecture works, which burst and valley strategies it uses, how spread-spectrum features reshape the conducted spectrum, and which standby current figures are realistic for meeting sub-75 mW or similar targets.
The discussion is framed around the adapter power ranges where these trade-offs matter most:
- 5–65 W wall-wart and compact chargers.
- 65–300 W desktop and in-line adapters.
- High-density fast chargers and notebook adapters where the primary controller coordinates with PFC and resonant stages.
- Phone & tablet chargers
- Notebook adapters
- Fast-charge bricks
System context & primary controller’s place in the adapter
In a simple flyback-based adapter, the primary controller sits just after the rectified mains. AC input passes through the EMI filter and bridge rectifier into the bulk capacitor, forming a high-voltage DC bus. The primary controller drives the main MOSFET or GaN switch on the transformer primary, senses current through a shunt on the source or return path, and interprets an isolated feedback signal that represents the output regulation target.
In higher power adapters with a PFC front end and a resonant or quasi-resonant stage, the picture expands. A PFC controller shapes the mains current and regulates an intermediate DC link, but it is still the downstream primary controller behind the isolation transformer that dictates how the adapter starts, how it behaves at light load, and where switching losses and EMI signatures fall within the spectrum.
The primary controller interacts with the rest of the system through a small set of critical hooks:
- Gate drive: drives the primary MOSFET or GaN switch with the required current and edge rates, directly influencing switching loss, dv/dt stress and EMI.
- Current sense: monitors primary current through a resistor or sense element to provide cycle-by-cycle protection and to support peak or valley-based control modes.
- Feedback and compensation: receives a representation of output voltage and sometimes current through an optocoupler or digital isolator, steering duty cycle, frequency and burst or skip behavior.
- VCC and startup bias: draws initial energy from a high-voltage startup network or resistor and later hands off to an auxiliary winding, tying startup strategy and standby consumption together.
- Protection and mode pins: set brown-in/brown-out thresholds, over-voltage and thermal behavior, and sometimes select different operating or burst modes.
Topics such as detailed PFC design, synchronous rectifier drive and multi-rail secondary conversion live in their own application pages. The focus here stays on how the primary controller attaches to the AC-DC path and how its pins, thresholds and operating modes need to be interpreted when choosing or substituting a controller for a given adapter architecture.
Startup & VCC supply architecture
The primary controller only exists on the schematic once its VCC rail reaches the enable threshold and stays above the turn-off level. How that VCC rail is charged, handed over to the auxiliary winding and held in regulation determines whether the adapter starts reliably at low line, survives heavy plug-in loads and still meets standby power limits.
Three startup architectures are common in offline adapters. Each one trades startup time, low-line robustness and standby power in a different way, and the differences are often visible in the controller’s VCC(on), VCC(off) and startup current numbers.
Resistor startup with VCC capacitor and auxiliary handover
In the classic scheme, a high-value resistor from the rectified HV bus charges the VCC capacitor until the controller reaches VCC(on). Once switching begins, an auxiliary winding and rectifier take over and keep VCC between the on and off thresholds. The resistor then becomes a leakage path that mainly affects standby power.
- A higher startup resistor value slows the VCC ramp and reduces standby loss but makes low-line startup more difficult.
- A larger VCC capacitor smooths VCC ripple but extends startup time and can interact with low startup current.
- Poor auxiliary winding design leaves little VCC margin at light load, causing the controller to hover near VCC(off) and chatter.
Controllers with an internal HV startup cell
Many modern controllers integrate a high-voltage startup cell that pulls current directly from the HV bus into VCC. The cell supplies a controlled startup current until the auxiliary winding can take over, then either shuts down or falls back to a very low leakage state.
- A well designed HV cell allows a large external startup resistor or even no discrete resistor, easing standby power constraints.
- Startup current is more predictable, which improves low-line behavior, but must still be high enough to charge CVCC and support initial switching under realistic load.
- Datasheets sometimes note residual HV cell leakage; this can become a significant part of no-load power if not considered.
Digital controllers with external bias converters
Digitally controlled adapters and server supplies often use a dedicated bias converter to feed a microcontroller or digital PSU controller. Startup now depends on the bias converter, the digital controller’s power-on reset behavior and the main power stage all lining up in the correct sequence.
- Bias converters introduce another startup loop that can limit low-line capability or add delay before the main power stage comes alive.
- The digital controller may require clean power-good and reset timing, otherwise it can latch in an undefined state even if the bias rail is present.
- Standby power is driven both by the bias converter efficiency and the digital controller’s idle consumption, not just the primary power stage.
Key thresholds, timing and standby power
Two voltage thresholds frame the startup story: VCC(on), where switching begins, and VCC(off), where the controller shuts down and waits for another charge cycle. A narrow hysteresis window between them can make VCC vulnerable to ripple and auxiliary variations, while an excessively wide window stretches startup time and low-line requirements.
Startup time is often approximated by how long it takes to charge the VCC capacitor from its initial
value to VCC(on) with the net charging current. A simple estimate is:
tstart ≈ CVCC × (VCC(on) − VCC(initial)) ÷ Icharge,
where Icharge is the current available after subtracting the controller’s own startup
consumption.
The startup network also sets a floor for standby power. For a resistor-based scheme fed from a rectified
mains level VDC, the average resistor dissipation can be estimated as:
PRstart ≈ k × VDC2 ÷ Rstart,
where k reflects rectified waveform duty (often around 0.5–0.7). High-value resistors and HV startup
cells exist to push this term down without sacrificing reliable startup.
Typical failure signatures include adapters that start at 230 Vac but fail at low-line, units that reboot when a heavy load is plugged in, or designs that meet efficiency goals but stubbornly miss no-load power limits. In each case, the root cause is usually a mismatch between VCC thresholds, startup current, VCC capacitance, auxiliary winding behavior and the chosen startup architecture.
Burst and skip modes for light-load efficiency
Once the adapter is regulating, most users experience it at light or no load for the majority of its lifetime. The primary controller therefore spends much of its time in reduced-power modes where switching patterns are altered to cut losses. How these modes are implemented determines not only energy savings but also audible noise, EMI signatures and output ripple.
Three broad categories of light-load behavior appear in controller families: burst mode with groups of switching pulses followed by idle gaps, frequency foldback where switching becomes slower but continuous, and valley or skip modes where the controller only turns on at selected valleys of the drain waveform.
Burst mode switching
In burst mode the controller lets the output voltage rise toward an upper threshold using a group of regular switching pulses, then completely stops switching until the output decays to a lower threshold. The cycle repeats with a burst frequency often in the hundreds of hertz to a few kilohertz range.
- Switching and magnetics losses during the idle interval drop to almost zero, so low-load efficiency improves significantly.
- The envelope of burst and idle intervals introduces low-frequency components that can fall in the audible band and in the low-frequency part of conducted EMI measurements.
- Output voltage follows a sawtooth or stepped pattern between the upper and lower thresholds, which can bother sensitive loads or protocol tolerances if the window is too wide.
Frequency foldback
With frequency foldback, the controller keeps switching continuously but reduces the average switching frequency as load falls. Current per pulse may also decrease, but the key change is that energy is delivered in smaller, more spread-out packets instead of bursts separated by idle gaps.
- Output ripple remains comparatively smooth and easier to filter, since energy delivery never stops entirely.
- If the folded-back frequency remains comfortably above 20 kHz, audible noise risk is low; dropping into a few kilohertz range reintroduces mechanical noise concerns.
- The EMI filter is tuned around a typical switching band; large downward frequency shifts may expose bands where attenuation is weaker and compliance margins shrink.
Valley and skip-based modes
Valley-based modes rely on the drain or primary waveform ringing down after each cycle. The controller senses the voltage valleys and triggers turn-on at or near a valley to reduce dv/dt and switching loss. At light load the controller may skip one or more valleys between switch events, effectively lowering the average frequency while keeping turn-on aligned with low-stress points.
- Valley turn-on can significantly reduce turn-on loss and EMI by switching at lower drain voltage.
- Skipping valleys creates a non-uniform switching pattern; the resulting spectrum can be more complex than a simple fixed-frequency or burst mode pattern.
- Output ripple and loop behavior can change abruptly when the controller transitions between “every valley” and “every Nth valley”, so compensation and minimum load requirements must be checked.
Efficiency, EMI, audible noise and ripple trade-offs
Burst mode generally offers the lowest no-load power but needs careful tuning of entry and exit thresholds and burst-window limits to keep audible noise and envelope ripple acceptable. Frequency foldback delivers more predictable ripple and loop behavior at the cost of somewhat higher losses. Valley and skip modes offer strong switching loss reductions but can introduce narrow operating regions where noise or ripple become visible only under certain load conditions.
Datasheets provide hints about these behaviors through parameters such as burst mode entry and exit thresholds, minimum on-time and off-time, the guaranteed no-load power at a given mains voltage and the minimum switching frequency at light load. These numbers should be read as system-level design inputs, not as minor implementation details.
Valley turn-on and EMI / loss trade-offs
Once the flyback or resonant stage enters discontinuous operation, the MOSFET drain no longer sits at a fixed off-voltage. After each energy transfer the leakage inductance and parasitic capacitances form a resonant tank, and the drain voltage rings down through a series of valleys. Valley turn-on takes advantage of this ringing by delaying the next gate pulse until the drain voltage reaches a local minimum, reducing turn-on loss and dv/dt stress compared with hard switching.
Valley switching is naturally associated with quasi-resonant and critical-conduction modes, where the controller waits for magnetizing current to return to zero and then looks for a voltage valley. Many modern controllers also extend valley detection into light-load DCM, scanning the drain waveform for one or more valleys before turning on, so that even small-load operation benefits from lower switching loss.
From hard switching to valley turn-on
In a hard-switched design the controller issues the next gate pulse at a fixed interval based on the desired switching frequency. The drain voltage at that instant can be close to the reflected output voltage plus input, so the MOSFET is turned on against a high VDS and substantial dv/dt. Turn-on loss grows with both current and drain voltage, and the sharp edge excites conducted and radiated EMI as well as mechanical noise in the transformer.
With valley turn-on, the controller senses the drain ringing after each turn-off and purposely aligns the next gate pulse with a valley point where VDS is significantly lower. The MOSFET then transitions at reduced voltage, cutting turn-on loss and softening dv/dt. Effective valley switching can move the design closer to zero-voltage switching on the primary side without requiring a full resonant converter topology.
Sensitivity to parasitics and load conditions
The timing of each valley is set by the resonant combination of leakage inductance and parasitic capacitances, including MOSFET Coss, winding capacitances and layout-related capacitances. These values vary with transformer design, device selection, temperature and production tolerances. The controller’s internal valley-detection circuitry must cope with this spread while still identifying a stable point for turn-on.
Load current also shifts valley spacing. As load decreases, less energy is left in the leakage path and the ringing decays more quickly, causing valley positions and amplitudes to change. In the mid-load region, transitions between different conduction modes can create sharp changes in effective switching frequency as the controller jumps from one valley index to another. If the control loop and output filter were tuned with a fixed-frequency mindset, these frequency steps can show up as unexpected ripple or transient overshoot.
Valley detection itself introduces delays. The controller must sense the drain voltage, detect zero crossings or minima and then schedule a gate pulse with finite propagation delay. If this delay is not accounted for in the design, the actual turn-on point can drift away from the intended valley, reducing the benefit and sometimes creating a “half-soft, half-hard” behavior that is harder to debug.
Key controller parameters around valley switching
Datasheets describe valley-related behavior using a mix of frequency limits and qualitative statements. The minimum and maximum switching frequencies define the operating window in which valley detection and conduction-mode transitions occur. A very low minimum frequency can improve light-load efficiency but may move operation into or near the audible range; a very high maximum frequency tightens EMI and loss budgets at full load.
Many controllers state which valley is used at nominal load, such as “1st valley turn-on”, and how valley order changes with load. Locking to the first valley generally yields higher frequency and somewhat higher loss but more predictable timing. Moving to the second or third valley lowers switching loss and frequency but makes the design more sensitive to parasitic variation and can bring the switching band closer to audio and to low-frequency EMI limits.
Valley lockout and skip strategies describe how the controller behaves at light load. Some devices always use the first valley but skip entire switching cycles to reduce frequency, while others deliberately lock to second or third valleys when load current falls below a threshold. These behaviors change the spectrum of the drain waveform and should be understood alongside burst and foldback modes when planning EMI and acoustic performance.
A practical design exercise is to ask whether the chosen transformer, leakage inductance and parasitic environment allow valley switching to deliver consistent benefits across the expected load and mains range. If valley timing becomes too erratic, the controller may still work functionally but the promised reductions in loss and EMI will not materialize in production.
Spread-spectrum and conducted / radiated EMI
Even when topology, layout and filtering are sound, conducted EMI measurements often reveal a few narrow peaks that sit slightly above the limit line while surrounding frequencies pass comfortably. Spread-spectrum switching attacks this problem by moving the dominant switching frequency over a small range so that energy is distributed across neighboring bins rather than concentrated at a single frequency.
Most adapter-oriented controllers implement spread-spectrum by frequency modulating the switching oscillator around a nominal center. Modulation can be periodic, such as a slow triangular sweep, or pseudo-random, where the period-to-period variation follows a deterministic but noise-like sequence. Either way, the goal is to flatten narrowband peaks in the EMI spectrum without compromising regulation.
Frequency modulation approaches
In a triangular or sawtooth scheme the controller slowly sweeps the switching frequency between Fmin and Fmax around a nominal value. Each EMI measurement bin then sees the switching energy only part of the time, which reduces the measured quasi-peak or average level compared with a fixed-frequency design. The modulation depth and rate are chosen so that regulation loops view the frequency as effectively constant while the EMI receiver integrates across the swept band.
Pseudo-random modulation uses a small change in switching period derived from a pseudo-random sequence. The instantaneous frequency hops within a bounded range instead of following a smooth ramp. This approach tends to break up discrete lines in the spectrum and replace them with a broader noise-like hump, which can be easier to pass against narrowband limits.
Some controllers enable spread-spectrum only in specific modes, such as full-load operation where conducted EMI is most critical, or disable it during low-power modes where interactions with audio paths or communication channels would be undesirable. Designers should confirm under which conditions spread-spectrum is actually active rather than assuming it operates continuously.
Practical considerations for control and compliance
Because spread-spectrum moves the effective switching frequency, control-loop design should reference the center frequency and verify stability across the full modulation band. For small modulation depths typical of adapter controllers, phase and gain margins usually remain acceptable, but aggressive spreads can shift resonances and change how the power stage interacts with output filters.
EMI standards and receivers use specific bandwidths, detector types and averaging times. Spread-spectrum does not remove conducted emissions; it redistributes them. Depending on the test setup, the receiver may still integrate a significant portion of the swept energy, so input filters and layout cannot be relaxed to the point where fixed-frequency emissions would already be over the limit.
Distributing energy also means that some portion is pushed into lower or higher frequency regions where limits differ. If modulation pushes content into bands with tighter limits, the net benefit may shrink or even reverse. The most reliable approach is to treat spread-spectrum as a margin-improvement feature for well-filtered designs, not as a substitute for common-mode chokes, X and Y capacitors or careful return path control.
When comparing primary controllers, it is useful to know whether spread-spectrum can be enabled or disabled via configuration, what modulation depth and rate are used, and whether the feature applies only to the primary stage or also to PFC or secondary converters. These details determine how much control the designer has during late-stage EMI tuning.
Ultra-low standby and regulatory targets
Modern chargers and adapters are expected to sit comfortably in sub-75 mW and sub-100 mW no-load classes while still offering fast startup and reliable behavior at low line. Whether those targets are met in production depends on the standby power budget across the entire architecture, but the primary controller largely sets how low the design can realistically go.
In standby, every microamp flowing into the VCC rail, startup path, feedback chain and indicator circuits directly translates into milliwatts at the mains. A controller that advertises ultra-low standby current is helpful only if the startup network, auxiliary winding and feedback components are selected and dimensioned with the same budget discipline.
Standby power budget perspective
A practical way to approach ultra-low standby is to break the total target into a series of budget slices. Typical contributors include the VCC bias and startup network, the primary controller’s own supply current, the feedback and optocoupler loop, and any external sensing or indicator circuits that remain active at no-load.
The VCC and startup slice covers the resistor or leakage path from the rectified mains, any residual current from a high-voltage startup cell, and dissipation in the auxiliary winding rectifier and VCC clamp. The controller slice is dominated by its operating or green-mode supply current and any additional consumption from valley detection, zero-crossing comparators and housekeeping logic that remain active in standby.
On the secondary side, the feedback slice includes the optocoupler LED current, the reference or error amplifier bias current, and the bleed through the divider that senses output voltage. Indicator and peripheral slices cover LED status lamps, plug-detect circuits, and idle consumption from protocol controllers such as USB-C or protection ICs that cannot be fully shut down.
For a sub-75 mW target, it is common for the VCC/startup and controller slices together to consume roughly half of the budget. If these two pieces are not optimized first, it becomes very difficult to recover the margin by squeezing feedback or indicator currents alone.
Controller features that enable ultra-low standby
Ultra-low standby support starts with low startup and green-mode supply current. A controller that can charge the VCC capacitor with only a few hundred microamps from the startup path allows a higher-value resistor and therefore lower leakage once the adapter is running. In standby or skip modes, the VCC supply current should drop to tens or low hundreds of microamps so that the VCC rail can be maintained with very little power.
Light-load modes such as burst, skip and frequency foldback reduce average switching activity and magnetics loss without sacrificing regulation. When coordinated with valley switching and soft-start, they allow the adapter to deliver energy in short, infrequent packets at no-load while avoiding excessive ripple or audible noise. Jitter or spread-spectrum can sometimes be kept active in these modes so that EMI peaks are still flattened even when the switching frequency is low.
Many controllers also help by shutting down subsystems that are unnecessary in deep standby. Examples include disabling synchronous rectifier drive, reducing the sampling rate of drain-sense or current-sense comparators, and providing enable pins or control signals that let secondary-side bias converters and protocol controllers enter their own low-power states.
Practical design tips and pitfalls
When choosing a controller with an internal high-voltage startup cell, it is important to verify how the cell behaves after handover to the auxiliary winding. A true shutdown state with only microamp-level leakage is very different from a “reduced current” state that still draws milliamps from the HV bus in standby. Any residual current on the high-voltage pin should be treated as a fixed overhead in the standby budget.
Auxiliary winding behavior at low load deserves the same level of attention. If the auxiliary voltage rises too high when the primary is lightly loaded, the VCC clamp or regulator will burn away the excess, consuming tens of milliwatts in the process. If it falls too low, the controller may hover near its UVLO threshold and chatter between on and off states, causing both functional issues and extra switching loss. Winding ratios, output voltage and VCC clamp design should be chosen so that VCC stays in a comfortable band from low to high line under no-load conditions.
On the secondary side, the feedback loop should have an explicit low-power operating point. Optocoupler LED current can often be reduced to a few hundred microamps at no-load, and low-bias references or error amplifiers help limit the associated overhead. Divider resistor values should be high enough to meaningfully reduce dissipation while staying within noise and leakage constraints.
Indicator and interface circuits can quietly dominate the standby budget if left uncontrolled. Constant current LED indicators, always-on USB-C controllers or monitoring ICs can individually consume more power than the optimized primary controller. Simple strategies such as pulsed LED drive, gating interface supplies and using low-power variants of interface ICs are often required to hit aggressive sub-75 mW or sub-100 mW targets.
An adapter that claims ultra-low standby performance is therefore the result of a complete system budget: the primary controller must support low startup and standby currents and flexible light-load modes, and the startup, auxiliary and feedback networks must be designed to take full advantage of those capabilities.
Recommended IC role mapping for adapter primary controllers
Adapter primary controllers span a wide range of power levels, topologies and feature sets. Mapping parts into clear roles helps engineers and sourcing teams compare options and understand which capabilities are essential for a given adapter platform. The examples below illustrate typical controller categories and representative part numbers rather than a complete list of available devices.
Low-power flyback controllers for chargers (5–30 W)
Low-power chargers and wall-wart adapters often rely on compact flyback controllers, with or without an integrated MOSFET. These devices prioritize low standby power, simple external components and robust protections in a small footprint. Some integrate a high-voltage startup cell and optimized burst or skip modes to support sub-75 mW no-load classes.
| Example part | Topology / range | Key features |
|---|---|---|
| PI LNK320x (LinkSwitch-TN2) | Integrated MOSFET flyback / up to tens of watts | HV startup cell, cycle skipping, basic protection |
| PI TNY280x (TinySwitch-4) | Low-power off-line flyback with internal FET | Auto-restart, current limiting, standby optimization |
| ST VIPer06 / VIPer17 series | Primary flyback with integrated MOSFET | HV startup, burst mode, wide-range input operation |
| TI UCC28730 | External MOSFET flyback controller for chargers | Primary-side regulation, valley switching, ultra-low standby |
When selecting low-power controllers, important dimensions include the supported power range and peak current, whether a high-voltage startup cell is integrated, the presence of valley switching and burst or skip modes, VCC operating range relative to the planned auxiliary winding and the controller’s standby current level for sub-75 mW or sub-100 mW targets.
Mid-power offline controllers (30–150 W)
Mid-power adapters and small desktop supplies move beyond simple integrated-FET controllers and use external MOSFETs, quasi-resonant control and more complete protection. Controllers in this range often support valley turn-on, frequency foldback and comprehensive brown-in/brown-out behavior, and must coordinate with synchronous rectifiers and possibly a simple PFC stage.
| Example part | Topology / range | Key features |
|---|---|---|
| TI UCC28600 | Quasi-resonant flyback, up to ~100 W | Valley switching, frequency foldback, full protection set |
| ON Semi NCP1382 / NCP13892 | QR flyback for adapters and TV supplies | Valley lock, skip cycle, brown-in/out, OPP/OTP |
| ST L6566B / L6566A | Transition-mode flyback and LLC drivers | Valley detection, burst mode, synchronized SR drive support |
For mid-power controllers, selection revolves around supported topologies, valley switching behavior, frequency range, standby modes and how well the device interfaces to synchronous rectifier controllers and any upstream PFC or input conditioning stages. Brown-in/brown-out thresholds and fault response are critical to avoid nuisance restarts at low line.
High-performance controllers for notebook and fast chargers (65–300 W)
Notebook and fast chargers typically use a PFC plus LLC or advanced flyback architecture, often with GaN or fast silicon switches and tight thermal margins. Primary controllers in this space must coordinate multiple modes, interact with PFC controllers and synchronous rectifiers, and support detailed protection and timing control.
| Example part | Topology / role | Key features |
|---|---|---|
| TI UCC28780 | High-performance flyback with valley switching | Valley turn-on, multimode operation, optimized for GaN FETs |
| TI UCC256403 / UCC256404 | LLC resonant half-bridge controllers | Adaptive dead-time, burst and skip modes, full protection |
| ON Semi NCP13992 | Resonant half-bridge controller for high-density adapters | Multi-mode, adjustable frequency, integrated protections |
In the 65–300 W range, key selection criteria include supported LLC or flyback topologies, multi-mode control behavior across light and heavy load, valley or near-ZVS switching capability, coordination with PFC and synchronous rectifier stages, and the protection set for fault coverage and safe restart behavior.
Digitally configurable primary controllers
Between purely analog controllers and fully digital PSU controllers lies a class of digitally configurable primary controllers. These devices retain analog or mixed-signal PWM cores but expose configuration registers or one-time programmable memory so that key thresholds, soft-start ramps, burst windows and protection levels can be adjusted without hardware changes.
| Example part | Topology / interface | Key features |
|---|---|---|
| Infineon XDPL8219 | Digital PFC + flyback combo with configuration interface | Parametric configuration, multi-mode control, integrated protections |
| PI INN3370C (InnoSwitch4-Pro) | Highly integrated flyback with I²C configuration | Digital setpoints, telemetry hooks, simplified adapter design |
| TI UCD3138 | Digital power controller for PFC/LLC stages | Programmable control law, PMBus interface, rich telemetry |
Digitally configurable controllers are useful when a single hardware platform must serve multiple output power or voltage variants, or when in-system tuning and telemetry are required without migrating to a full digital power architecture. Design teams should consider the complexity of the configuration interface, the need for an external microcontroller and the fail-safe behavior if configuration data are missing or corrupted.
BOM hooks and substitution rules
When adapter designs rely on specific controller features, those features should be explicitly captured as BOM hooks to guide cross-references and substitutions. For example, a primary that uses valley switching to meet MOSFET stress and EMI margins should not be replaced with a simple fixed-frequency controller lacking valley capability without a full redesign of the power stage and filter.
For supplies labeled with sub-75 mW or sub-100 mW no-load performance, alternative controllers must match or exceed the original standby supply current specification and be compatible with the existing startup and VCC architecture, including any high-voltage startup cell behavior and UVLO thresholds. Substituting a controller with higher bias current or different startup requirements can silently break standby targets or low-line startup margins.
Designs that depend on burst, skip or spread-spectrum behavior to pass EMI or acoustic limits should document those dependencies so that cross-references preserve equivalent light-load modes. Replacement devices that lack similar modes may still function but can miss EMI margins, exhibit audible noise or compromise efficiency at typical load profiles.
Capturing these hooks in the adapter primary controller row of the BOM helps ensure that engineering intent survives sourcing changes and that substitutions preserve both compliance and user-visible behavior, not just pinouts and basic ratings.
Design checklist & handover to sourcing
This checklist turns the previous sections into a practical self-review tool for adapter primary controllers. It helps verify that the chosen controller and power stage architecture match real system requirements, and it also provides a ready-made structure for sharing key information with sourcing teams or external partners when evaluating alternatives and second sources.
A. Architecture & ratings
Output and power class
- Target output rails and power are defined (V, A, total W, continuous vs peak).
- Adapter category is clear (e.g. 5–18 W charger, 30–90 W desktop adapter, 65–300 W notebook / fast charger).
Input voltage and regions
- AC input range is fixed (single 230 Vac / single 115 Vac / 90–264 Vac / other).
- Mains tolerance, surge and line dip expectations are defined for target countries / regions.
Topology and PFC architecture
- Primary topology is chosen (non-resonant flyback / QR flyback / LLC half-bridge / other).
- PFC stage is defined (none / separate PFC controller / combo with primary controller).
- The primary controller role in the stack is clear (flyback only / LLC only / PFC + DC-DC combo).
Environment and thermal constraints
- Ambient temperature range and enclosure type are documented (e.g. 0–60 °C, fanless, slim adapter housing).
- Thermal margins and expected worst-case component temperatures are understood.
B. Control features & protections
Light-load behavior and EMI
- Light-load efficiency targets are defined (e.g. efficiency at 10 % load, typical usage profile).
- Burst or skip mode is required to meet light-load efficiency and standby targets.
- Audible noise limits under burst / skip operation are considered for the end-use environment.
- Valley turn-on is required to meet MOSFET stress and EMI margins for the current transformer and layout.
- Spread-spectrum or jitter is required to gain extra conducted EMI margin at problematic frequencies.
Standby power and green modes
- No-load / standby power class is defined (e.g. sub-75 mW, sub-100 mW, standard tier).
- Primary controller standby supply current supports the chosen no-load class.
- Startup / VCC architecture (HV startup cell vs resistor + auxiliary handover) is verified against the standby power budget.
- Auxiliary winding behavior at low load keeps VCC within safe limits without excessive clamp dissipation.
Protection strategy
- Short-circuit and overload behavior is defined (latched shut-down, hiccup retry, constant current limit).
- Over-temperature protection is defined (internal sensor / external NTC / system-level OTP).
- Brown-in / brown-out thresholds are compatible with the mains profile and avoid nuisance restarts.
- Feedback / optocoupler faults (open / short / reference failure) lead to safe, predictable behavior.
Configurability and digital control
- Need for digital configuration is defined (none / OTP only / I²C / PMBus).
- Requirements for factory or field re-trim (e.g. power level, output setpoints, protection thresholds) are documented.
- Available MCU or supervisor resources for configuration and telemetry are known.
C. Interfaces & system integration
USB-C / PD / PPS coordination
- Presence of USB-C / PD / PPS controller is confirmed (yes / no / future option).
- Required handshake signals are defined (enable, power-good, fault, status signals).
- Timing between primary soft-start, output ramp and PD negotiation is understood.
GaN and gate-drive interfaces
- Use of GaN or fast MOSFET drivers on the primary side is defined.
- Gate driver supply voltage, gate charge and drive strength are compatible with the controller’s outputs.
- Dead-time, turn-on and turn-off timing requirements are specified for the chosen devices.
Secondary and digital PSU coordination
- Synchronous rectifier controller interfaces are defined (sync timing, disable pins, fault signaling).
- Coordination points with secondary DC-DC stages or digital PSU controllers are documented.
EMI and safety margins
- Target EMI standard and desired margin are defined for conducted and radiated tests.
- Creepage, clearance and insulation strategy are compatible with the chosen topology and power level.
D. Handover to sourcing & RFQ preparation
Once the checklist above is filled, the most important items for sourcing or for evaluating primary controller alternatives can be summarized in a short handover list. This avoids repeated back-and-forth on basic specs and lets the discussion move directly to transformer design, GaN options and compliance margins.
Ready-to-send summary for sourcing / cross-reference
- Current or candidate primary controller part number(s).
- Target output power and rails, plus mains input range (e.g. 65 W, 90–264 Vac).
- No-load power class and key regulatory markets (e.g. sub-75 mW global adapter).
- Chosen topology and PFC architecture (flyback / QR flyback / PFC + LLC / other).
- Must-have control features (valley switching, burst / skip behavior, spread-spectrum, GaN readiness, digital configuration).
- Critical protection and startup behaviors that must be preserved (OVP/OCP/OTP, brown-in/out, standby behavior).
If there is already a target BOM or an existing primary controller that needs a replacement, collecting the current part number, output power, mains range and no-load power targets using this checklist is often enough for ICNavigator to propose compatible primary controllers and drop-in alternatives that preserve standby, protection and EMI margins.
Sharing this structured information with sourcing teams or external partners keeps engineering intent visible during cross-references and helps prevent substitutions that accidentally remove valley control, weaken protection or break standby and regulatory targets, even when footprints and headline ratings appear similar.
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Adapter primary controller FAQs
Q1. When does an adapter really need a primary controller with an HV startup cell instead of a simple startup resistor?
An HV startup cell is valuable when the adapter must start reliably from wide-range 90–264 Vac, meet sub-75 mW or sub-100 mW no-load targets, or fit in a very small form factor. It lets you use a higher-value startup resistor, reduce leakage at high line and keep startup time controlled, especially under low-line and heavy-load cold start conditions.
Q2. How can you predict whether a controller’s burst or skip mode will create audible noise in a charger or adapter?
To estimate audible noise risk, you check the effective burst or skip repetition frequency and see whether it falls in the 2–20 kHz band, then review the entry and exit thresholds in the datasheet. You also test at light loads near protocol hold currents, because magnetics, loose windings and enclosure mechanics can amplify otherwise mild burst-induced vibration.
Q3. What constraints does valley turn-on place on the transformer and leakage inductance design in a flyback adapter?
Valley turn-on relies on predictable ringing between leakage inductance and parasitic capacitances, so the leakage cannot be arbitrarily high or extremely low. Too much leakage narrows the timing window and shifts valleys with load, while too little causes fast ringing that is hard to detect. You usually confirm the design by measuring drain waveforms over line and load.
Q4. Can spread-spectrum on the primary controller alone fix EMI issues without changing the input filter?
Spread-spectrum is best treated as a way to shave peaks and gain margin, not as a substitute for a proper EMI filter. It redistributes energy over a small frequency band, so average levels drop but total noise power stays similar. If the base design significantly exceeds limits, you still need filter changes, layout improvements or lower dv/dt switching strategies.
Q5. Which primary controller datasheet parameters matter most when targeting sub-75 mW no-load power in an adapter?
For aggressive no-load targets, you focus on startup current, green-mode or standby VCC supply current, and any specified no-load consumption examples. You also confirm whether the HV startup cell truly shuts off after handover, and check the recommended VCC architecture. These parameters must match the auxiliary winding design and feedback chain to close the entire standby budget.
Q6. In a PFC + LLC adapter, how should the primary controller coordinate startup sequencing with the PFC stage?
Typical sequencing brings up the PFC stage first, establishes a stable DC bus and then enables the LLC or downstream primary controller. You usually monitor a PFC OK or bus-voltage signal and enforce brown-in thresholds that separate low-line behavior from genuine PFC faults. This avoids stressing magnetics and switches with LLC startup on an unregulated or sagging bus.
Q7. How do you keep output voltage within USB charging protocol limits while the primary runs in burst or skip mode?
You choose burst entry and exit thresholds so that the protocol controller always sees voltage inside its valid window, then size output capacitors and compensation to limit low-frequency ripple during idle periods. It also helps to test around hold currents and cable drops, checking that negotiated profiles remain stable and that protocol sampling does not misinterpret burst-induced sag.
Q8. When cross-referencing a primary controller, which protection thresholds and valley or burst behaviors must remain compatible?
Cross-references should maintain Over-current, Over-power, Over-voltage and UVLO thresholds within acceptable tolerance, and keep brown-in/out points aligned with the existing mains profile. Valley switching or equivalent soft-switch capability should be retained, and the minimum burst frequency must stay clear of acoustic and EMI risk bands. Otherwise, substitutions can quietly break stress margins and compliance, even with similar pinouts.
Q9. For high-power fast chargers, when does it make sense to move from a simple analog controller to a digitally configurable primary controller?
A digitally configurable primary makes sense when one hardware platform must cover multiple power levels or output profiles, or when factory and field tuning of protection thresholds, dynamic response and setpoints is required. It also helps when telemetry, logging and remote diagnostics are important. If the design is fixed and simple, an analog controller often remains more cost-effective.
Q10. How can you make sure an adapter still starts reliably at the lowest AC input voltage in its rating?
Reliable low-line startup depends on sizing the startup resistor and VCC capacitor for the lowest mains voltage, checking the controller’s VCC(on) threshold and verifying the HV startup cell operating range. You also test cold-start at maximum load with realistic line impedance. If the adapter marginally starts only at nominal line, more startup current or different thresholds are needed.
Q11. Does a primary controller’s internal spread-spectrum or jitter affect loop compensation, and how much margin is needed?
Modest spread-spectrum depth usually leaves loop compensation intact, but you still verify gain and phase margins at the minimum, nominal and maximum switching frequencies. If the modulation range crosses resonances in the output filter or EMI network, extra margin is advisable. Compensation should tolerate the full specified frequency band, not just the nominal switching point in the datasheet.
Q12. How can one adapter PCB support multiple output power levels and different no-load power regulations across regions?
A shared PCB can support several power levels by combining a flexible primary controller with transformer and resistor options, or with OTP and digital configuration. You define variants with different output ratings, no-load targets and indicator circuits while reusing magnetics and layout as much as possible. Clear standby budgets and a structured checklist keep region-specific regulation versions under control.
