What this page solves

This page focuses on how current and voltage sensing are deployed inside power supplies and adapters, from offline AC–DC adapters and USB-C chargers to server PSUs and PoE or 24 V industrial front-ends. The goal is to show where accurate sensing really matters, what can go wrong when it is treated as an afterthought, and how shunts, isolated amplifiers, sigma-delta modulators and precision references fit into a coherent sensing chain.

Where current sensing is essential in PSUs

On the primary side, current sensing around PFC inductors and flyback or LLC switches defines peak and average current limits, shapes the current-mode control law and protects magnetics and MOSFETs from saturation or long-term over-stress. Inaccurate primary current information can push control loops into borderline stability, cause false short-circuit trips during benign inrush and quietly reduce component lifetime through hidden thermal margin loss.

On the secondary side, output current sensing underpins constant-current modes, over-current protection and, in more advanced supplies, telemetry and protocol-level power reporting. USB-C PD/QC/PPS, PoE and programmable bench supplies depend on reliable current measurements to advertise the correct power levels, implement foldback or derating and avoid overstressing cables, connectors and downstream loads.

At the input and intermediate rails, additional current sensing is used for power-factor correction quality, PoE PD classification, 24 V industrial bus supervision and current sharing between paralleled supplies. In these regions, sensing accuracy affects not only local protection but also compliance with efficiency and harmonic regulations and the ability to balance stress between redundant modules.

Where voltage sensing is essential in PSUs

Output voltage sensing is the foundation of regulation accuracy, dynamic load response and over-voltage or under-voltage protection. The way the rail is tapped, divided, filtered and compared against a reference determines whether downstream systems see a stable supply or a rail that overshoots during transients and drifts with temperature or load. Small errors in divider ratios and reference accuracy directly appear as user-visible voltage offsets.

In PFC stages, the high-voltage DC bus must be sensed to keep the bus within safe limits over wide AC input ranges and to coordinate operation with downstream DC-DC stages. In USB-C outputs, PoE ports and any supply that presents a regulated external connector, port voltage sensing is also used to detect cable drops, connector resistance and unsafe conditions, and in some cases to feed protocol state machines.

Example 1: 65 W USB-C PD adapter

A 65 W USB-C PD adapter uses primary current sensing at the flyback switch or PFC stage to enforce peak current limits and shape inductor waveforms, while secondary current sensing reports load current into the PD controller for power budgeting and protocol reporting. Output voltage sensing closes the constant-voltage loop and informs the PD engine of the actual rail level. If any of these measurements are slow, noisy or biased, users may see intermittent screen flicker, reduced negotiated power levels, unexpected mode changes or overheated cables due to overly optimistic current limits.

Example 2: Server PFC + LLC power supply

In a server PSU with a PFC front-end and LLC converter, sensing of PFC inductor current, input current and 400 V bus voltage feeds digital control loops, efficiency optimisation and fault logs. LLC primary current and multiple secondary rail voltages and currents are monitored for protection and telemetry. Poorly designed sensing can degrade power factor and harmonic performance, erode bus voltage margin at high line, distort current share between paralleled units and shorten capacitor and semiconductor lifetimes through hidden overstress.

Scope and related pages

This page concentrates on the current and voltage sensing chain inside power supplies and adapters: shunt and isolated amplifiers, sigma-delta modulators, sensing-grade references and temperature-aware signal conditioning. Gate-driver design, reference and bias rail generation, isolated feedback implementation and eFuse or hot-swap behaviour are covered in their dedicated pages and should be consulted alongside this sensing-focused view.

Current & voltage sensing map across PSU types

Current and voltage sensing appear at multiple points along the power path from AC input to downstream rails and external ports. Each position serves different control and protection goals, and the required accuracy, bandwidth and isolation level depend strongly on the stage and application class.

AC front-end: inrush and input range awareness

At the AC front-end, some designs monitor rectified input current and voltage to supervise inrush behaviour, detect abnormal line conditions and distinguish between expected high-line or low-line operation. Current information supports active inrush control and diagnostics, while voltage sensing defines under-voltage and over-voltage windows and guides derating or shutdown decisions. Implementation details for surge, X-capacitor discharge and inrush protection are handled in dedicated protection topics; here the focus is on the presence and purpose of the measurement points.

PFC stage: inductor current, input current and bus voltage

Power-factor-correction stages rely on accurate inductor or switch current sensing to implement CCM or CRM current-mode control, enforce cycle-by-cycle limits and enable features such as valley switching and zero-current detection. Additional sensing of input current and AC or rectified voltage allows advanced controllers to reconstruct the input current waveform, optimise power factor and log input power for efficiency and diagnostics.

PFC bus voltage sensing, typically at the 350–420 V DC level, is mandatory to maintain safe stress margins on MOSFETs and bulk capacitors across wide mains ranges and to coordinate hand-off to downstream DC-DC converters. Under-reporting bus voltage can mask over-voltage stress, while over-reporting can reduce deliverable output power and trip protection circuitry unnecessarily.

DC-DC main conversion: primary current and rail sensing

In flyback and LLC converters, primary current sensing defines peak current limits and supports current-mode control or fast over-current protection. Depending on topology, the sense network may sit in the MOSFET source, in series with the transformer return or in a resonant leg. Misplaced or under-designed sense components can compromise protection timing and increase noise injection into the control loop.

On the secondary side, every regulated rail uses voltage sensing to close the constant-voltage loop and to define thresholds for over-voltage and under-voltage detection. For constant-current outputs, such as LED drivers or charger rails, additional current sensing around the output filter or port connector is used to shape the CC region and limit fault energy.

Downstream PoL rails: current share, limits and telemetry

Board-level DC-DC converters and point-of-load rails often include per-rail current sensing to implement over-current protection, track load profiles and support current-sharing schemes in multi-phase or redundant architectures. Voltage and current telemetry from these rails feeds system controllers that log power budgets, trigger throttling or derating policies and provide visibility for remote management.

Special cases: PoE PDs, USB-C ports and server PSUs

PoE powered devices use input voltage and current sensing during detection, classification and normal operation to enforce power limits, protect cabling and verify that negotiated power levels are not exceeded. After isolation, further sensing on the local DC rails supports downstream converters and diagnostics.

USB-C PD and PPS ports sense output voltage and current at the connector or very close to it to meet protocol requirements, implement programmable power levels and detect cable resistance or poor contacts. Accurate sensing is also used to calculate and report delivered power and to enforce fast-charge safety policies.

Server and telecom PSUs combine many of these sensing roles. They measure AC input, PFC bus, main DC-DC rails and multiple PoL currents, then aggregate the information into digital controllers for current sharing, redundancy management and detailed telemetry. The following sections build on this map and discuss how shunts, isolated amplifiers, sigma-delta modulators and references are used to implement each sensing point.

Shunt-based current sensing topologies

Shunt-based current sensing is the most common way to measure currents inside power supplies and adapters. A small resistor in series with the current path converts current into voltage, and an amplifier or dedicated current-sense amplifier scales this voltage for control, protection and telemetry. The choice between low-side, high-side and switch- or return-path placement strongly affects efficiency, noise behaviour and the complexity of the signal-conditioning chain.

Low-side shunt: simple and low cost, but the ground moves

Low-side sensing inserts the shunt between the load return and the system ground, then uses an op amp or current-sense amplifier to measure the small voltage across it. This topology is attractive because the common-mode voltage is close to ground, so amplifier requirements are relaxed and the circuit is easy to understand. It is widely used for secondary-side output rails, auxiliary rails and modest current levels in industrial and consumer power supplies.

The main trade-off is that the load no longer sits at the same reference potential as the logic ground. The shunt creates a voltage drop that raises the load ground, and any ripple current through the shunt appears as ground noise. Poor placement can lead to ground loops, unexpected interaction with EMI filters and measurement errors if analogue or digital circuits share the same ground node without proper star-point routing.

Shunt selection must balance efficiency, power dissipation and resolution. A larger resistance value increases sense voltage and improves signal-to-noise ratio, but also raises conduction loss and reduces the voltage available to the load. Thermal rise of the shunt changes its resistance and introduces gain error. Input filtering around the sense amplifier, often implemented as a small RC network across or ahead of the amplifier inputs, must be designed to attenuate switching spikes and layout-induced ringing without slowing over-current protection so much that fault energy increases excessively.

High-side shunt: clean ground for the load, stricter amplifier demands

High-side sensing moves the shunt to the positive rail, between the source and the load or bus. A dedicated high-side current-sense amplifier then measures the differential voltage at a higher common-mode level and translates it into a ground-referenced output. This keeps the load ground clean and is a better fit for bus-level and port-level measurements such as battery ports, 12 V or 24 V distribution rails, USB-C outputs and PoE ports.

In exchange, the amplifier must tolerate the full common-mode voltage swing and any fast transients on the high-side node. High-side current-sense amplifiers are specified by input common-mode range, supply range, gain, input offset and common-mode rejection across frequency. Adequate CMRR at the switching frequency and its harmonics is critical; otherwise, common-mode noise is converted into apparent current ripple. Layout becomes more sensitive, because the shunt often shares copper with high di/dt currents and switching edges. Input filtering and routing must be arranged so that the amplifier sees the shunt voltage, not the parasitic inductance and capacitance of the power stage.

Shunts in PFC and LLC switch or return paths

In PFC and LLC stages, shunts are frequently placed directly in series with the switch, resonant leg or return path. The controller senses the voltage across this element at a current-sense pin to implement current-mode control, cycle-by-cycle current limiting or fault detection. These shunts carry high peak currents and see fast dv/dt and di/dt, so they require generous power derating and extremely short, tight current loops to avoid parasitic inductance and radiated noise.

Because switch-path shunts operate in noisy environments, external filtering must be applied with care. A filter that is too aggressive will slow down short-circuit detection and allow more fault energy before the controller can respond. A filter that is too light will pass ringing and spikes into the current-mode comparator, causing jitter, subharmonic oscillation or nuisance tripping. Kelvin connections from the shunt pads back to the controller or amplifier inputs are essential to avoid extra series resistance in the sense path from copper traces and vias.

Current-sense amplifier roles in shunt-based designs

Dedicated current-sense amplifiers simplify shunt-based designs by providing fixed or programmable gain, input filtering, level shifting and protection features around the shunt. Single-direction devices cover unidirectional rails such as conventional DC outputs, while bidirectional devices support applications where current may reverse direction, including certain programmable supplies and battery interfaces. Devices with integrated comparators and alert outputs allow the same shunt to feed both a precise measurement path and a very fast hardware over-current flag, reducing the number of sense elements and improving protection response time.

Isolated current sensing: isolated amps vs ΣΔ modulators

In many power supplies, the most informative current signals live in high-voltage domains, while the main controller and telemetry engine sit in a low-voltage, safety-isolated domain. Isolated current sensing bridges this gap by delivering accurate current information across an isolation barrier without violating creepage, clearance or common-mode transient requirements. The most common options in PSU applications are isolation amplifiers, sigma-delta modulators and current transformers.

When isolated current sensing is needed

Isolated current sensing is essential whenever the measured current resides on a primary or high-voltage side that must remain galvanically separated from the controller domain. Typical examples include PFC and LLC primary currents in digitally controlled server PSUs, high-side bus currents in industrial or telecom supplies, and medical or instrumentation power supplies that must meet reinforced isolation ratings and stringent leakage limits. In these cases, running a simple shunt signal directly into the controller would defeat isolation and expose sensitive logic to high dv/dt and surge events.

Isolated current sensing elements must therefore withstand the working voltage and surge levels, survive fast common-mode transients from switching transitions and provide predictable transfer characteristics over temperature and time. At the system level, the choice of technology sets limits on bandwidth, noise, latency and achievable accuracy, and it determines how much complexity is pushed into the analogue domain versus the digital domain.

Isolation amplifiers: analogue signal across the barrier

Isolation amplifiers sense the shunt voltage on the high-voltage side, modulate it across an isolation barrier and reconstruct a ground-referenced analogue voltage on the controller side. From the PSU designer’s perspective, the device behaves like a precision amplifier with defined gain, bandwidth and offset, but with high working isolation voltage and specified common-mode transient immunity. The analogue output can feed a conventional ADC channel, comparator or mixed-signal control IC without special digital filtering.

Key selection parameters include input range, gain accuracy, non-linearity, drift and bandwidth. For PFC and LLC applications, bandwidth must be high enough to capture current waveforms and detect fast transients without excessive phase lag, but not so high that every switching spike and EMI burst is reproduced at the output. Common-mode transient immunity is critical when the shunt sits near a switching node; insufficient CMTI can allow dv/dt on the primary side to induce glitches or apparent current steps on the secondary side output, disturbing control loops and fault detection.

ΣΔ modulators: digital bitstream over the barrier

Sigma-delta modulators convert the shunt voltage into a high-frequency digital bitstream whose duty cycle encodes the measured current. This bitstream crosses the isolation barrier using digital isolators and is then decimated and filtered by a digital filter, typically inside a digital power controller or microcontroller. The result is a high-resolution digital representation of current, ready for control algorithms, logging and calibration.

Sigma-delta solutions shift much of the signal processing burden into the digital domain, which simplifies gain and offset trimming and enables advanced filtering and linearisation. However, they introduce latency through the decimation filter, and this latency must be accounted for in control-loop design and over-current protection timing. The bitstream and its clock add high-frequency switching activity on the isolation link, so PCB layout and isolator selection must consider electromagnetic emissions and susceptibility as well as timing margins.

Current transformers: AC and high-frequency current sensing

Current transformers provide galvanically isolated current sensing by coupling the magnetic field of a primary conductor into a secondary winding. In PFC and resonant converters, they are used to sense inductor or switch currents without adding significant conduction loss. CTs only respond to changing current and therefore are not suitable for purely DC currents, but they offer excellent efficiency for AC or high-frequency components and naturally provide isolation as long as creepage and clearance rules are respected in the mechanical design.

Correct selection of turns ratio, core material and burden resistor determines the usable frequency range, amplitude and linearity. Low-frequency performance and saturation limits are important when the current waveform contains significant low-frequency content or long fault events. At very high currents or under fault conditions, the core can saturate, flattening the output waveform and delaying protection. CT-based signals that enter control loops contribute phase shift and gain variation and need to be considered in compensation design.

System-level trade-offs between isolated options

Choosing between isolation amplifiers, sigma-delta modulators and current transformers is a system-level decision that weighs accuracy, bandwidth, latency, isolation voltage, common-mode transient performance and BOM cost. Isolation amplifiers suit many analogue-centric industrial and offline supplies where an ADC channel is already present and loop bandwidths are moderate. Sigma-delta modulators align with digital power controllers that integrate the required filters and where digital calibration and telemetry are priorities. Current transformers remain attractive in high-power PFC or resonant stages where efficiency is paramount and the measured quantity is inherently AC or high-frequency in nature.

Voltage sensing paths & interaction with references

Voltage sensing in power supplies translates output and bus voltages into clean, scaled signals that can be compared against precise references. Divider networks, buffers and error amplifiers define constant-voltage accuracy, while protocol controllers and protection comparators rely on correctly placed sense points. The quality of the reference and the dividers, together with filtering choices, set the long-term stability and transient behaviour of the regulation and protection loops.

Output voltage dividers feeding error amplifiers or TL431-class references

For regulated DC outputs such as 5 V, 12 V or USB-C VBUS rails, the classic sensing path starts with a resistive divider from the output to a reference point. The divided node is compared against a stable reference voltage using an error amplifier or a TL431-class shunt reference. The error signal then drives the PWM modulator, optocoupler or digital controller that closes the regulation loop. Divider values define the nominal output voltage, while their tolerances and temperature coefficients directly contribute to constant-voltage accuracy.

When a TL431-type reference is used, the divider usually sits between the output and ground with the midpoint feeding the REF pin. The internal reference compares this midpoint to its built-in V_REF and modulates cathode current to maintain balance. In operational-amplifier based schemes, the reference is often applied to the non-inverting input while the divider feeds the inverting input, and compensation components surround the amplifier. In both cases, the divider defines the gain from reference to output, so any mismatch or drift in the divider ratio appears as regulation error even if the reference itself is very accurate.

Filtering near the sense node must be treated as part of the compensation network, not as a free-standing noise fix. Capacitors placed directly from the divider midpoint to ground, or across the upper resistor, create zeros and poles that modify the error amplifier’s loop response. Uncontrolled filtering can reduce phase margin, slow transient recovery or cause overshoot and oscillation. Recommended compensation networks in controller datasheets are a reliable starting point; any changes should be evaluated with loop analysis rather than guessed.

PFC bus voltage sensing for control and over-voltage protection

The PFC output bus typically operates in the 350–420 V range and requires its own voltage sensing path. A high-value divider reduces the bus voltage to a level suitable for the PFC controller’s feedback and protection pins, while keeping continuous power dissipation in the divider modest. Component selection must consider working voltage ratings, creepage, clearance and leakage currents, since the divider is often tied directly to the rectified mains or high-voltage DC bus.

The same bus sense node commonly feeds both the voltage-control loop and over-voltage/under-voltage comparators. Voltage filters that are too aggressive can slow the response of the control and protection loops, increasing bus overshoot during load transients or line surges. Filters that are too light expose the controller to high-frequency ripple, which can cause jitter or mis-triggered protection. Over-voltage thresholds must be set with margin above the highest expected operating bus level and below absolute limits, accounting for divider ratio tolerance, reference error and comparator offsets.

USB-C and PoE output voltage sense for protocol and safety

At USB-C and PoE output ports, voltage sensing ensures compliance with protocol specifications and protects connected equipment. For USB-C PD, the VBUS sense node informs the policy engine about the actual negotiated voltage and supports OVP and UVP detection. The divider should be placed close to the connector to include cable and connector drops in the measurement as appropriate, while avoiding coupling to large current loops and ESD structures. The mapping from VBUS to internal thresholds must leave sufficient headroom relative to the protocol’s maximum allowable voltage.

In PoE Powered Devices, the input voltage sense is used for detection, classification and normal-operation window monitoring. Dividers and filters feed the PoE controller’s comparators, which decide when the PD may draw power and when it must disconnect. As with other ports, divider tolerances and reference errors must be included when setting the boundaries between detection, classification and active operation to avoid false disconnects or out-of-spec operation.

Reference accuracy, divider ratios and power-good signalling

Every voltage sensing path ultimately compares a scaled version of the rail against a reference. The overall accuracy budget therefore combines reference tolerance and drift, divider ratio error, amplifier offset and PCB leakage or contamination. If the reference is specified at ±0.5 % but the divider uses 1 % resistors with dissimilar temperature coefficients, the resulting constant-voltage accuracy will be dominated by the divider, not the reference. For rails that claim tight regulation across temperature, divider networks often require 0.1–0.5 % precision and matched temperature characteristics.

Reference monitoring and power-good outputs close the loop between sensing and system supervision. A reference monitor or supervisor compares rails and references against internal thresholds and asserts PG signals only when voltages are within specified windows. These PG outputs feed higher-level power sequencing and supervisor functions, which coordinate start-up, reset and fault handling across multiple rails. The detailed behaviour of sequencers and supervisors is covered in the dedicated Power Sequencing & Supervisor sub-page; this section establishes how accurate sensing and robust references provide the raw information those devices rely on.

Temperature effects & compensation in sensing chains

Temperature changes every element in a sensing chain: shunts heat up under load, dividers warm with ambient and copper traces gain resistance. Offset and gain in amplifiers and ADCs also drift with temperature. Without conscious design and compensation, these effects accumulate into noticeable errors in current and voltage measurements, and into drift in protection thresholds and reporting.

Passive components and PCB resistance over temperature

Shunt resistors are exposed to both ambient temperature and self-heating from I²R loss. The temperature coefficient of resistance (TCR) determines how much the value increases with temperature, typically expressed in ppm/°C. At high load currents, a few tens of degrees of self-heating combined with ambient variation can create several tenths of a percent of gain error in current measurements if TCR is not tightly controlled. Power derating and the physical placement of shunts influence how hot they run in practice.

Voltage-divider resistors also carry temperature coefficients. The absolute value of each resistor and the matching of their TCRs determine how the divider ratio drifts. When both resistors are from the same precision series and have similar TCR, their ratio tends to remain stable over temperature, and most drift appears as a common-mode shift that the reference cancels. Mismatched parts can cause noticeable movement in constant-voltage setpoints as the PSU warms up or cools down, even when the reference is stable.

PCB copper adds resistance to current paths and sense paths, and its resistivity increases with temperature. In high-current, low-voltage rails, the IR drop along copper pours and planes can represent a significant fraction of the load voltage. If sense connections do not implement proper Kelvin routing back to the shunt or load terminals, copper resistance and its temperature dependence are effectively added into the measurement. This leads to load-dependent and temperature-dependent errors that simple shunt selection cannot fix.

Amplifiers, ADCs and references across temperature

Sense amplifiers and op amps add offset and gain errors that drift with temperature. In current-sense applications, offset drift is most visible at low currents, where a few hundred microvolts of input-referred offset can correspond to a significant fraction of the measurement. Gain drift affects the slope of the transfer function and appears as a percentage error across the whole range. Device datasheets specify these parameters, but actual performance also depends on supply voltage, common-mode level and layout.

Voltage-regulation paths rely on the combination of an error amplifier and a reference. While internal reference architectures are covered in other sections, the key impact here is that reference drift with temperature directly shifts the regulation target. ADCs add their own reference and gain errors; when ADCs use an internal reference that drifts differently from the system reference used in the regulation loop, discrepancies can appear between measured and actual rail voltages as the supply warms up.

Comparator thresholds for protection also move with temperature. Input offsets, propagation characteristics and reference drift alter the effective trip points for over-current, over-voltage and under-voltage comparators. Protection thresholds should therefore include margin not only for static component tolerances but also for temperature-dependent behaviour across the intended operating range.

Practical strategies for temperature compensation

The first line of defence is component selection and placement. Low-TCR shunts with adequate power ratings reduce self-heating induced gain drift. Precision divider resistors with matched temperature coefficients minimise ratio drift in voltage sensing paths. Sensitive sense traces should be kept short, routed away from hot components and implemented with true Kelvin connections where possible. These choices reduce the inherent temperature sensitivity of the analogue hardware before any digital compensation is applied.

In digitally controlled supplies, calibration tables and temperature-aware correction factors are often used to tighten accuracy. During production or service, measurements at known temperatures and load conditions can be used to derive offset and gain corrections for current and voltage readings. These correction coefficients are stored in non-volatile memory and applied at run time based on on-board temperature sensor readings. The same framework can support periodic re-calibration after ageing or component replacement.

Temperature information also supports derating strategies that protect components when thermal conditions are challenging. Multiple temperature sensors placed near shunts, magnetics, power semiconductors and airflow paths provide a map of the board’s thermal state. Control firmware can reduce output current, adjust fan or pump speeds or alter switching patterns when temperatures approach critical levels. The detailed implementation of fan control, sensor placement and derating curves is covered in the Thermal & Fan Control sub-page; this section highlights that accurate sensing and calibration depend on understanding and managing temperature at every stage of the measurement chain.

Dynamic performance: bandwidth, delay and protection response

Dynamic performance of current and voltage sensing chains determines how well power-supply control loops behave and how quickly protection reacts. Bandwidth, phase delay and filtering choices shape loop stability and transient response, while blanking and comparator delays define whether over-current and over-voltage limits are enforced within safe operating area. In digitally controlled supplies, ADC timing and ΣΔ filter latency add another layer of dynamics that must align with switching frequency and control algorithms.

Loop stability and sensing bandwidth

Regulation loops only see what sensing chains deliver. In current-mode and voltage-mode PWM controllers, current and voltage sensing networks need sufficient bandwidth above the planned crossover frequency. If shunt plus RC filtering and amplifier bandwidth form a low-pass response close to the loop crossover, the feedback signal is delayed and attenuated. This reduces phase margin, shifts the actual crossover frequency and can lead to slow recovery, overshoot or oscillation when loads or line conditions change quickly.

RC filtering is usually added on current-sense and voltage-sense nodes to tame switching spikes and noise. The cutoff frequency of these filters should sit well above the intended loop bandwidth, yet low enough to limit high-frequency content that would otherwise excite the error amplifier or ADC. When filter poles and zeros are placed too close to the crossover, they act as unintended compensation elements and can undo carefully designed Type-II or Type-III networks around the error amplifier or digital controller.

Noise performance is tightly coupled to bandwidth. Wideband sensing captures more of the switching edges and ringing, which can show up as jitter in current-mode control and as apparent ripple on voltage feedback. Aggressive filtering cleans up these artefacts but also slows the signal. A balanced design sets sensing bandwidth high enough to track genuine load and line dynamics while relying on proper layout, Kelvin routing and shielding to reduce the need for heavy filtering.

Protection response, blanking and filtering trade-offs

Over-current and over-voltage protection paths are built from the same sensing elements, but with simpler decision logic. The protection signal typically passes through an RC filter and a comparator or dedicated protection input before driving latches and gate drivers. Every filter pole and propagation delay adds time between a fault event and the moment power is actually reduced or switched off. This delay must remain compatible with the safe operating area of power semiconductors and magnetics under worst-case line and load conditions.

Leading-edge blanking is widely used on current-sense pins to ignore the initial switching spike created by diode or MOSFET reverse-recovery and parasitic inductances. While blanking prevents nuisance trips, it also hides part of the genuine current waveform. If blanking time becomes a large fraction of the on-time, the controller loses visibility of the peak current in high duty-cycle or heavy-load conditions. Combined with heavy RC filtering, this can delay detection of hard shorts by several hundreds of nanoseconds or more, stressing power devices beyond their intended limits.

Over-voltage and under-voltage detection face a similar compromise. Large capacitors at voltage-sense nodes suppress short spikes and bus ringing, reducing false trips, but they also slow recognition of real over-voltage conditions caused by load disconnection or line surges. Protection thresholds should consider both static tolerances and dynamic behaviour: the combination of filtering, comparator speed and gate-driver reaction time defines how long a bus or rail may exceed its limit during abnormal events.

Digital control, ADC sampling and ΣΔ filter delay

Digitally controlled PFC and DC-DC stages rely on sampled current and voltage information. The sampling instant relative to the switching period determines whether the controller observes a near-peak, valley or averaged value of the inductor current and output voltage. Unsynchronised sampling can create aliasing, where rapid switching ripple appears as low-frequency noise in the digital domain. Synchronising ADC triggers to PWM edges or line zero crossings improves repeatability and stabilises loop gain.

Multi-channel ADCs or multiple ADCs in parallel are often used to capture inductor current, input voltage and bus voltage at the same time. Any timing skew between channels means that instantaneous power calculations are based on measurements taken at slightly different moments. This affects power-factor correction accuracy and can degrade total harmonic distortion. Controller configuration should aim for simultaneous sampling modes and well-defined trigger sources so that time correlation between signals matches the assumptions in the digital control algorithms described in the Digital PSU Controller sub-page.

ΣΔ modulators with digital decimation filters introduce group delay in addition to bandwidth limits. For slow loops such as PFC bus-voltage regulation and energy reporting, this latency is usually acceptable. For fast inner current loops or for time-critical protections, the same delay can consume a large portion of the phase margin or extend fault reaction times. Designs that rely on ΣΔ outputs for control should evaluate decimation filter characteristics, while designs that need fast short-circuit protection often retain a dedicated analogue comparator path in parallel.

Design checklist for sensing dynamics

When defining sensing bandwidth and delay, the following questions help align the signal chain with control and protection goals:

• What are the switching frequency and target loop crossover frequencies for current and voltage loops?
• Where do shunt and divider RC filter cut-off frequencies sit relative to crossover and switching frequencies?
• What is the end-to-end delay from fault onset through sensing, filtering, comparator or ADC, logic and gate driver until the power device is actually turned off?
• Are protection thresholds and delays compatible with device safe operating area under worst-case line and load?
• How are ADC and ΣΔ sampling instants aligned with PWM and line cycles, and are multi-channel samples truly simultaneous?
• Is the added filtering and blanking for noise suppression still acceptable for the required protection and loop response times?

Application mini-stories for PSU sensing

Practical examples help connect sensing topologies and specifications to real design decisions. The following mini-stories illustrate how shunts, amplifiers, ΣΔ modulators, ADCs and references combine in typical power-supply applications, and how bandwidth, temperature and protection targets are balanced in each case. Component roles are described generically so that different vendor ecosystems can be mapped onto the same signal-chain thinking.

65 W USB-C PD adapter: sensing for control, protection and protocol power reporting

A 65 W USB-C PD adapter typically uses a QR or CrM flyback stage with primary current-mode control and a secondary-side protocol controller. On the primary side, a shunt in the MOSFET source or a dedicated current-sense transformer feeds the controller's CS pin through an RC network. The controller implements slope compensation and leading-edge blanking to separate genuine current information from switching spikes. Shunt value and RC bandwidth set the trade-off between noise immunity and fast short-circuit detection, while shunt TCR and self-heating determine how peak current limits shift with temperature.

On the secondary side, a small-value shunt in the VBUS path, combined with a high-side or low-side current-sense amplifier, provides the protocol controller with real-time current information. The controller computes delivered power from sensed current and voltage and uses this to enforce negotiated PDO or PPS limits and to detect overloads. The amplifier must offer sufficient bandwidth to follow the power-update rate of the protocol while maintaining low offset and drift across ambient and case temperatures. A resistive divider senses VBUS for OVP/UVP and for closed-loop regulation, using a precision reference and error amplifier or a TL431-class device.

The sensing chain in this adapter can be summarised as a combination of a primary shunt, current-sense network and PWM controller with integrated blanking, plus a secondary shunt, current-sense amplifier, ADC-equipped USB-C PD controller, precision reference and supervisor. Together, these elements support reliable current limiting, accurate power reporting to the USB-C protocol and stable constant-voltage regulation across load and temperature.

Server PFC + LLC PSU: high-precision sensing with digital calibration

A server power supply commonly combines a PFC front-end and an LLC converter, both under digital control. In the PFC stage, the inductor current is sensed using either a shunt or a current transformer, and the signal is brought into the digital controller through a ΣΔ modulator or a fast ADC. Additional channels measure input line voltage and PFC bus voltage via high-voltage dividers. The controller uses these measurements for current-loop control, bus-voltage regulation, power-factor correction and efficiency optimisation, while respecting the bandwidth and group delay of the ΣΔ or ADC front-end.

The LLC stage senses primary current, often via a current transformer or shunt combined with an isolation amplifier or ΣΔ modulator, and monitors secondary voltages for regulation and protection. Magnetic components and shunts can run hot due to high power density, so temperature drift appears in both gain and saturation behaviour. Digital calibration tables in the controller compensate these drifts by mapping measured currents and voltages back to reference instruments at multiple temperature points, based on readings from nearby temperature sensors placed on magnetics and heat sinks.

In this server PSU, the sensing chain is built from shunts or current transformers, isolation amplifiers or ΣΔ modulators, multi-channel ADCs in the digital power controller, precision references and rail monitors. Together they support tight regulation, detailed telemetry over PMBus, and calibrated efficiency reporting while allowing derating strategies based on temperature and ageing trends. Fast protection paths with analogue comparators remain in place for catastrophic faults, bypassing slower digital filters when necessary.

PoE PD and 24 V industrial front-end: sensing for limits and diagnostics

A PoE Powered Device uses input voltage and current sensing to support detection, classification, inrush control and runtime protection. A shunt in series with the PD input, combined with internal amplifiers and comparators in the PD controller, limits inrush current and enforces IEEE current limits during normal operation. The same sense node or an additional shunt can feed an ADC in a system MCU, enabling long-term logging of power draw per port. Over time, changes in current patterns or increasing voltage drop at a given load may indicate cable ageing, corroded connectors or wiring faults.

A 24 V industrial front-end feeding a board-level DC-DC stage follows a similar pattern. A high-side shunt and current-sense amplifier monitor input current for soft-start and overload control, while a divider tracks input voltage for undervoltage lockout, surge-survival checks and diagnostics. Measurements are passed to a local MCU or monitoring IC, which can flag abnormal current draw, detect line resistance changes and support predictive maintenance. Here, sensing bandwidth and filtering must handle noisy industrial environments without delaying protection during wiring faults or short circuits on long cable runs.

Across PoE PD and 24 V industrial front-ends, the sensing toolkit is composed of high-side shunts, current-sense amplifiers, PD or protection controllers with integrated comparators, ADC-equipped microcontrollers, references and supervisors. These elements provide the raw data for current limiting, brown-out detection, surge handling and remote diagnostics on cabling and loads. Other sub-pages, such as PoE & Industrial Front-Ends, OV/OC/SCP Protection and eFuse & Hot-Swap, describe how these sensing signals feed into protection and power-path architectures.

Design checklist & IC role mapping for PSU sensing

This section collects the main design questions and device roles for current and voltage sensing in power supplies. The checklist helps verify sensing coverage, bandwidth, isolation, thermal limits, EMC robustness, calibration and telemetry. The IC role mapping then links typical shunt amplifiers, isolation devices, references and protection front-ends to concrete power-supply stages and representative part families.

Checklist by power-supply stage

For each stage, the following questions help decide whether sensing is in the right places and whether performance aligns with control and protection goals.

AC input and PFC front-end

• Is there at least basic sensing of input current and voltage for surge handling, brown-out detection and PFC control?
• Is the PFC inductor current sensed with a clear topology (shunt, current transformer or ΣΔ path) and a bandwidth compatible with the current-loop crossover?
• Does PFC bus-voltage sensing balance accuracy, RC filtering and over-voltage response time while keeping divider dissipation within the thermal budget?

Main DC-DC stages (flyback, LLC and related topologies)

• Does primary current sensing support both regulation (peak or average control) and fast short-circuit protection under worst-case line and load?
• Is shunt dissipation in primary and secondary paths acceptable in the context of transformer, heat-sink and enclosure thermal limits?
• Are output voltage and, where required, output current sensed with suitable dividers, buffers and references to achieve the intended CV/CC accuracy?

Downstream rails, auxiliary supplies and PoL converters

• Do all safety-critical and mission-critical rails have over-current and under-voltage sensing, at least through comparators or supervisors?
• Are telemetry or monitoring channels allocated to the most stressed rails, such as processor cores, communication interfaces or motor drivers?
• Are sensing traces for low-voltage rails routed to minimise coupling from large current loops and switching nodes?

Ports with explicit power contracts (USB-C, PoE, server PSU outputs)

• Which ports must honour advertised power limits or classes, and are their V/I sensing chains dimensioned for that accuracy and update rate?
• Is there a way to distinguish cable or connector degradation from load changes by combining voltage drop and current trends over time?
• Are PMBus, SMBus or other reporting interfaces populated with the key sensed quantities needed for field diagnostics and asset management?

Checklist by sensing performance dimension

Accuracy and resolution

• Are shunt tolerances, amplifier offsets, reference accuracy and divider tolerances combined into a clear error budget for each measurement?
• Is ADC resolution and effective number of bits sufficient for telemetry, efficiency calculation and protocol power reporting where required?
• Does the chosen sampling instant (peak, valley or averaged) match the control strategy and documentation?

Bandwidth, delay and phase

• Where do RC filters, amplifier bandwidth and ΣΔ decimation cut-offs sit relative to loop crossover and switching frequencies?
• What is the total delay from a fault event through sensing, filtering, comparator or ADC and logic to MOSFET or relay turn-off, and is this compatible with device SOA?
• Are ADC sampling instants and ΣΔ group delays explicitly accounted for in digital control algorithms?

Isolation and safety

• Which measurements cross SELV boundaries, primary–secondary domains or PoE line/device domains and therefore require galvanic isolation?
• Do isolation amplifiers, ΣΔ modulators and digital isolators meet required working voltage, surge and creepage/clearance limits for the target standard?
• Are any isolated measurements implemented where a non-isolated approach would suffice, unnecessarily increasing BOM cost and complexity?

Shunt power and thermal limits

• Is I²R dissipation in each shunt included in the overall thermal budget for PCBs, magnetics and enclosures?
• Are shunt packages and footprints sized to keep local temperature rise within reliability limits under worst-case load and ambient conditions?
• Has shunt TCR been considered in current-limit settings and protocol power reporting tolerances?

EMC robustness and routing

• Are sense traces routed with tight coupling, minimal loop area and a clean reference, away from high dv/dt and di/dt regions?
• Are small capacitors and RC filters used to suppress common-mode and differential noise without severely reducing sensing bandwidth?
• Are ground references for sensitive amplifiers kept separate from high-current return paths until a defined star or Kelvin connection?

Calibration, temperature compensation and telemetry

• Which measurements require factory calibration or in-system calibration, and where will calibration data be stored and applied?
• Is temperature drift handled by component selection, calibration tables or a combination of both for critical power and efficiency readings?
• Are key sensed quantities logged or exposed via PMBus, SMBus or other interfaces to support remote diagnostics, derating decisions and lifetime tracking?

IC role mapping for current and voltage sensing

The following device classes form typical building blocks for PSU sensing chains. Each role includes key parameters, common application points and representative device families from multiple vendors.

Low-side, high-side and bidirectional current-sense amplifiers

• Low-side CSA: Used on output returns, auxiliary rails and small current branches where the shunt is placed near ground. Important parameters include input offset voltage, gain error, bandwidth and supply voltage range. Typical applications include USB-C secondary current measurement and PoL rail monitoring. Representative families include INA21x-class, MAX437x-class and ZXCT10xx-class devices.
• High-side CSA: Used on 12 V, 24 V or higher rails and front-ends where the shunt sits in the positive line. Key parameters are common-mode voltage range, CMRR over frequency, bandwidth and transient withstand capability. Typical applications include 24 V industrial front-ends, automotive accessory power and high-side current limiting. Representative families include INA240 / INA281-class, AD8418 / AD8211-class and MAX40056-class devices.
• Bidirectional CSA: Used where current can flow in both directions, such as battery ports, USB-C PD ports and some PoE implementations. Important parameters are bidirectional zero-point configuration, offset drift and linearity around zero. Representative families include INA219 / INA226-class, LTC6102-class and MAX9918-class devices.

Isolated amplifiers and ΣΔ modulators

• Isolation amplifiers: Provide galvanically isolated analog representations of primary currents or voltages to secondary controllers. Key parameters include isolation voltage, working voltage, creepage/clearance, bandwidth, CMTI and offset drift. Typical positions are PFC inductor current, LLC primary current and high-side bus-voltage sense in server and industrial PSUs. Representative families include AMC1301 / AMC1302-class, ISO224-class and ADuM3190 / ADuM4190-class devices.
• ΣΔ modulators: Convert sense signals into high-frequency bitstreams for digital post-processing. They pair with digital filters in controllers to provide high-resolution measurements with galvanic isolation when used with isolated power or capacitive/magnetic coupling. Important parameters include modulator frequency, supported input range, recommended digital filter responses and resulting group delay. Representative families include AMC1306 / AMC1305-class, AD7400 / AD7401A-class and ISOΣΔ modulators integrated into digital power controllers.

Precision references and bias LDOs for sensing chains

• Precision references: Set accurate thresholds and regulation points for voltage sensing, comparators and ADCs. Selection focuses on initial accuracy, temperature coefficient, long-term drift and noise. Typical placements include TL431-class shunt references in opto feedback loops and bandgap references feeding ADCs or error amplifiers. Representative families include TL431 / TLV431-class, REF50xx / REF32xx-class and ADR45xx-class devices.
• Bias LDOs: Supply clean rails to CSAs, isolation amplifiers, references and ADCs. Important parameters are output noise, PSRR at switching frequencies, dropout voltage and start-up behaviour relative to monitored rails. Representative families include low-noise LDO series such as TPS7A47 / TPS7A49-class, ADM715x-class and LT3042 / LT3045-class devices.

Integrated sense + comparator and protection front-ends

• Sense plus comparator devices: Combine current-sense amplifiers with built-in comparators, references and sometimes gate-drive outputs. These parts are used for very fast over-current or over-voltage protection in eFuse, hot-swap and inrush-control circuits. Key parameters are comparator propagation delay, programmable threshold range, fault-output format and restart behaviour. Representative families include TPS2594 / TPS2595-class eFuse devices, LM5066 / LM5069-class hot-swap controllers and LTC4365 / LTC4368-class surge and over-voltage protection controllers.
• Specialised protection controllers: Integrate shunt sense, comparators and logic for PoE PD inputs, USB power switches and industrial front-ends. Typical examples include 802.3af/at/bt PD controllers, USB load switches and surge-tolerant 24 V front-end controllers. Representative families include PD controllers such as TPS237x / LTC4269-class, USB power-path switches such as TPS255x / TPS259x-class and 24 V front-end protection devices such as MAX17597 / MAX13256-controller ecosystems.

Monitoring ADCs and digital controllers with integrated sensing

• Monitoring ADCs: Multi-channel ADCs capture sensed voltages and currents for telemetry, efficiency and diagnostics. Important parameters include resolution, sampling rate, input range and integrated PG/alert logic. Representative families include PMBus-compatible monitors such as LTC297x-class, ADM127x-class and INA229 / INA238-class digital power monitors.
• Digital power controllers: Controllers with integrated ADCs, ΣΔ inputs and digital filters close the loop around PFC and DC-DC stages while exposing telemetry over PMBus. Sensing performance must be matched with external shunts, amplifiers and isolation devices described above. Representative families include UCD31xx / UCD92xx-class, NCP12xx digital power controllers and other DSP-based server PSU controllers.

FAQs on current and voltage sensing in power supplies

This FAQ collects common design questions around shunt topologies, isolated sensing, voltage dividers, temperature effects, digital control and telemetry. Each answer gives a concise design guideline and points back to the relevant section for deeper discussion.