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Thermocouple / RTD AFE: CJC, Low-Drift Amps & 24-bit ADCs

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A thermocouple/RTD AFE is “good” only when it delivers an auditable temperature result: microvolt-level integrity at the input, correct CJC and lead compensation, and 50/60 Hz rejection that matches the chosen data rate and latency. Real performance is proven by a noise-and-drift error budget plus a simple lab checklist—not by a “24-bit ADC” label alone.

What this AFE must guarantee (measurement targets)

A thermocouple/RTD AFE is “done” only when it converts temperature changes into a traceable, filterable, and diagnosable digital temperature output—under real wiring and mains noise. ADC resolution alone does not define temperature accuracy; the dominant limit is usually the combined effect of input-referred noise, drift, mains rejection, CJC/self-heating, and linearization.

Acceptance targets (3 pillars)

  • Accuracy (°C error budget): specifies the allowed sum of offset, gain, linearization residual, and CJC/self-heating contributions.
  • Stability (drift over time/ambient): defines warm-up behavior, ambient sensitivity, and long-run repeatability—separately.
  • Immunity (noise & mains): guarantees that 50/60 Hz and line pickup do not dominate the output under expected cable routing and bandwidth.

Key numbers (engineering-scale, not marketing)

  • Thermocouple sensitivity: typically ~10–60 µV/°C depending on type and temperature range. This is a “microvolt world,” so thermal EMFs, leakage, and bias-related errors can be comparable to the signal.
  • RTD sensitivity: for Pt100, ~0.385 Ω/°C (≈385 mΩ/°C). Lead resistance and excitation stability matter immediately; excitation also creates self-heating (I²R).
  • Mains rejection target: define rejection at the final output data rate (not at raw modulator rate). Notch depth and output update rate are coupled by the digital filter.

Definition of Done (quick checklist)

  • Noise → °C: output RMS noise converted to °C is below the required resolution after the intended filter window.
  • Warm-up: drift from power-on to steady state is characterized, and the “valid output” time is defined.
  • Mains test: injected 50/60 Hz produces a bounded residual at the output (with the same data rate and settings used in the product).
  • Sensor-specific physics: thermocouple CJC/gradient sensitivity (°C per °C gradient) and RTD self-heating sensitivity (°C per mA) are measured.
  • Diagnostics: open/short/out-of-range conditions set clear quality flags instead of silently returning a plausible number.

Practical interpretation: 24-bit often only means the ADC can encode small changes. True temperature performance is set by input-referred noise (µVRMS), low-frequency drift (µV/°C or nV/°C at the input), mains residual (µV at the output bandwidth), plus CJC/self-heating and model residuals (°C).

End-to-end targets for a Thermocouple/RTD AFE Block diagram showing sensors feeding input conditioning, low-drift amplification, 24-bit sigma-delta ADC, digital filtering with 50/60 Hz notch, linearization, diagnostics, and temperature output. Error injection callouts highlight noise, drift, mains residual, and CJC/self-heating. What “good” looks like: targets that survive real wiring Thermocouple µV/°C signal RTD Ω/°C + excitation Input RC + protection Low-drift Amp + PGA 24-bit ΣΔ ADC Digital filter 50/60 Hz notch Linearize TC / CVD model Diagnostics quality flags Temperature output °C/°F + validity Leakage / bias / thermal EMF can dominate µV signals Notch depth depends on output rate & filter window Drift sets true accuracy after minutes/hours, not bits Targets must be defined at the final data rate: accuracy • stability • immunity

Thermocouple vs RTD: what the front-end must do differently

The two sensors measure temperature by different physics, so the AFE’s “must-do” blocks differ. A thermocouple measures a temperature difference (hot junction minus cold junction), while an RTD measures resistance versus temperature and requires controlled excitation. Choosing the wrong sensor for the wiring and noise environment forces the AFE to fight avoidable error sources.

What changes in the AFE (core differences)

  • Thermocouple front-end: must implement CJC and minimize thermal gradients at the connector/isothermal zone. Input integrity is about microvolt-level errors (thermal EMF, leakage, bias).
  • RTD front-end: must provide excitation (typically constant current or ratiometric reference) and lead-resistance compensation (2/3/4-wire). Performance is often limited by excitation stability and self-heating.
  • Shared blocks: low-drift amplification, 24-bit ΣΔ conversion, and digital filtering for mains rejection exist in both, but are tuned differently (gain, data rate, settling strategy).

Selection boundary (decision axes)

  • Connector thermal gradients: large gradients or unstable airflow near terminals tends to hurt thermocouples unless an isothermal design is practical.
  • Cable and pickup: long runs in a noisy environment require a plan for mains pickup and input bias/leakage; thermocouples are especially sensitive to microvolt-scale coupling.
  • Channel count & scanning: high channel count with MUX scanning amplifies settling and filter latency. RTD 3-wire assumptions can fail if lead resistances drift asymmetrically.
  • Power budget at the sensor: RTD excitation causes I²R heating; if the sensor is thermally insulated, even small currents can create measurable error.
  • Range and robustness: thermocouples tolerate high temperature extremes; RTDs often win on accuracy and repeatability when self-heating and lead resistance are controlled.

Practical “must-prove” items (per sensor)

  • Thermocouple: quantify CJC error sensitivity to a small terminal gradient; verify open-wire detection does not shift the measured microvolt level.
  • RTD: quantify temperature shift versus excitation current (self-heating); verify 3-wire compensation holds across expected lead mismatch and connector aging.
Thermocouple vs RTD AFE: block-level differences Two-lane diagram comparing thermocouple and RTD front-end requirements. Thermocouple emphasizes CJC and isothermal design; RTD emphasizes excitation and 2/3/4-wire lead compensation. Shared conversion and digital filtering blocks are highlighted. Thermocouple vs RTD: where the AFE must differ Thermocouple lane RTD lane TC sensor microvolt signal Isothermal + CJC gradient control RTD sensor Ω vs T Excitation + ratio ref Low-drift amp + PGA gain set by sensor scale 24-bit ΣΔ ADC noise floor matters Digital filter + notch 50/60 Hz vs data rate Linearization TC polynomial / CVD model Temperature + quality °C/°F with open/short flags TC wins on range; accuracy depends heavily on CJC + thermal gradients RTD wins on repeatability; manage excitation, lead error, and self-heating

Input front-end: protection, biasing, RC, and microvolt integrity

The input stage is where microvolt-level temperature signals are most often damaged. A robust thermocouple/RTD AFE must survive ESD and cable events without turning leakage, bias currents, or thermal EMFs into a false temperature shift. The goal is simple: keep the sensor’s differential signal intact, keep parasitic currents predictable, and keep every “different metal + temperature gradient” junction from becoming an unintended thermocouple.

Recommended order (and why it works)

  1. Light ESD clamp near the connector: prevents large events from reaching the amplifier input. Choose parts whose leakage and leakage temperature drift do not create a measurable DC offset at the input.
  2. Input RC right after the clamp: limits HF pickup and sharp edges before they hit the amplifier/PGA. The RC must be sized so its settling time is compatible with the target data rate (and with any channel scanning).
  3. Series limiting (where needed): ensures the amplifier/ADC never sees a destructive or nonlinear input. Keep series resistance consistent and thermally stable to avoid creating a temperature-dependent gain/offset error.

Bias current × source impedance = hidden temperature error

  • Thermocouple: the signal is on the order of tens of µV/°C. Any bias current flowing through cable resistance, input resistors, or protection leakage paths can generate a comparable µV-level offset. That offset becomes a fake “temperature shift” after linearization.
  • RTD: the AFE measures voltage across a sensor driven by excitation. Input bias effects are often smaller than in thermocouples, but lead resistance and filter/series resistors can still create ratio errors and settling artifacts after switching.
  • Design rule: treat every parasitic current path (bias + leakage) as a DC error source that can drift with temperature.

Differential vs single-ended (input topology boundary)

  • Differential input preserves the sensor’s pair as a unit and is typically preferred for long cables and noisy environments, because the AFE can reject common-mode pickup before conversion.
  • Single-ended input references one side to a local node. This can be acceptable for short, controlled wiring, but can convert cable pickup and reference shifts into apparent sensor changes.
  • Practical test: if swapping cables or touching the shield/connector changes the reading, the input topology and bias paths are not controlled well enough.

Thermal EMF: the “unintended thermocouple” problem

Thermocouple-level signals are so small that dissimilar-metal junctions (connector pins, relays, screws, mixed alloys) can generate comparable voltages when a thermal gradient exists. The input stage must therefore minimize temperature gradients across junction pairs and keep sensitive junctions inside a locally uniform temperature region (the next section explains how that is created).

Input-stage checklist (actionable)

  • Pick protection devices by leakage and leakage drift, not only by clamp voltage.
  • Place the first clamp close to the connector, then apply RC filtering before the amplifier/PGA input.
  • Keep differential paths symmetric (same components, same copper length, similar thermal environment).
  • Use stable resistor technologies in the signal path to reduce temperature-dependent ratio errors.
  • Assume contamination and humidity exist: design so small leakage currents do not dominate the error budget.
Input front-end microvolt integrity: protection, RC, bias, and thermal EMF Component-level input diagram showing connector, ESD clamp, RC filter, series limiting, amplifier/PGA, and ADC input. Callouts mark key error injection paths: leakage, bias current, and thermal EMF at dissimilar-metal junctions. Input integrity: keep µV signals clean and predictable IN+ IN− Connector Light ESD low leakage Input RC HF limit Limit series R Amp + PGA low drift ADC input ΣΔ modulator Leakage path → DC offset Bias current × source R Thermal EMF nodes dissimilar metal + gradient Keep input symmetry and control parasitic currents before chasing ADC bits.

CJC deep dive: isothermal design, sensor placement, and gradient control

Cold junction compensation (CJC) fails when the system measures the wrong “cold-junction temperature.” A correct CJC implementation does two things: it measures the cold-junction temperature accurately, and it makes the cold-junction definition point sit inside a locally uniform temperature region (an isothermal zone). Without gradient control, improving ADC resolution or thermistor accuracy rarely improves the final temperature error.

What CJC must achieve (the true requirement)

  • Correct physical point: the CJC sensor must represent the temperature of the cold-junction node (where thermocouple metals transition to copper/terminal metals).
  • Stable local temperature: the cold-junction node must be in a region with minimal temperature gradient across junction pairs.
  • Separated error sources: CJC offset, CJC noise, and gradient-induced error must be measured and mitigated independently.

CJC sensor choice (AFE-relevant criteria)

  • Drift & repeatability: long-term stability matters more than absolute “headline accuracy” when field recalibration is rare.
  • Noise vs response time: lower noise often needs longer averaging; select a time constant that matches the temperature dynamics.
  • Thermal coupling: package thermal resistance and mounting method decide whether the sensor measures the cold-junction node or merely the PCB’s average temperature.

Gradient control (the most common root cause)

  • Gradient creators: terminal blocks, copper pours, screws, and airflow can create a temperature slope right across the cold-junction node.
  • Design actions: short thermal paths, symmetric layout, keep hot components away, and add thermal mass where needed to reduce sensitivity to airflow and transient heating.
  • Metal junction management: keep dissimilar-metal junction pairs inside the same isothermal zone to prevent thermal EMF from drifting with gradients.

Three CJC error buckets (separate them on purpose)

  • CJC offset: a steady temperature bias from sensor calibration or poor thermal contact.
  • CJC noise: short-term jitter that averages down with longer filter windows.
  • Gradient error: drift caused by spatial temperature differences across the cold junction; often depends on airflow and nearby heat sources.

CJC checklist (actionable)

  • Define the cold-junction node explicitly (terminal + metal transition), then place the CJC sensor to represent that node.
  • Create an isothermal zone: use symmetric copper, avoid local heat sources, and add thermal mass if airflow exists.
  • Validate gradient sensitivity: apply a small local airflow or nearby heat step and measure the resulting temperature error.
  • Keep the mechanical stack-up stable: screw pressure and terminal contact should not create one-sided thermal gradients.
CJC isothermal zone and thermal gradient control Thermal-layout concept diagram showing a terminal block and cold-junction node inside an isothermal zone with a nearby CJC sensor. Arrows indicate thermal gradients from a heat source and airflow; symmetric layout and thermal mass reduce gradient sensitivity. CJC accuracy depends on gradients, not just sensor specs Isothermal zone (make local temperature uniform) Terminal cold junction CJC sensor placed near node Thermal mass reduce sensitivity Symmetry matched paths Heat source keep away Airflow creates gradients thermal gradient airflow gradient cold-junction node Separate CJC offset, noise, and gradient error—each needs a different fix.

RTD excitation & 2/3/4-wire lead compensation (done right)

RTDs measure temperature by resistance, so the AFE must control the excitation and must not confuse lead resistance with sensor resistance. The wiring choice (2-wire, 3-wire, or 4-wire Kelvin) is not a formality—it defines which parasitics are inside the measurement and which are rejected. A correct design also limits self-heating and makes excitation drift cancel through ratiometric measurement.

Excitation choices: constant current vs constant voltage

  • Constant current: the RTD voltage is proportional to resistance (V = I·R), which is simple to linearize. The design must provide enough compliance voltage to cover RTD + leads + protection/filter drops, and must control current noise and drift.
  • Constant voltage: the RTD current changes with temperature (I = V/R), so power and self-heating behavior varies with R(T). Lead resistance and contact changes can have stronger impact on the effective measurement.
  • Practical preference: instrument-grade RTD AFEs typically favor constant current combined with ratiometric readout to cancel excitation drift.

2-wire: lead resistance directly becomes temperature error

In 2-wire wiring, both lead resistances add to the measured resistance: Rmeas = RRTD + 2RL. The temperature error is approximately ΔT ≈ (2RL)/(dR/dT). For Pt100, dR/dT ≈ 0.385 Ω/°C, so even small lead changes can create visible °C shifts.

  • When it can work: short, stable leads; moderate accuracy targets; predictable terminals.
  • Common failure: lead/contact resistance changes with temperature, vibration, or oxidation and appears as a sensor change.

3-wire: cancellation works only if lead resistances match

3-wire compensation relies on the assumption that two lead resistances are equal (or track each other): RL1 ≈ RL2. The AFE measures in a way that makes those two resistances enter the result symmetrically, so they cancel (often via switching or differential sensing).

When 3-wire fails (must be stated up front)

  • Lead mismatch: different lengths/gauges/materials, different connector contact quality, or different temperature exposure.
  • Thermal gradients near terminals: leads drift differently with temperature and break the matching assumption.
  • Channel switching/settling artifacts: if the system reads before settling, the “error” looks like a resistance change.

4-wire (Kelvin): separate force and sense for best accuracy

4-wire wiring drives current on a dedicated pair (Force+ / Force−) and measures voltage on a separate pair (Sense+ / Sense−). Because the sense lines carry nearly zero current, lead drops contribute minimally to the measured voltage. This is the most reliable option for long leads, low-resistance RTDs, tight accuracy targets, and unstable connectors.

Ratiometric measurement: cancel excitation drift the right way

Use the same excitation and the same measurement path to read the RTD and a stable reference resistor RREF. With constant current excitation, the ratio cancels current amplitude drift: VRTD/VREF = RRTD/RREF. This removes excitation drift from the error budget, but it does not fix lead mismatch (3-wire) or self-heating.

Self-heating: set the excitation current limit (engineering steps)

  1. Allocate allowable self-heating contribution ΔTallow inside the total temperature error budget.
  2. Estimate worst-case thermal resistance to ambient (or use a conservative self-heating coefficient) for the RTD installation.
  3. Compute RTD power under excitation: P = I²R (constant current) or P = V²/R (constant voltage).
  4. Adjust excitation so the predicted temperature rise stays below ΔTallow, then verify by measurement with a step in excitation level.
  5. If multiplexing channels, account for duty cycle: average power decreases, but switching requires enough settling time for each channel.
RTD wiring: 2-wire vs 3-wire vs 4-wire and where lead resistance enters Three-panel diagram showing 2-wire, 3-wire, and 4-wire RTD connections. Lead resistance injection points are highlighted. 3-wire cancellation condition is labeled (RL1 approximately equals RL2). 4-wire shows separate force and sense pairs. RTD wiring and lead error: what cancels and what does not 2-wire 3-wire 4-wire (Kelvin) Lead R enters directly RL RL RTD Rmeas = RRTD + 2·RL Cancellation requires RL1 ≈ RL2 RL1 RL2 RL3 RTD Cancels lead error only if RL1 tracks RL2 Sense lines carry ~0 current FORCE+ FORCE− SENSE+ SENSE− RTD Minimal lead error best for long leads Choose wiring by error budget: 2W adds lead R, 3W cancels only if matched, 4W separates force/sense.

24-bit ΣΔ ADC & strong 50/60 Hz rejection (truth and trade-offs)

“24-bit” only means the converter can output many codes. Temperature performance depends on the noise-free resolution and input-referred noise after filtering, and on how well the digital filter rejects mains interference at the chosen output data rate. Strong 50/60 Hz rejection is real, but it trades against update rate and settling time—especially when scanning multiple channels.

What “24-bit” should mean in temperature terms

  • Resolution: code width, not a guarantee of stable readings.
  • Noise-free bits / ENOB: determines real stability at the chosen bandwidth.
  • Temperature resolution: the useful metric is output RMS noise in °C: °CRMS ≈ (input-noise)/(sensor sensitivity) (µV/°C for thermocouples, Ω/°C for RTDs).

How ΣΔ filtering creates strong mains rejection

  • Digital filter shapes the response: sinc/FIR filters can create deep notches at 50 Hz and/or 60 Hz.
  • Notch depth depends on output rate: deeper rejection typically requires a longer effective averaging window and a lower output data rate.
  • NPLC intuition: longer integration windows average more of the mains cycle, lowering residual ripple at the output.

Trade-offs that must be declared

  • Update rate vs mains rejection: higher update rates reduce averaging and often reduce notch depth.
  • Filter group delay: strong filtering increases delay; after a step input, the output needs time to settle to a valid value.
  • Multi-channel scanning: channel switching requires enough settling time; otherwise readings include filter memory (“ghosting”).
  • Over-filtering: can hide real temperature changes and slow detection of genuine events (still within temperature acquisition context).

Acceptance definition (simple and measurable)

  • Define the final data rate: specify output samples/second and filter mode.
  • Inject mains interference: apply a known 50 Hz or 60 Hz component and measure residual output ripple at that configuration.
  • Convert to °C: report residual in µVRMSRMS and in °CRMS.
  • Specify settling: after a channel switch or step input, define the waiting time until output is valid.
50/60 Hz notch vs output data rate: engineering trend Concept diagram with a sigma-delta ADC and digital filter block, plus two frequency-response sketches. Lower output rate gives deeper 50/60 Hz notch (longer window). Higher output rate gives shallower notch (shorter window). Notes call out group delay and settling for channel scanning. Strong mains rejection is a filter choice, not a “24-bit” guarantee Analog in sensor signal ΣΔ ADC modulator Digital filter sinc/FIR + 50/60 notch Magnitude Frequency 50/60 Lower output rate → deeper notch Higher rate → shallower notch Group delay & settling Strong filtering increases wait time after steps or channel switching Specify mains rejection at the final data rate and filter setting; then define settling time as part of “valid output”.

Noise & error budget: from µV to °C (make it auditable)

An auditable temperature AFE budget separates random noise (short-term RMS stability) from systematic error (offset, drift, gradients, self-heating). Every contributor is first expressed as input-referred noise or error (µV or Ω), then converted to °C at the operating point, and finally combined using the correct math (RSS for uncorrelated RMS terms; worst-case or allocated limits for systematic terms).

Step-by-step conversion: input-referred → °C

  1. Lock the configuration: output data rate and digital filter mode define bandwidth and mains rejection.
  2. Pick sensitivity at the operating point: Thermocouple uses S(T)=dV/dT (µV/°C). RTD uses dR/dT (Ω/°C), and with constant-current excitation, dV/dT = IEXC·dR/dT.
  3. Express each contributor as input-referred: (µVRMS or ΩRMS for noise, or µV/Ω for bias terms).
  4. Convert to temperature: Thermocouple: °CRMS ≈ VRMS/S(T). RTD (resistance domain): °CRMS ≈ RRMS/(dR/dT). RTD (voltage domain): °CRMS ≈ VRMS/(IEXC·dR/dT).
  5. Combine correctly: RSS for uncorrelated noise terms; keep systematic terms as allocated limits and sum by worst-case policy.

Source layers (and what they become)

  • Sensor & cable: source resistance noise; pickup that shows up as measured input-referred ripple (often near 50/60 Hz and harmonics).
  • Amplifier/PGA: voltage noise en, current noise in×RSOURCE, and 1/f that dominates low-frequency stability.
  • ADC: input-referred noise at the chosen OSR/filter; “24-bit” does not imply noise-free temperature resolution.
  • Reference & excitation: drift/noise maps to gain error or ratiometric residual; treat as systematic unless proven random within the bandwidth.
  • Thermal error terms: thermal EMF, CJC offset/noise, gradient error, and RTD self-heating (often dominant in °C even when electrical noise is small).

Minimum auditable budget table (structure)

A usable budget must record the domain, the conversion, and the verification method. The list below is a “table template” that can be copied line-by-line during implementation.

  • Item: (e.g., Amp 1/f, ADC input noise, Mains residual, CJC gradient, Thermal EMF, Self-heating)
  • Domain: µVRMS, ΩRMS, ppm, or °C
  • Input-referred: µVRMS or ΩRMS at final bandwidth
  • To °C: °CRMS or °C (allocated limit)
  • Type: Random (RSS) or Systematic (limit / worst-case policy)
  • Verification: how to prove it (shorted-input noise, known injection, step/settling test, airflow/gradient sensitivity check)

The budget is complete when the dominant term is identified and tied to a concrete mitigation action.

Dominant-term diagnosis (why budgets matter)

  • If CJC gradient or thermal EMF dominates, increasing ADC bits will not improve °C accuracy.
  • If mains residual dominates, the fix is filter window/data rate and input hygiene, not a “lower-noise ADC”.
  • If RTD self-heating dominates, reduce excitation or use duty-cycled scanning and validate the rise empirically.
Auditable error budget: convert input noise to temperature and identify the dominant term Concept stacked budget chart showing multiple contributors in degrees C, alongside an input-referred column in microvolts. A callout highlights that optimization should target the dominant contributor rather than converter bit depth. Error budget is about the dominant term, not the ADC bits Input-referred (µV / Ω domain) Amp 1/f + offset drift ADC input noise (final filter) Mains residual (50/60) Reference / excitation drift Thermal EMF + junctions CJC offset + gradient Convert µV → °C at S(T) Temperature contribution (°C domain) CJC gradient Thermal EMF Mains residual Ref / excitation ADC noise Amp noise Other Mitigate the dominant block first (higher ADC bits rarely fix thermal terms) Build the budget with a verification column; then optimize the largest °C contributor.

Multi-channel scanning: MUX, settling, and filter latency traps

In multi-channel thermocouple/RTD measurement, many “mystery drifts” come from switching artifacts rather than the sensor. Channel switching creates a step event that must settle through input RC, amplifier/PGA, and ΣΔ digital filter memory. If readouts are taken too early, the result is not a true channel value but a mixture of transients and filter history.

What MUX/relays/solid-state switches change (AFE-level)

  • Leakage paths: temperature- and contamination-dependent leakage can create input bias errors, especially at high impedance nodes.
  • Charge injection / step disturbance: switching injects a transient that must settle before the channel is valid.
  • Thermal EMF at junctions: more contacts and dissimilar metals increase the chance of µV-level offsets that drift with gradients.

Settling has three components (each must be budgeted)

  1. Input RC + source impedance: cable + protection/filter form a time constant that differs by sensor and wiring.
  2. PGA/amplifier settling: gain or input changes can require extra time beyond the simple RC constant.
  3. ΣΔ filter group delay: strong mains rejection increases filter memory; after a channel switch, output needs multiple cycles to flush prior history.

Practical scanning recipe (repeatable and auditable)

  1. Switch channel (keep routing consistent; avoid unnecessary gain changes).
  2. Wait analog settling (RC + amplifier) until the residual is below the allocated °C error.
  3. Discard N output samples to clear digital filter memory (N depends on filter mode and output rate).
  4. Capture M valid samples inside a defined window; optionally average to reduce random noise.
  5. Group channels by similar source impedance and required filter settings to share one dwell policy.

Built-in self-check channels (catch drift vs real temperature)

  • Shorted-input (TC) check: a periodic shorted channel monitors AFE offset/µV drift and highlights thermal EMF issues.
  • Reference resistor (RTD) check: a fixed RREF channel monitors excitation/ratio stability and long-term gain behavior.
  • Scan-order sanity: schedule check channels at stable intervals to detect “scan-induced” artifacts early.
Scan timing: channel switch, analog settling, filter latency, and valid output window Timeline diagram showing channel select changes, analog settling interval, digital filter discard samples, and a valid measurement window. Emphasizes that dwell time must include both analog settle and filter group delay. Channel dwell must include settling and filter latency time → Channel select Analog settling Filter latency Valid window CH 1 CH 2 CH 3 Wait analog settle Discard N samples VALID Per-channel dwell = analog settling + filter latency + measurement window Without a defined discard/settle policy, scan readings can be filter-history mixtures, not true channel values.

Linearization & calibration: TC polynomials and RTD CVD, done in firmware

A temperature AFE becomes trustworthy only after two steps: linearization (converting µV or Ω to °C) and calibration (removing repeatable offsets and gain errors without “fitting noise”). Firmware should treat thermocouple type, RTD coefficients, and calibration sets as explicit configuration items, tied to a known measurement mode (data rate and filter), so the conversion is auditable and repeatable.

Thermocouples: segmented polynomials with CJC correctly applied

  • Keep “type” as configuration: firmware selects one coefficient set (and its valid range), not a universal table.
  • Segmented polynomial discipline: the implementation must define how segments are selected and must avoid discontinuities at segment boundaries.
  • CJC is an EMF add, not a temperature add: the robust workflow is: convert Tcold to Vcold (equivalent thermocouple EMF), add Vhot=Vmeas+Vcold, then invert EMF to Thot.
  • Range awareness: if the measured EMF or inferred temperature is outside the configured range, output overrange rather than a misleading number.

RTDs: CVD mapping and coefficient realism

The Callendar–Van Dusen (CVD) model maps resistance to temperature with a small set of coefficients. Firmware should treat the RTD nominal and coefficient set (including α variants) as configuration, not a hard-coded assumption, because coefficient mismatch becomes a systematic temperature error.

  • Inversion method: for R→T, use a controlled method (iteration or a bounded LUT) that is stable across the intended temperature range.
  • Coefficient integrity: store coefficient set IDs and apply the same set during calibration and normal operation.
  • Do not over-model: keep the model simple; use calibration to remove repeatable offset/gain rather than fitting high-order curves.

Calibration strategy (separate what can be separated)

  • End-to-end (2-point): removes repeatable offset and gain error over a defined range with minimal complexity.
  • Multi-point: improves residuals only if the thermal condition is stable and points are well-distributed; avoid high-order fits.
  • Calibrate CJC separately: treat CJC offset as its own term; do not “hide” it inside the thermocouple end-to-end fit.
  • Per-channel trims: use channel-level offset/gain trims to enforce channel-to-channel consistency in scanned systems.

Avoid “calibrating noise” (hard rules)

  1. Only calibrate in stable thermal conditions: require a low temperature-change-rate window before capturing calibration points.
  2. Average long enough: the averaging window must match the final filter/data rate (otherwise mains residual is fitted as offset).
  3. Use bounded fits: prefer 2-point or low-order correction; high-order fits easily absorb short-term noise and worsen long-term accuracy.
  4. Freeze configuration: store which filter mode/data rate was used during calibration and warn if operation differs.

Calibration data hygiene (auditable firmware behavior)

  • Metadata: coefficient set ID, calibration version, temperature range label, and measurement configuration (filter/data rate).
  • Runtime reporting: expose which calibration set is active and whether it is valid for the current mode.
  • Fail-safe: if calibration is invalid or missing, output a clear quality status rather than silently using defaults.
Temperature conversion pipeline: calibration, CJC, linearization, and output quality Data path diagram showing raw ADC codes converted through offset/gain calibration, cold-junction compensation, linearization (thermocouple polynomial or RTD CVD), then producing temperature output with quality bits. Each stage is labeled with the error it corrects. Firmware pipeline: fix the right errors in the right order Raw code ADC output Offset / gain fix repeatable errors CJC add cold-junction EMF Linearize TC poly / RTD CVD Temperature output value + overrange + calibration-valid + quality bits Fix offset & gain Add CJC EMF Map to °C correctly Store coefficient IDs and calibration mode; warn if runtime filter/data rate differs from the calibrated configuration.

Fault detection: open/short, burnout, reversed polarity, and plausibility checks

Field faults should be detected at the channel level and reported as explicit flags. A robust AFE distinguishes hard faults (open/short/overrange) from wiring mistakes (reversed polarity or miswired leads) and from soft faults (intermittent contact, drift, or instability). The goal is not to “guess the temperature” during a fault, but to output a temperature value only when the measurement is valid and to attach quality information otherwise.

Thermocouple checks (channel-level)

  • Open circuit: use a controlled bias/burnout current so a floating input moves to a recognizable extreme; then assert OPEN.
  • Reversed polarity: detect sign inconsistency and trend inconsistency (temperature increases but EMF decreases); assert REVERSED.
  • Overrange / clipping: if input protection or ADC rails, assert OVERRANGE and suppress misleading temperature output.

RTD checks (open/short and 3-wire failure cues)

  • Open / short: compare inferred resistance against physically plausible bounds for the configured RTD and range; assert OPEN or SHORT.
  • 3-wire compensation failure: if lead mismatch breaks the cancellation assumption, readings can drift with terminal temperature or show step-like jumps; assert LEAD_MISMATCH or degrade quality.
  • Overrange: if the inferred R(T) exceeds configured range, assert OVERRANGE instead of extrapolating beyond validity.

Plausibility checks (reduce false positives)

  • Rate limit: apply a maximum dT/dt bound per channel; if exceeded, mark SUSPECT rather than immediately declaring a hard fault.
  • Neighbor consistency (only when justified): compare to physically adjacent channels of the same sensor class; use as a quality hint, not a sole fault trigger.
  • Instability detector: if short-term variance exceeds a threshold at fixed filter settings, set UNSTABLE quality.

Define the diagnostic interface (what to output)

  • fault_flags: OPEN, SHORT, REVERSED, OVERRANGE, CJC_INVALID, LEAD_MISMATCH
  • quality_bits: OK, SUSPECT, UNSTABLE, SETTLING, CAL_INVALID
  • raw_status: ADC_CLIP, FILTER_NOT_SETTLED, CJC_OOR (out of range)

Temperature is trustworthy only when fault_flags are clear and quality_bits indicate OK.

Fault decision flow: symptoms to detection to output flags Three-column flow diagram. Left column lists symptoms (open, short, reversed, clipping, drift/unstable). Middle column shows detection methods (bias pull, thresholds, sign/trend check, clip detect, plausibility). Right column shows output flags (fault_flags and quality_bits). Channel diagnostics: detect, label, and gate the temperature output Symptom Detection Output OPEN Bias pull / burnout fault: OPEN SHORT R / V thresholds fault: SHORT REVERSED Sign + trend check fault: REVERSED CLIP ADC rail detect fault: OVERRANGE UNSTABLE Rate + variance quality: SUSPECT gate output Prefer explicit flags over hidden heuristics: gate temperature output when fault flags are set or quality is degraded.

Validation checklist: prove accuracy, rejection, and drift (lab-friendly)

This checklist turns “it seems stable” into repeatable numbers with a clear pass/fail decision. Each test defines a minimal setup, a metric calculation, and a criterion that ties back to the allocated error budget. Keep the DUT configuration fixed during validation (data rate, digital filter, notch mode, PGA/range, excitation current), and record the configuration alongside the data.

How to run the checklist (audit-friendly)

  1. Freeze the mode: data rate + filter + notch + range/excitation define the measurement bandwidth and latency.
  2. Log raw + temperature: capture raw code (or input-referred value) and final °C output in the same stream.
  3. Discard settling: for scan tests, discard initial samples after each switch before computing metrics.
  4. Attach metadata: store calibration ID, coefficient set ID, and measurement mode in the test report.

Test 1 — Noise & resolution (short-term stability)

  • Setup: thermocouple input short (low-thermal-EMF shorting fixture); RTD simulated by a precision resistance source.
  • Example lab items (equivalents OK): IET Labs RS-200 decade resistance substituter; Keysight 34465A/34470A, Keithley DMM6500, or Fluke 8846A for cross-checks.
  • Procedure: after warm-up, log N seconds of output at the final filter/data-rate; compute °CRMS and °CPP.
  • Metric: °CRMS (and optionally Allan deviation at τ=1–10 s for stability profiling).
  • Pass criteria: °CRMS ≤ allocated random-noise budget for this mode (criteria must be stated together with filter/data rate).

Test 2 — 50/60 Hz rejection (notch effectiveness)

  • Setup: inject a controlled 50 Hz / 60 Hz interference component through a repeatable coupling network.
  • Example lab items (equivalents OK): Keysight 33500B series or RIGOL DG4000 series function generator; Vishay RN55/RN60 metal film resistors; shielded twisted-pair such as Belden 1800F.
  • Procedure: capture with notch OFF and notch ON at the same output data rate; compute residual ripple in °C and the rejection in dB.
  • Metric: Rejection(dB) = 20·log10(Injected / Residual) and residual ripple (°CPP or °CRMS).
  • Pass criteria: residual at 50/60 Hz ≤ allocated mains-residual budget (or rejection ≥ target dB) for the selected mode.

Test 3 — CJC gradient sensitivity (airflow & local heating)

  • Setup: hold the thermocouple input at a stable point (short or simulator), then apply controlled airflow or localized heating near the cold-junction region.
  • Example lab items (equivalents OK): Noctua NF-A4x10 fan (repeatable airflow); 3M 8810 thermal pad or 3M 986 thermal tape (mounting/isothermal experiments); aluminum/copper isothermal block (simple machined fixture).
  • Procedure: run a baseline, apply a defined disturbance step (fan on/off or mild local heat), log the CJC reading and final temperature output.
  • Metric: CJC-induced temperature error (°C step response, °C drift per disturbance condition).
  • Pass criteria: worst-case CJC error under the defined disturbance ≤ allocated CJC/gradient budget.

Test 4 — RTD self-heating curve (excitation current sweep)

  • Setup: a real RTD probe in a stable thermal environment (ice bath, thermal block, or controlled ambient) while sweeping excitation current.
  • Procedure: step excitation current across intended operating points; wait for thermal steady state at each step; log temperature output.
  • Metric: ΔTself-heat(I) = T(I) − T(Ilow) and slope vs I² (for model sanity).
  • Pass criteria: ΔTself-heat at nominal excitation ≤ allocated self-heating budget; if not, reduce I or duty-cycle measurement.

Test 5 — Scan settling (MUX + analog settle + ΣΔ latency)

  • Setup: two stable inputs (A and B) alternated by scan order; evaluate dwell time and discard-sample policy.
  • Example lab items (equivalents OK): Omega CL543B thermocouple simulator or Fluke 714B calibrator; IET Labs RS-200 for RTD simulation; switching examples: ADI ADG1208/ADG1219 (low-leakage analog switches) or Pickering reed relay modules (low-thermal-EMF switching class).
  • Procedure: switch A↔B; for each dwell setting, compute error vs time-after-switch (or sample index) until it converges.
  • Metric: settling curve: error(twait) or error(k); minimal dwell/discard to meet the allocated error.
  • Pass criteria: at target channel count & update rate, the required dwell/discard still meets the allocated settling error budget.

Test 6 — Warm-up & drift (prove stability over time)

  • Setup: stable input (short/simulator/decade box) and a simple logger (PC or microcontroller capture).
  • Procedure: log from power-on through warm-up (e.g., 1–2 hours), then extend to long duration (e.g., 24 hours) at a lower sample rate.
  • Metric: time-to-spec (minutes to enter ±threshold band), and drift (°C over 24 h, or °CPP).
  • Pass criteria: warm-up time ≤ limit and 24 h drift ≤ allocated drift budget for the intended environment.

Minimal report template (copy/paste)

Mode: data_rate=____ filter=____ notch=____ range/PGA=____ I_EXC=____
Calibration: cal_id=____ coeff_set_id=____ date=____
Test item: ____
Setup: ____
Metric: ____
Pass criteria: ____
Result: PASS / FAIL
Notes: settling discarded=____ warm-up time=____ ambient logged=YES/NO

Lab BOM examples (part numbers to start fast)

  • TC / temperature sources: Omega CL543B (TC simulator class), Fluke 714B (temperature calibrator class)
  • RTD / resistance simulation: IET Labs RS-200 (decade resistance substituter class)
  • Cross-check DMMs: Keysight 34465A/34470A, Keithley DMM6500, Fluke 8846A
  • 50/60 injection: Keysight 33500B series or RIGOL DG4000 series; Vishay RN55/RN60 resistors; Belden 1800F shielded pair
  • Scan switching (examples): ADI ADG1208, ADI ADG1219; Pickering reed relay modules (low-thermal-EMF switching class)
  • CJC gradient fixtures: Noctua NF-A4x10 fan; 3M 8810 thermal pad; 3M 986 thermal tape; simple aluminum/copper isothermal block

Equivalent instruments and fixtures are acceptable as long as the setup is repeatable and the injected stimulus is quantified.

Validation matrix: test item, setup, metric, and pass criteria Matrix diagram listing six lab-friendly validation tests for thermocouple and RTD AFEs. Columns: Test item, Setup, Metric, Pass criteria. Each row summarizes one executable use case. Validation matrix (setup → metric → decision) Test item Setup Metric Pass criteria Noise / resolution Short / RS-200 stable mode °C RMS ≤ alloc (mode-bound) 50/60 rejection 33500B/DG4000 inject sine dB, ripple ≥ target or ≤ alloc CJC gradient NF-A4x10 + block airflow step °C step ≤ alloc (defined disturb) RTD self-heating I sweep steady env ΔT(I) ≤ alloc at nominal I Scan settling A↔B switching dwell/discard error(t) meets alloc at target rate Warm-up + drift power-on log to 24 h °C/24h ≤ alloc + time-to-spec Every row must produce a number and a decision; always record the exact filter/data-rate mode with the result.

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FAQs (Thermocouple / RTD AFE)

Practical answers focused on CJC, low-drift front-ends, 24-bit ΣΔ conversion, mains rejection, scanning behavior, calibration, and validation.

1) Why doesn’t “24-bit ADC” automatically mean “0.01°C accuracy”?
A 24-bit output code width is not the same as usable temperature accuracy. Real accuracy is set by noise-free bits (ENOB), front-end offset/drift, reference/excitation drift, and thermals (CJC error, gradients, and thermal EMF). Convert input-referred noise to °C using sensor sensitivity (µV/°C for thermocouples, Ω/°C for RTDs), then add drift terms for a full error budget.
2) For thermocouples, is the dominant error usually CJC or noise—and how can they be separated?
Noise shows up as fast random jitter (higher °CRMS) while CJC/gradient issues appear as slow shifts that correlate with airflow, nearby heating, or terminal temperature changes. Separate them with two quick checks: (1) short the input and measure °CRMS to reveal the noise floor, then (2) apply a controlled airflow/heat disturbance at the cold-junction area and observe any step-like output shift.
3) Should the CJC sensor sit right at the terminals or at a “board average temperature” spot?
CJC must measure the temperature of the cold-junction definition region, not the general board average. Place the sensor where the terminal metals and copper form an isothermal zone, with a short thermal path and symmetric layout. Avoid heat sources and direct airflow. If gradients are unavoidable, add thermal mass (an isothermal block/plate) so terminals and sensor track the same temperature during disturbances.
4) When is 3-wire RTD good enough, and when is 4-wire mandatory?
3-wire RTD works when the two “matching” lead resistances remain nearly equal over time and temperature, and the AFE uses the intended measurement/switching method to cancel them. It breaks down with long or mismatched leads, connector aging, temperature gradients along wiring, or aggressive multi-channel scanning. 4-wire is the safe choice when accuracy budgets are tight or lead resistance changes cannot be controlled.
5) How should RTD excitation current be chosen to avoid self-heating “fake temperature rise”?
Choose excitation current from an error budget, not from “bigger signal is better.” Higher current improves SNR but increases I²R heating and creates a real offset in °C. The fastest method is an I-sweep validation: measure temperature at multiple excitation levels in a stable environment and build ΔT(I). Then set the nominal current where ΔT stays below the allocated self-heating budget (or use duty-cycled excitation).
6) How can strong 50/60 Hz rejection be achieved without making readings painfully slow?
Mains rejection and response time trade against each other because deeper notches usually require longer effective averaging windows. Practical tuning uses three knobs: output data rate, digital filter/notch selection, and (for scanned systems) discard/settling policy after switching. Align the conversion/filter mode with 50/60 Hz so the notch lands where needed, and avoid over-filtering modes when faster thermal dynamics must be tracked.
7) After multi-channel scanning, is drifting usually analog settling or ΣΔ digital filter latency?
Analog settling typically looks like a rapid, decaying error after a channel switch (set by RC, source impedance, and amplifier/PGA settling). ΣΔ filter latency appears as a smoother, delayed convergence where the “effective response” shifts when filter length or data rate changes. A clean diagnosis is to sweep filter/data-rate modes: if the delay moves with the filter, it is group delay; if not, it is analog settling or leakage effects.
8) Can thermocouple open-wire detection (bias/burnout current) corrupt normal measurements?
Yes—any bias/burnout current can create a small offset by flowing through source impedance and input networks, especially in microvolt-level thermocouple paths. Mitigation is straightforward: use the smallest current that still guarantees open-wire detection, pulse or time-gate it (enable only during checks), and mark the output with quality bits when the diagnostic path is active. Validate by comparing noise/offset with detection enabled vs disabled.
9) Why do terminals, relays, or mixed metals create thermal EMF that biases readings?
Thermal EMF is generated when dissimilar metals form junctions under a temperature gradient—effectively creating unwanted “mini thermocouples” that add microvolts of offset. Relays, connectors, screws, and mixed plating can all contribute. The fix is isothermal discipline: keep junctions in the same thermal zone, use symmetric routing, minimize gradients from airflow or nearby heat sources, and avoid unnecessary metal transitions in the microvolt path.
10) Should linearization (TC polynomials / RTD CVD) run in the MCU or inside the ADC—what are the risks?
MCU-side linearization is usually preferred for auditable systems: coefficients can be versioned, reviewed, updated, and tested with corner cases (overrange, invalid CJC, fault flags). ADC-internal linearization can be convenient but may be a black box with limited visibility into segmentation, rounding, and coefficient handling. The safest choice is the path that supports traceable coefficient control and consistent behavior across firmware revisions and calibration sets.
11) Calibration order: calibrate CJC first, or front-end gain/offset first?
Treat CJC as its own measurement channel: calibrate CJC offset/scale in a stable thermal condition so the cold-junction reference is correct and repeatable. Then calibrate the front-end (offset and gain) using stable electrical stimuli (short/simulator/precision resistance). Finally verify linearization with a few check points. Avoid “calibrating noise” by averaging long enough and documenting the exact filter/data-rate mode used during calibration.
12) What is the fastest validation flow to prove accuracy, mains rejection, and drift all meet spec?
Use a minimal four-step proof that produces numbers and decisions: (1) short/simulate inputs to measure °CRMS noise, (2) inject 50/60 Hz to quantify residual ripple or rejection dB, (3) disturb the cold-junction region (airflow or mild heating) to measure gradient sensitivity, and (4) log warm-up time-to-spec plus an overnight drift metric. Add scan-settling only if multi-channel switching is required.