Cores & architecture, memory & boot, clock & power, analog & timing, digital interfaces, connectivity, security & safety, motor-control specialty, HMI/multimedia, packaging & grades, dev ecosystem, key specs, design hooks, and quick pairings.
Cores & Architecture
8/16-bit Cores
Simple, low-cost and real-time friendly; appliances and basic control.
ARM Cortex-M Series (M0+/M3/M4/M7)
M0+ ultra-low power; M4/M7 with FPU/DSP from general-purpose to higher compute.
ARM Cortex-M23/M33 (TrustZone-M)
Lightweight isolation with low power; IoT and secure peripherals.
RISC-V MCUs
Open ISA with scalable DSP/accelerators; industrial, education and emerging platforms.
Dual-Core / Heterogeneous
Task split with low-latency real-time core plus application core (e.g., M33+DSP/M0+).
Safety / Secure Cores
Lockstep/ECC with FMEDA collateral for ASIL/SIL designs.
Memory & Boot
On-Chip Flash / EEPROM
Code and parameters; erase/write endurance and temperature behavior.
SRAM / TCM / Cache
Determinism and ISR latency optimization with local memories.
External Memories (QSPI/OSPI/SDRAM/PSRAM)
XIP and expanded space for graphics/UI and logging.
Boot Modes & Secure Boot
ROM bootloaders with signatures/hashes and anti-rollback policies.
Clock & Power
Internal RC / External Crystal
Startup time versus accuracy trade-offs for timing-sensitive I/O.
On-Chip DCDC / LDO
Efficiency vs. noise; care with mixed analog/RF boards.
Low-Power Domains
Sleep/Stop/Standby with retention registers and RTC islands.
Analog & Timing
ADC (SAR / Delta-Sigma)
Channel count, resolution/sample rate, queuing/DMA; motors and instruments.
DAC / Comparator / Op-Amp
Signal conditioning with reference buffering.
Timers / PWM / Encoder
High-res PWM, dead-time and complementary outputs for motor/PFC.
High-Resolution Timers / Capture
Nanosecond capture/steps for servo and ultrasound.
Digital Interfaces
I²C / SPI / UART
Multiple instances, DMA/DMAMUX and wake; general system bus glue.
CAN / CAN-FD / LIN
Selective wake and timestamping; body and chassis networks.
Ethernet MAC / TSN
PTP hardware timestamps with MII/RMII/RGMII; industrial gateways.
USB FS/HS (Device/Host/OTG)
HID/CDC/Mass-Storage and Type-C peripherals.
SDIO / QSPI / OSPI
Storage/display offload and XIP support.
MIPI / I3C
Sensor/camera links and hybrid bus options.
Connectivity & Wireless
MCU + RF Combo
Wi-Fi/BLE/Sub-GHz/Thread/Matter; low-power, always-connected nodes.
External Radio Host Interface
SPI/UART links to RF SoCs for layered radio designs.
Security & Reliability
TrustZone / MPU
Trusted execution and memory isolation on MCUs.
Crypto Engines
AES/SHA/PKA/TRNG acceleration for TLS, secure-boot and OTA.
PUF / Secure Key Storage
Protect keys and prevent cloning with device-unique PUF.
ECC on Memories
ECC on RAM/Flash for industrial and automotive reliability.
Functional Safety
Lockstep, self-test, watchdogs and clock/power monitors with ISO 26262/IEC 61508 support.
Motor & Control Specialty
Advanced Motor Timers
Three-phase interlocks/dead-time with Hall/encoder capture.
Motor AFE Hooks
Op-amp/comparator hooks and over-current windows.
FOC Libraries & Position Interfaces
Resolver/ABZ and CORDIC/DSP accelerators for FOC.
Graphics & HMI
TFT/LCD Controller
Layers, parallel/DSI links and 2D acceleration (DMA2D).
Audio Interfaces (I²S/SAI/PDMA)
Double-buffering with low-jitter MCLK for voice and conferencing.
Packaging & Grades
Small Packages / Low Pin-Count
WLCSP/QFN/QFP for compact and cost-sensitive designs.
Automotive / Wide-Temp (AEC-Q100)
-40~125 °C operation with reliability and longevity programs.
High-Pin BGA/LGA
Enables concurrent peripherals and higher-speed interfaces.
Dev Ecosystem
IDE / Toolchains
GCC/LLVM, Keil/IAR, CMake and debug probes.
RTOS & Middleware
FreeRTOS/Zephyr, TCP/IP, USB, filesystems and GUI stacks.
BSP / Reference Boards
HAL/LL frameworks and vendor SDKs (Cube/MCUXpresso/SDK).
Manufacturing & Test
Production programming, boundary-scan, test firmware and logging.
Key Specs & Selection
CPU MHz & DMIPS/MHz
Interrupt latency and determinism under load.
Flash / RAM Size
Right-size for code footprint and buffering.
Analog Accuracy (ADC ENOB/Linearity, Ref Drift)
Match to target sensors and closed-loop requirements.
Peripheral Bandwidth
DMA/bus matrix/cache effects on concurrency and jitter.
Low-Power Numbers
Run/Sleep/Stop/Standby current with wake sources/times.
Security & Longevity
Security feature set and 10–15y longevity programs.
BOM & Availability
Pin-to-pin alternates and cross-family compatibility.
Design Hooks & Pitfalls
Clock Tree & Jitter
USB/ETH/PTP sensitive; crystal/TCXO placement and return paths.
Power Domains & Grounding
Partition analog/digital/RF with dense near-pin decoupling.
Pin-Mux Conflicts
Plan peripheral concurrency and reserve debug/production ports.
Boot & Security
Secure-boot chain, debug-port lockdown and production key injection.
EMC & ESD
Routing, guard/ground moats and interface TVS selection.
OTA & Field Service
Dual-partition images, rollbacks and health/logging.
Thermal & Mechanical
Place high-current I/O and motor PWM wisely; copper and cooling.
Quick Pairings
Industrial Acquisition
Cortex-M33 + 16–24b SAR/ΔΣ + TSN/PTP + isolated SPI & power.
Motor Control
M4/M7 + advanced PWM + 3-phase current sampling + encoder + FOC libs.
IoT Nodes
Ultra-low-power M0+/M33 + BLE/Thread + TrustZone + secure boot/OTA.
Automotive Gateway
M7/M33 dual-core with 2×CAN-FD + Ethernet and security/safety blocks.
