Charge Amplifier with Reset for Piezo & IEPE Sensing
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A charge amplifier converts a piezoelectric sensor’s generated charge directly into a voltage (Vout ≈ −Q/Cf), so sensitivity stays stable even when cable/sensor capacitance changes. Because real leakage and bias slowly push the integrator toward saturation, a controlled reset is used to restore the operating point while keeping reset injection and drift within measurable, verifiable limits.
H2-1 · Quick Answer — Core idea & practical fit
A charge amplifier converts a piezoelectric sensor’s output charge Q into a voltage by forcing that charge onto a feedback capacitor Cf, so the output is approximately Vout ≈ −Q/Cf. This keeps sensitivity far less dependent on sensor or cable capacitance, making it well-suited for ultra-high-impedance sources and measurements where low-frequency drift and installation variation matter.
A reset mechanism is required because leakage and input bias currents slowly push the integrator toward saturation over time. A controlled reset restores headroom while keeping reset-injection error (steps/spikes and baseline uncertainty) within a verifiable limit.
- Long or moving cables where capacitance changes and voltage-mode sensitivity drifts.
- Piezo/charge-output sensors where the spec is naturally in pC per unit (e.g., pC/g) and stable sensitivity is needed.
- Event/impulse sensing where controlled recovery (reset window) is acceptable and predictable.
- Very high source impedance where leakage, humidity, and board contamination dominate error if not managed.
- True DC / quasi-static sensing is required with no reset gaps permitted (use a different front-end strategy).
- The sensor is a standard IEPE voltage-output device and the goal is simply to digitize the IEPE output (use an IEPE interface).
- Humidity/contamination cannot be controlled and high-impedance layout/process is not feasible (leakage will dominate).
H2-2 · Boundary — vs TIA, voltage-mode, and IEPE interfaces
Piezoelectric sensing is most naturally described as a charge source with a capacitance. In voltage-mode front-ends, the measured voltage depends strongly on sensor and cable capacitance, so sensitivity can shift with cable length, routing, or installation. In charge-mode, the front-end forces sensor charge onto Cf, so sensitivity is primarily set by Cf; capacitance changes mainly affect stability and noise budgeting, not the nominal charge-to-voltage gain.
A charge amplifier resembles a TIA in that both use a virtual ground and feedback to convert a source quantity into voltage. The practical boundary is the measurand: a TIA is optimized around current measurement (bandwidth/linearity tradeoffs), while a charge amplifier is optimized around charge measurement where leakage, dielectric absorption, and reset behavior dominate long-term accuracy and uptime.
For IEPE sensors, the interface typically presents a conditioned voltage output using constant-current excitation and an internal buffer. This page focuses on charge/high-impedance behavior and reset integrity; detailed IEPE excitation, compliance, and standard interface design should be handled in the dedicated IEPE interface page.
| Source / sensor type | What varies in real systems | Recommended front-end | One-sentence reason |
|---|---|---|---|
| Piezo (charge output) | Cable capacitance, humidity/leakage, ultra-high source impedance | Charge amplifier + reset | Sensitivity locks to Cf; reset prevents slow saturation from leakage/bias. |
| Voltage output sensor | Source impedance, loading, bandwidth, noise density | Voltage amplifier | Measurand is voltage; avoid unnecessary integration and reset artifacts. |
| Current output / electro-sensor | Photodiode/sensor current range, bandwidth, linearity, biasing | TIA (transimpedance) | Measurand is current; optimize stability and linearity for I→V conversion. |
| IEPE (buffered voltage) | Excitation current, compliance, AC coupling, cable drive | IEPE interface + ADC front | Sensor already outputs a conditioned voltage; treat it as a voltage chain. |
H2-3 · Core Topology — The charge-to-voltage model (why it works)
A piezoelectric element is most usefully modeled as a charge source (Qs) with a capacitance (Cs) and an extremely large leakage path (Rp). The front-end forces the sensor node to a near-constant potential (virtual ground), so the sensor’s incremental charge is collected by the feedback capacitor Cf rather than being interpreted as a voltage across Cs.
The feedback resistor Rf (when present) is not a “gain-setting” element; it provides a DC return path for bias/leakage and defines the low-frequency behavior. At very low frequencies, more time is available for leakage and bias currents to accumulate, which is why long-duration measurements can drift toward saturation unless reset strategy and leakage control are treated as first-class design targets.
- Qs: the signal quantity (charge generated by stimulus).
- Cs + Ccable: capacitances that mainly affect stability/noise budgeting, not nominal Q→V sensitivity.
- Rp + board/switch leakage: slow error paths that set drift and long-term saturation risk.
- Cf: the sensitivity knob for charge-to-voltage conversion.
- Rf: the low-frequency corner and DC recovery path (if used).
Vout ≈ −Q / Cf (charge-to-voltage conversion)fc ≈ 1 / (2π · Rf · Cf) (low-frequency corner when Rf is present)Q = C · ΔV (useful for calibration via known capacitor injection)H2-4 · Sizing Cf, Rf & Reset — A step-by-step design workflow
Component sizing should be driven from signal headroom and long-term drift control. The workflow below starts from the largest real stimulus (worst-case event), maps it to maximum charge, selects Cf for output headroom, and then sets low-frequency behavior and uptime with Rf and a reset strategy that keeps injection artifacts measurable and containable.
Estimate maximum charge (Qmax)
Input: sensor charge sensitivity (pC per unit) and worst-case event (peak, not RMS).
Output: Qmax used for headroom sizing and saturation risk checks.
Set output headroom and choose Cf
Input: allowed output swing (Vout_max) with margin for drift and reset steps.
Compute: Cf ≥ Qmax / Vout_max.
Output: Cf that prevents frequent saturation and keeps reset cadence manageable.
Decide low-frequency intent (Rf vs reset strategy)
Question: is near-DC / very low frequency content required, and are reset gaps acceptable?
Rule: pushing fc lower increases the time window for leakage/bias accumulation; reset becomes the uptime mechanism.
Output: a clear policy: event-driven reset, periodic reset, or an alternative front-end approach (link out if needed).
Choose Rf for DC return and recoverability
Purpose: provide a DC path for bias/leakage and define the low-frequency corner when used.
Compute: fc ≈ 1 / (2π · Rf · Cf) (only if Rf is present).
Output: Rf that meets low-frequency goals without letting leakage and 1/f behavior dominate long-term accuracy.
Select the reset switch (integrity checklist)
Primary criteria: off leakage, charge injection/feedthrough, on resistance, voltage rating, and package contamination sensitivity.
Output: a reset implementation that restores headroom while keeping step/spike artifacts small and repeatable.
H2-5 · Drift & Ultra-Low Leakage — where designs fail in real life
In charge amplifiers, “drift” is rarely a single cause. It is typically the visible result of tiny DC leakage and bias paths injecting charge into the high-impedance node over time. Long time windows (low-frequency intent, long hold durations, high humidity) amplify these paths until the output creeps toward saturation or the baseline becomes unrecoverable.
- Amplifier input bias / protection leakage (often rises strongly with temperature).
- PCB surface leakage from contamination or humidity films (most common and invisible).
- Feedback capacitor DA / leakage (dielectric memory and long recovery tails).
- Reset switch off leakage / junction capacitance (high-Z node killer).
- Sensor intrinsic Rp drift (humidity/temperature/aging dependent).
Action: measure baseline drift slope with sensor connected (open) and with input node shorted to the reference point.
Interpretation: similar slopes point to front-end device leakage (amplifier/switch/PCB near node). Large improvement when shorted suggests surface leakage or sensor Rp strongly influenced by node potential.
Action: apply a controlled temperature step (warm-up) and a controlled humidity step (dry vs damp).
Interpretation: strong temperature acceleration often implicates input bias/protection leakage or switch leakage; strong humidity sensitivity usually implicates PCB surface leakage or sensor Rp drift.
Action: reset, then record the baseline slope for a fixed time window; repeat several times.
Interpretation: a consistent slope indicates a stable leakage current; changes between runs indicate memory effects (DA), environmental variability, or contamination-dependent conduction paths.
| Drift source | Typical signature | Direction / shape | Fast checks | Primary mitigations |
|---|---|---|---|---|
| Op-amp bias / protection leak | Strong temperature acceleration; less humidity-dependent | Mostly monotonic creep (polarity dependent) | Shorted-input slope ≈ open-input slope; heat step steepens slope | Ultra-low bias/leakage input devices; minimize extra protection at high-Z node |
| PCB surface leakage | Humidity-sensitive; intermittent; “invisible” residue | Creep may change with environment; can jump after moisture exposure | Humidity step response; IR measurement to nearby copper/ground; clean/coat A/B | Guard rings, slots, increased creepage; cleaning/baking; conformal coating if allowed |
| Cf DA / leakage | Post-reset “rebound tail”; history dependent | Slow return / memory tail; baseline recovery not immediate | Charge–reset–observe tail; compare capacitor dielectrics | Use low-DA dielectric (e.g., C0G/NP0) for Cf; avoid high-DA parts for precision baseline |
| Reset switch leak / Cj | Reset spike/step sensitive to edge rate; temperature dependent leakage | Reset step + monotonic creep after reset | Change reset edge rate / control swing; compare switch variants | Lowest leakage switch; symmetric structures; careful routing of control; keep node clean/dry |
| Sensor Rp drift | Behavior changes with sensor swap; humidity/aging dependent | Creep correlates with sensor condition and environment | Swap sensor A/B; humidity step at sensor; isolate cable/connector effects | Sensor sealing and environment control; specify Rp stability; robust connectors/cabling |
H2-6 · Reset Mechanisms — how to reset without corrupting measurements
Reset is not a cosmetic feature; it is the mechanism that keeps a charge amplifier usable over long time windows by restoring headroom. The challenge is that reset actions can inject a measurable step or spike (feedthrough/charge injection) and can also leave a baseline uncertainty (kT/C and residual offset). A robust design treats reset as a timed system event with a defined recovery window.
- Short Cf with a switch: simplest and most common; quality depends on leakage and injection control.
- Reverse charge / pull-back: apply controlled reverse charge/current to restore operating point (concept-level here).
- Periodic vs event-driven reset: trigger by timer, headroom threshold, or saturation proximity; pair with a measurement window.
Why it happens: switch charge injection and capacitive coupling from the reset control node into the high-Z node or Cf.
How it shows up: a repeatable spike/step at reset; amplitude changes with control edge rate and control swing.
Containment principles: symmetric switch structures, controlled edge rates, clean reference return, and a defined avoidance window that excludes the transient from valid measurement.
Why it happens: resetting a capacitor establishes a new initial condition with thermal uncertainty; smaller Cf increases sensitivity to this effect.
How it shows up: baseline scatter after reset; repeated resets create a distribution of starting baselines.
Containment principles: allocate a recovery interval before reopening the measurement window; size Cf with noise and reset timing in mind.
Reset integrity checklist (6 items)
- Off leakage: sets post-reset drift slope (symptom: baseline creeps fast even after reset)
- Charge injection / feedthrough: sets reset step/spike (symptom: spike scales with edge rate)
- Package & PCB hygiene: humidity sensitivity (symptom: behavior changes after moisture exposure)
- Drive timing (window gating): separate measure vs reset intervals (symptom: “valid data” contains reset transient)
- Return path / ground bounce: keep control currents out of the analog reference (symptom: extra glitch correlated with digital activity)
- Temperature drift: leakage and injection stability across temperature (symptom: hot vs cold reset behavior differs strongly)
H2-7 · Noise & Dynamic Range Budget — the real cost of a smaller Cf
A smaller feedback capacitor increases sensitivity (more volts per unit charge), but it also magnifies reset artifacts and baseline uncertainty. A practical budget converts dominant noise terms into an equivalent charge noise language, so changes in cable capacitance (Cin) and Cf choices can be compared consistently without mixing incompatible metrics.
- Voltage noise into Cin → equivalent charge: larger Cin turns the same amplifier voltage noise into a larger charge-equivalent disturbance.
- Current noise through the feedback path: becomes more visible in long windows and low-frequency operation where leakage and bias-related terms accumulate.
- Cf as a double-edged lever: smaller Cf increases sensitivity but makes kT/C, reset injection, and saturation risk more critical.
1) Amplifier voltage noise (en) mapped by Cin
Dominates when: cable/guard/protection capacitance is large (Cin ↑). Mitigation: reduce Cin (cable length, protection capacitance), and pick front-end devices that remain quiet/stable with the expected Cin.
2) Amplifier current noise / bias-related noise
Dominates when: long time windows and very low-frequency intent are required. Mitigation: use ultra-low input current devices, keep the high-Z node clean/dry, and avoid adding leakage paths near the node.
3) Feedback capacitor thermal baseline (kT/C) and reset-to-reset scatter
Dominates when: Cf is very small and measurement starts immediately after reset. Mitigation: allocate a settle window, size Cf with baseline certainty in mind, and avoid “instant-valid” data right after reset.
4) Reset injection artifact treated as an error term (step/spike)
Dominates when: Cf is small or reset edge rates are fast. Mitigation: symmetric switching, controlled edges, and explicit avoidance windows that exclude the injection transient.
5) 1/f noise vs ultra-low-frequency drift (time-domain separation)
Dominates when: the window extends to seconds/minutes and below. Mitigation: record long traces, compare slope vs RMS growth with window length, and verify repeatability across resets and environment steps.
H2-8 · Stability & Bandwidth — how Cin and parasitics break charge amplifiers
Charge-mode front ends are often described as “insensitive to cable capacitance” in terms of nominal sensitivity, but large sensor/cable/protection capacitance still reshapes the loop dynamics. The result can be ringing, oscillation, slow recovery after reset, or sudden noise increase. A stable design treats Cin and reset coupling as first-class loop elements.
- Cin at the high-Z node (sensor + cable + protection + PCB) forms extra dynamic poles/zeros with input and feedback parasitics.
- Finite amplifier bandwidth means the loop cannot maintain ideal virtual behavior across frequency; added Cin shifts where phase drops.
- Reset coupling can mimic stability issues by injecting transients that look like ringing or noise bursts.
- Feedback shaping near Cf: use careful capacitance/resistance placement to soften high-frequency loop gain (trade-off: bandwidth/noise distribution).
- Isolation for capacitive loading: small series resistance at appropriate points can reduce phase peaking (trade-off: output noise/swing).
- High-Z node discipline: minimize added capacitance and leakage near the node; guard/clean routing beats heavy RC damping.
| Symptom | Likely cause | One-step validation | First fixes (charge-amp scope) |
|---|---|---|---|
| HF ringing / overshoot after events | Phase margin loss due to Cin and parasitics; loop peaking | Shorten cable / reduce protection capacitance A/B; compare ringing amplitude | Gentle feedback shaping; reduce Cin near node; improve routing/guard discipline |
| Oscillation or squegging | Loop unstable with large Cin or capacitive load; coupling from control lines | Change reset edge rate; separate control activity; observe oscillation correlation | Isolate/reset routing; reduce coupling; adjust loop shaping and output isolation |
| Slow creep after reset (baseline drifts quickly) | Leakage paths dominate (switch/PCB/sensor Rp) rather than loop instability | Open vs shorted input slope test; humidity step test | Improve cleanliness/guard; lower leakage switch; control humidity exposure |
| Very slow recovery (long settle time) | Cf/DA memory effects; excessive low-frequency time constant; loop peaking | Compare reset-to-settle time across Cf types; check tail shape | Use low-DA Cf; refine settle window; moderate loop shaping for faster settling |
| Noise suddenly increases with cable length | Cin increases voltage-noise mapping and can worsen loop noise peaking | Cable length A/B; measure noise spectral/temporal change | Reduce Cin and protection capacitance; choose devices stable with expected Cin |
Do (safe, charge-amp scope)
- Keep the high-Z node small: minimize Cin additions and keep surfaces clean/dry.
- Control coupling: route reset/control lines away from the high-Z node and the feedback network.
- Use gentle loop shaping: prefer small, targeted compensation rather than heavy damping at the input.
Don’t (common instability traps)
- Don’t “fix” ringing by adding heavy input RC at the high-Z node (can harm signal and drift).
- Don’t pile protection capacitance directly onto the high-Z node without modeling the loop impact.
- Don’t ignore reset coupling: injection artifacts can look like instability unless windows are gated.
H2-9 · Implementation Details: layout, materials, process, fixtures (how pA is really achieved)
Goal: turn “ultra-low leakage” from a datasheet claim into a reproducible physical build. The dominant failures are surface leakage, humidity, fixture leakage, and coupling into the reset node—not the schematic.
9.1 High-Z Island rules (use these as layout acceptance criteria)
Define: High-Z island Minimize: exposed surface Enforce: guard + keep-out Verify: Open/Short drift- High-Z island includes op-amp input node(s), feedback capacitor pads, reset switch pins, and any copper that can form a leakage path to those nodes.
- Keep the island small and isolated: short traces, no long parallel runs, no unnecessary test pads on the sensitive node.
- Surround the island with a driven guard ring (same potential as the sensitive node or its buffer) to redirect surface leakage away from the input.
- Remove copper underneath: avoid routing signals or planes under the high-Z area (including inner layers).
- Assume humidity + residue are always present in the real world; the design must tolerate them via geometry + process control.
9.2 Guard ring, spacing, vias: the minimum set of “must-do” actions
- Guard ring: ring the input/feedback node perimeter; also guard around the feedback capacitor footprint and reset switch pins that touch the node.
- Spacing: maximize creepage/clearance around the node (pads, vias, traces). Avoid silk/ink crossing high-Z surfaces.
- Vias: avoid vias on the sensitive node; via barrels can trap residue and create humidity-dependent leakage. If unavoidable, keep the via on the guarded island and validate with humidity A/B.
- Reset routing: route reset control lines away from the high-Z node to reduce feedthrough; prefer short, clean edge routing with controlled return paths.
Do not expand scope here: protection/TVS/IEC surge sizing is referenced but not detailed on this page. Keep protection parts physically away from the high-Z island when possible.
9.3 Process control: cleaning, coating, handling (what makes results repeatable)
- Flux strategy: treat “no-clean” residue as a leakage risk in pA work; validate by measuring drift before/after cleaning.
- Cleaning: use a defined cleaning recipe (solvent, time, agitation, rinse, dry). A recipe without verification is not a recipe.
- Drying: bake/dry boards before critical measurements; then keep them in controlled humidity (bag/desiccant or chamber).
- Conformal coating: apply only after the baseline is understood. Coating can help moisture leakage, but may hide contamination if applied too early.
- Handling: keep high-Z surfaces away from fingerprints, silicone oils, and “mystery” adhesives. Use gloves and clean tools.
Example coating (verify compatibility)
- HumiSeal 1B31 (acrylic conformal coating)
- HumiSeal 1B31 Aerosol (quick rework / inspection-friendly)
9.4 Cables, connectors, fixtures: “the second PCB” that often dominates leakage
For pA-level work, the fixture and cable must be treated as part of the circuit. If the fixture leaks more than the DUT, the measurement becomes meaningless.
- Use guarded cabling where possible (triaxial) to reduce leakage and surface currents along the cable/connector.
- Keep sensitive nodes enclosed: avoid exposed high-Z nodes in open air drafts; control airflow and contact risk.
- Fixture insulation: prefer PTFE/PEEK standoffs and clean insulating surfaces; avoid hygroscopic plastics near the high-Z node.
- Reset feedthrough checks: if a reset line runs through the fixture, verify that “reset toggling” does not create fake signals at the output.
Example guarded cable assemblies
- Pomona 5223-36 (BNC Triax ↔ BNC Triax, 36″)
- Pomona 5223-60 (BNC Triax ↔ BNC Triax, 5′)
- Pomona 5054-60 (Triax BNC plug ↔ plug, 5′)
- Triax cable reference: Belden 9222 (commonly used in triax assemblies)
9.5 Do / Don’t checklist (stacked cards, mobile-safe)
Do (layout + process)
- Build a small High-Z island and surround it with a driven guard ring.
- Keep copper out from underneath the high-Z island (all layers).
- Validate with a humidity A/B test: drift should change predictably and improve after cleaning/coating.
- Use guarded/triax cabling for fixtures that must touch the sensitive node.
- Route reset control away from the node; verify reset toggling does not create fake output steps.
- Maintain a repeatable cleaning + dry + storage procedure, then record drift slopes per lot.
- Use clean, high-quality feedback capacitors (C0G/NP0 or film/foil) validated in drift tests.
- Design a fixture baseline: measure fixture leakage without DUT and keep that record.
Don’t (common failure patterns)
- Do not place the high-Z node next to hot switching power or high-speed digital edges.
- Do not run signals under/near the high-Z node “because it fits.”
- Do not add random RC parts on the input as a “fix” without measuring drift impact.
- Do not assume “no-clean flux” is safe for pA work unless verified by drift slope tests.
- Do not probe the high-Z node with standard scope probes; measurement tools can dominate leakage.
- Do not put test pads on the sensitive node unless guarded and justified by the validation plan.
- Do not ignore fixture leakage; a perfect PCB cannot compensate for a leaky jig.
- Do not coat first and hope; baseline first, then coat with A/B evidence.
9.6 Example parts list (specific MPNs to start from)
These are concrete reference MPNs commonly used in ultra-low leakage front ends. Verify voltage rating, package, and availability for the target design.
Electrometer / low-bias amplifiers
- Analog Devices ADA4530-1 (electrometer-grade front end option)
- Texas Instruments OPA140 (low input bias, precision JFET input)
- Texas Instruments OPA827 (precision JFET input option)
- Analog Devices LTC6268 (very low bias current class option)
Reset element (switch / relay)
- Analog Devices ADG1219 (low leakage analog switch candidate)
- Coto Technology 9007-05-00 (SIP reed relay, SPST-NO)
- Coto Technology 9007-24-00 (SIP reed relay variant)
Feedback capacitor Cf (low DA / stable)
- WIMA FKP2J011001D00JSSD (FKP2 film/foil example)
- WIMA FKP2-1000/100/5A (FKP2 example, 1000pF class)
- Murata GRM1885C1H102JA01D (C0G/NP0 1nF class example)
High-value Rf candidates (GΩ-class)
- Ohmite HVC0805Z1008KET (HVC series high-value SMD example)
- Ohmite HVC1206Z1008KET (HVC series high-value SMD example)
- Ohmite HVC1206Z5007KET (HVC series high-value SMD example)
Guarded cabling (fixtures)
- Pomona 5223-36, 5223-60 (BNC Triax cable assemblies)
- Pomona 5054-60 (triax BNC plug ↔ plug)
- Triax cable reference: Belden 9222
Conformal coating (moisture mitigation)
- HumiSeal 1B31 (liquid can)
- HumiSeal 1B31 Aerosol
H2-10 · Validation & Troubleshooting: prove it’s right, then localize drift fast
This section closes the loop: the front end is “correct” only when sensitivity, drift slope, and reset artifacts are measured and repeatable—not when the schematic matches an app note.
10.1 Validation checklist (3 proofs): sensitivity, drift, reset impact
Proof A — Sensitivity (known charge injection)
- Inject known charge:
Q = Cinj × ΔVvia a clean injection capacitor. - Measure slope:
Vout / Qshould match the intended≈ −1/Cfgain (within tolerance). - Repeat across several ΔV levels to confirm linearity and polarity.
Proof B — Drift (slope + root cause direction)
- Record drift slope after reset:
dV/dt(and convert todQ/dtif needed). - Compare Open vs Short at the input; log temperature and humidity.
- Swap one item at a time (switch, Cf, amplifier) and re-measure slope.
Proof C — Reset impact (artifact + recovery)
- Measure reset spike amplitude (peak or step) and time-to-usable baseline.
- Measure baseline scatter after repeated resets (distribution width).
- Define a measurement window that excludes reset artifacts.
10.2 Troubleshooting priority tree (fast localization by A/B tests)
Use the smallest change that produces the largest diagnostic signal. The recommended order: contamination/fixture → switch leakage → amplifier input → capacitor dielectric → sensor.
Symptom-driven tree (text form, executable)
- Drift ramps to a rail quickly → run humidity A/B and fixture-only baseline → if humidity sensitive, treat as surface leakage/fixture issue first.
- Open vs Short drift differs greatly → leakage path is at the input node/cable/connector → swap cable/fixture, then re-clean board area.
- Open and Short both drift similarly → suspect feedback path or reset element → swap reset element (switch/relay) and re-measure slope.
- Reset creates a large step/spike → feedthrough/injection dominated → slow edges, reroute reset control, consider relay option, re-validate spike amplitude.
- Noise floor suddenly increases with cable length → input capacitance/coupling dominated → reduce cable C, guard better, re-check stability margin.
- Drift improves after baking, then returns → moisture absorption/residue likely → improve cleaning + storage + coating, then re-run the drift slope log.
10.3 Practical “prove it” procedures (step-by-step)
- Sensitivity injection: use a clean Cinj, apply several ΔV steps, record Vout steps, fit slope, and store as the unit calibration signature.
- Open/Short drift: after a defined reset, record baseline for a fixed duration; extract
dV/dt; repeat at two humidity points. - Reset artifact: toggle reset with measurement input quiet; capture spike amplitude and settle time; define the minimum “ignore window” after each reset.
- Swap test: change only one component per run (reset element first); log delta in drift slope and reset spike to identify the dominant contributor.
10.4 Example validation BOM (specific MPNs for the bench)
Use these as concrete starting points for a controlled validation setup (cal injection, guarded cabling, and reset A/B).
Injection capacitor (C0G/NP0)
- Murata GRM1885C1H102JA01D (C0G/NP0 1nF class)
- (Optional) Murata C0G/NP0 in smaller values for finer Q steps (same GRM C0G family)
Reset A/B parts
- Analog Devices ADG1219 (switch A/B candidate)
- Coto Technology 9007-05-00 (relay A/B candidate)
- Coto Technology 9007-24-00 (relay variant)
High-value resistor A/B
- Ohmite HVC0805Z1008KET (high-value SMD)
- Ohmite HVC1206Z5007KET / HVC1206Z1008KET (alternatives)
Guarded fixture cabling
- Pomona 5223-36, 5223-60, 5054-60 (triax assemblies)
- Triax cable reference: Belden 9222
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H2-11 · FAQs (Charge Amplifier w/ Reset)
Each answer stays inside this page scope: charge-mode behavior, drift/leakage, reset artifacts, stability with cable capacitance, and practical validation. Example MPNs are provided as concrete starting points.
1Why is a charge amplifier not sensitive to cable capacitance, yet often harder to keep stable?
Cable/sensor capacitance does not “steal” gain in charge mode because the event charge is forced into the feedback capacitor (Vout ≈ −Q/Cf). However, a larger input capacitance still changes loop phase margin and noise gain, making ringing or oscillation more likely—especially with long cables and high-Z nodes.
- Field check: compare stability with short vs long cable; watch for ringing after reset edges.
- Mitigation: prioritize High-Z layout/guard, then small, measured compensation changes.
2Cf smaller increases sensitivity—what are the three most common new problems?
Smaller Cf raises sensitivity but typically amplifies three issues: (1) reset artifacts become larger (charge injection becomes a larger voltage step), (2) baseline scatter grows (kT/C and residual reset uncertainty become more visible), and (3) usable dynamic range shrinks, so saturation happens sooner unless reset strategy is tightened.
- Field check: measure reset spike peak and “time-to-usable baseline” across multiple resets.
3Is Rf really needed? What “slow failure” appears without it?
Without Rf, DC bias and leakage currents have no defined return path, so the integrator operating point can drift slowly until the output saturates (a “slow rail creep” that may look random). Adding Rf provides a DC path and defines a low-frequency pole, but it also imports leakage and 1/f effects—so reset remains important.
- Field check: log baseline drift slope after reset; estimate time-to-rail at worst humidity/temperature.
4Drift is often not the op amp—what is it, and how can a fast A/B test catch it?
The most common drift causes are surface leakage from contamination/humidity and leakage from fixtures/cables—both can dominate pA-level designs. A fast catch is “Open vs Short” plus humidity A/B: if drift changes strongly with humidity or improves after cleaning/drying, the dominant problem is usually surface/fixture leakage, not amplifier specs.
- Field check: fixture-only baseline (no DUT), then DUT Open/Short baseline under two humidity conditions.
5Why does reset create a step/spike, and how can injection error be reduced to an acceptable level?
Reset introduces artifacts mainly through switch charge injection and capacitive feedthrough into the high-impedance node; the effect becomes a visible step/spike at the output. Reduction methods include minimizing coupling in layout, using lower-injection reset elements, controlling reset edge speed, and defining a measurement window that excludes the post-reset recovery interval.
- Field check: toggle reset with a quiet input and quantify spike amplitude + recovery time.
6How should reset frequency be chosen—time-based or event-based—and what are the pitfalls?
Time-based reset is simple but can create periodic artifacts and reduce usable duty cycle if overused. Event-based reset (near saturation or drift threshold) preserves measurement time but depends on reliable detection and repeatable recovery behavior. A practical approach is to use measured drift slope to predict time-to-saturation, then add margin and validate across humidity/temperature.
- Field check: use drift slope logs to set reset margins; verify that event triggers do not false-fire on transients.
7What “fake signal / slow rebound” does dielectric absorption (DA) create, and how should Cf be selected to avoid it?
Dielectric absorption makes the feedback capacitor behave like it has memory: after a large event or reset, the baseline can slowly rebound, mimicking a low-frequency signal or unexplained drift. For charge amplifiers, Cf should favor low-DA dielectrics (C0G/NP0 or film/foil) and avoid high-DA ceramics in the critical feedback position when baseline fidelity matters.
- Field check: apply a known charge step, then watch the long tail and repeat after reset to see “memory” behavior.
8What are the typical signatures of humidity/contamination surface leakage, and what are the best layout/process defenses?
Surface leakage typically shows strong humidity dependence, lot-to-lot variability, and reversibility after drying/cleaning. The best defenses are physical: a small guarded High-Z island, copper keep-out under the node, controlled cleaning/drying/storage, and fixture/cable choices that do not create parallel leakage paths. Evidence should come from humidity A/B and Open/Short comparisons.
- Field check: measure drift slope at low vs high humidity; repeat after cleaning and controlled drying.
9Why do long cables and high-Z nodes oscillate, and what is the lowest-cost compensation approach?
Long cables increase input capacitance and coupling, which can reduce phase margin and amplify high-frequency peaking in a charge amplifier loop. The lowest-cost path is to fix geometry first (guarding, keep-out, short sensitive routing, reset line isolation), then apply minimal compensation based on measured symptoms (ringing, noise jump, slow recovery) rather than guessing.
- Field check: step response after reset with short/long cable; note ringing frequency changes.
10How is “known charge injection” calibration done, and what are the two most common mistakes?
Known charge injection uses a clean injection capacitor (Cinj) and a defined voltage step to create Q = Cinj×ΔV, then checks that the output step matches the expected −Q/Cf slope. Two common mistakes are (1) injection path feedthrough creating a fake step not representing charge transfer to Cf, and (2) using overly fast edges that trigger saturation or coupling artifacts.
- Field check: run an injection “blank” (fixture-only), then DUT; compare slopes and tails.
11Can an IEPE sensor be used with a charge amplifier? When should it not be used?
Many IEPE sensors include internal electronics and are intended for constant-current powered voltage output, so a classic charge amplifier is usually not the correct interface. A charge amplifier is appropriate when the sensing element is effectively a charge source/high-impedance source (or the interface provides raw charge). If the sensor is buffered (IEPE), use the intended voltage-mode readout instead of forcing charge mode.
- Field check: identify whether the sensor output is raw charge/high-Z or buffered voltage via the sensor interface specification.
12Intermittent saturation or “drifts after reset” in the field—what stacks of causes are typical, and what should be checked first?
Field failures are often stacked: humidity/contamination raises surface leakage, the reset element’s off-leakage increases with temperature, long cables worsen coupling/stability, and reset injection creates temporary baseline offsets. The fastest first checks are fixture-only baseline, humidity A/B drift slope, Open vs Short drift, then reset spike/recovery measurements—before swapping amplifiers.
- Field check order: fixture baseline → humidity A/B → Open/Short → reset spike & recovery → A/B swap reset element.
