Core idea Phase-sensitive detection (lock-in) extracts a signal by coherent projection onto a known reference: the input is multiplied by a reference at f₀, then low-pass filtered (integrated) so only the reference-coherent component remains. This is fundamentally different from “making a filter narrower”.

When it excels A lock-in approach is most effective when a stable reference exists and the signal can be moved (modulated) to a chosen frequency region.

• Very low SNR where broadband noise dominates and simple band-limiting cannot isolate the signal.
• Strong 1/f drift or slowly varying background that contaminates near-DC measurements; modulation shifts the signal away from the drift region.
• In-band interferers near the signal frequency where “just filtering” fails to separate coherent signal from non-coherent content.
• Acceptable response latency: longer integration improves sensitivity, but slows tracking of real changes.

Practical domains: optical absorption/fluorescence modulation, electrochemical impedance methods with reference excitation, ultrasound/ToF with gated reference, and any measurement that can provide a clean timing/phase anchor.

Hard boundaries Lock-in is not a universal noise reducer. Performance collapses when the coherence anchor is weak or when front-end linearity is violated.

• Unstable reference or uncontrolled phase drift → coherent gain is reduced (or randomized), and readings become fragile.
• Non-modulatable signals with no reliable reference → the method becomes “just a narrowband receiver” with fewer benefits.
• Overload / saturation anywhere before demodulation → coherent information is distorted; averaging may converge to a stable but wrong value.
• Fast transient events requiring rapid response → integration cannot be extended enough to gain sensitivity.

Decision shortcut Use the table below to quickly determine whether lock-in is the right tool before investing in implementation detail.

Intuition Lock-in works because multiplication with a reference turns the desired component at f₀ into a near-DC term, while everything not coherent with the reference becomes a rapidly varying term that is removed by low-pass integration.

• After mixing, the signal “moves” from ω₀ to 0 Hz (or a small residual beat if frequencies are mismatched).
• The low-pass / integrator rejects the 2f₀ product term and reduces broadband noise by time averaging.
• Integration time improves sensitivity but increases settling time; this trade-off is quantified later via ENBW.

Minimum math The following model is enough to predict the two main behaviors: phase sensitivity and coherent averaging.

The key result is the cos(φ) term: a single-phase lock-in directly converts phase error into amplitude error. This is why phase definition and tracking must be treated as a first-class design variable.

Why I/Q demod is the default A two-channel lock-in measures both projections so amplitude becomes robust to phase drift.

• Single-phase output can collapse when φ moves toward ±90°.
• I/Q keeps amplitude stable as long as coherence remains; phase can be measured rather than guessed.
• Many “unstable readings” in the field are actually phase alignment problems misdiagnosed as noise.

Coherent integration (what averaging really does) Integration is not only filtering; it is a coherence test over time.

• Coherent component (aligned with r(t)) accumulates with the same sign across the integration window.
• Non-coherent noise has random sign relative to r(t), so it partially cancels, pushing the mean toward zero.
• The practical “knob” is the effective noise bandwidth of the low-pass / integrator: narrower ENBW lowers output noise but slows response.

This chapter establishes the foundation; subsequent sections quantify ENBW vs settling time, and map common failure signatures (e.g., noise floor not improving with longer integration) to concrete root causes.

Goal A lock-in measurement is only as stable as its phase reference definition. The practical job is to make phase a traceable budget: define a zero-phase point, identify where delay is introduced, and choose correction points that remain stable across modes and temperature.

Typical signal chain The end-to-end path below is the minimum set of blocks that determine phase and coherence. Detailed implementations (PGA/TIA/filters/clamps) are intentionally kept out of scope.

• Excitation / modulation → defines the reference anchor at f₀.
• DUT / sensor → adds physical latency and frequency-dependent phase shift.
• Front-end amplification (keep linear) → adds group delay and can destroy coherence if overloaded.
• Demodulation (analog mixer or ADC + digital mixing) → projects onto the reference phase.
• Low-pass / integration → sets ENBW and the settling time of the reported value.
• Outputs → I/Q, amplitude, and phase relative to the defined zero-phase point.

Phase error map Most “unstable readings” are phase-budget problems. The list below turns phase into actionable segments.

In practice, the most stable correction is applied in the reference / digital domain (NCO phase offset, I/Q rotation, or digital delay alignment), because it stays repeatable across temperature and avoids analog tolerance drift.

Phase control points A robust architecture identifies where phase is defined and where it is adjusted.

• Zero-phase definition point: typically the excitation/modulation output or a synchronized timing edge.
• Correction point: phase offset (reference rotation), I/Q rotation, or digital delay alignment.
• Calibration point: loopback injection or known stimulus used to measure a fixed offset per mode.

Key message A reference is not “just the right frequency”. It is a phase anchor. Reference stability determines whether demodulation collapses into bias, drift, or noise-floor inflation.

Reference sources Three practical reference paths cover most instruments and embedded AFEs.

• Internal DDS / NCO: programmable frequency and phase; easiest I/Q generation; ideal for multi-frequency and auto-cal systems.
• Sync from excitation: derived from the same modulator/driver clock; maximizes coherence and minimizes long-term phase ambiguity.
• Recovered reference (PLL): phase-locked from a sensed signal when the excitation is not directly available; requires careful lock strategy.

A robust rule is: prefer same-source synchronization when available; use DDS/NCO when flexibility and calibration are required; rely on recovered PLL reference only when necessary and treat its bandwidth/lock behavior as a primary design variable.

Quadrature generation (I/Q) I/Q accuracy depends on how the 90° relationship is formed and maintained across frequency and temperature.

• Digital quadrature (NCO/DDS): precise by construction; errors mainly track clock quality and numeric implementation.
• Analog 90° network: simple, but typically narrowband; quadrature error rises as frequency shifts.
• Digital Hilbert approach: supports wider bandwidth but introduces filter delay and edge behavior that must be managed.

Quadrature amplitude/phase mismatch usually shows up as Q not nulling, amplitude bias, and reduced image/harmonic rejection.

Auto-phase control Phase alignment can be implemented as either a one-time scan or a continuous servo, depending on drift dynamics.

• Phase sweep (open-loop): scan phase offset to maximize I and minimize Q; excellent for production bring-up and periodic calibration.
• Phase servo (closed-loop): estimate phase error from I/Q and continuously adjust the reference phase so Q→0 (or I→max); best for slow drift and cable changes.

Reference jitter and phase noise can translate directly into output noise-floor inflation; later sections quantify this effect and show how to diagnose it from I/Q statistics.

Why it matters The demodulator defines how out-of-band energy and implementation non-idealities turn into DC/low-frequency error. The “best” choice is the one that preserves coherent gain while keeping harmonic folding, distortion, and drift manageable for the target bandwidth and dynamic range.

Three practical implementations

• Chopper / square-wave mixer (±1): simplest, predictable gain, but odd-harmonic folding must be managed.
• Analog multiplier (true multiplier): cleaner sinusoidal mixing model, but limited by linearity, noise, and offset drift.
• Digital mixing (ADC + NCO): most flexible (I/Q, phase rotation, multi-tone), but sensitive to ADC range and sampling clock quality.

Selection matrix Use these criteria to pick the demod path that fails least in the real system.

Practical rule: if the environment has strong broadband or harmonic-rich interference, avoid designs where that energy can fold into DC unchecked. If the system needs mode switching, auto-phase, or multi-frequency operation, digital mixing usually simplifies long-term maintainability.

Minimum “don’t get burned” checks

• Square-wave mixing: confirm what lives near 3f₀/5f₀; band-limit or choose f₀ to avoid known spur families.
• Analog multiplier: prove linear headroom under worst-case background; check DC offset drift vs temperature and supply.
• Digital mixing: keep ADC out of compression; validate clock/PLL phase noise impact using I/Q variance at long integration.

Core trade-off The output low-pass is not “just an RC”. It is the main knob that converts coherent gain into a practical reading by trading noise bandwidth (ENBW) against settling time. Bigger τ usually lowers noise, but it also slows response and can hide drift or mode-change offsets.

Engineering meaning (minimal math) Use ENBW to predict how much noise remains after integration.

ENBW (equivalent noise bandwidth) is the “noise area” of the filter. Two filters with the same -3 dB corner can have different ENBW and very different settling behavior.

Quick sizing workflow (4 steps) A practical method that avoids over-tuning and makes verification straightforward.

1. Set modulation frequency f₀ to move the signal away from 1/f drift and away from known interference families (and their harmonics).
2. Set target settling / update time T_settle (define the tolerance band, e.g., “within ±x%”).
3. Pick τ (or fc) to meet settling: a 1st-order filter reaches ~99% in about 4–5 τ (use as a first-cut, then verify).
4. Check noise using ENBW: if noise is too high, reduce ENBW (increase τ or order) and re-check T_settle.

Verification checklist Prove the chosen τ behaves under real mode switching and drift conditions.

• Step test: apply an amplitude or phase step; measure time to enter the tolerance band (T_settle definition must be explicit).
• Long-hold statistics: hold a stable input and track I/Q variance vs τ; if variance stops improving, drift or reference noise is dominating.
• Mode-change test: switch gain/decimation/filter mode and confirm that offsets and phase alignment are either preserved or re-calibrated.

Goal A good modulation frequency f0 moves the signal away from low-frequency drift (1/f) while avoiding mains harmonics, mechanical microphonics, and switching/clock spur families. For sampled systems, f0 must also cooperate with fs to avoid leakage and alias-driven “false stability”.

Step 1 — define the feasible band

• Sensor/DUT response: keep f0 inside the linear response band (amplitude and phase must remain predictable).
• Front-end bandwidth/headroom: ensure the AFE does not add large phase shift or distortion at f0.
• Power & update rate: higher f0 can demand higher sampling/compute; ensure the chosen τ and Tsettle still meet the update target.

Step 2 — apply the “avoid list” Keep margins; these sources drift and move in the field.

• Mains: avoid 50/60 Hz and 2×/3×/… harmonics; keep extra margin because the grid frequency wanders.
• Microphonics: avoid mechanical resonances and rotating equipment frequencies (fans/pumps) and their multiples.
• Switching & clocks: avoid fSW families, beat notes, and known digital clock/EMI peaks in the platform.
• Square-wave reference note: if using chopper/square mixing, also check 3f0, 5f0 regions to prevent odd-harmonic folding into DC.

Step 3 — sampling-aware planning (when an ADC is involved)

• Coherent averaging: set integration windows to contain an integer number of periods so energy stays in-bin and leakage is reduced.
• Useful planning rule: choose an integration time Tint = M / f0 (M is an integer) and ensure the sampling pipeline preserves this windowing.
• Alias safety: treat fs/2 and any post-decimation Nyquist boundaries as “no-go” zones for strong interference that can fold to f0.

Multi-tone or sweep lock-in stays practical when every candidate tone is filtered by the same avoid list and each tone gets enough time to settle (per the τ strategy).

Field-ready “frequency dodge checklist”

Core idea Ultimate sensitivity is limited by a mix of random noise (falls with √ENBW), deterministic bias/leakage (may not improve with τ), and discrete spurs (2f/3f ripple and fold-down artifacts). A useful budget separates these three behaviors before tuning.

Source groups (by output pathway)

• Front-end noise: input voltage/current noise shaped by source impedance → mixed to baseband → integrated by ENBW.
• Reference timing noise: phase noise/jitter in reference or sampling clock → increases demod uncertainty, especially for higher f0.
• Mixer non-idealities: multiplier noise/offset drift, chopper injection, and DC leakage paths.
• ADC & quantization: quantization + INL spurs + headroom limits; aliasing turns out-of-band into in-band error.
• Feedthrough/interference: reference coupling, crosstalk, and environmental spur families that fold to DC.

Symptom → likely cause → fastest verification Use this mapping before redesigning anything.

Budget table (what sets the ceiling)