The three problems that must be solved (and how “done” is verified)

• Aliasing control — Out-of-band tones/noise fold into the signal band after sampling. “Done” means folded content stays below the allowed spur/noise limit inside BW_sig. Verification uses an out-of-band injection test (tone or broadband) while observing in-band FFT spurs.
• Settling control — Sampling inputs can kick charge back into the network, creating ringing or memory. “Done” means the error inside the aperture window is below the system limit (not “it looks flat on a scope”). Verification uses step / channel-switch tests with timing sweep and in-band residual/spur checks.
• Budget realism — Bandwidth/Q and loading set the real noise and distortion floor. “Done” means measured THD/SFDR vs frequency & amplitude matches the budget allocation (driver + network + ADC), without relying on optimistic assumptions.

What “bad THD” usually means (root causes this page separates)

• Driver headroom collapse — output current / slew / linearity margin is insufficient under full-scale and high frequency. Symptom: THD worsens quickly with frequency and amplitude; often improves if amplitude is reduced.
• Load-induced nonlinearity — the AAF + ADC input behaves like a difficult capacitive/time-varying load; phase margin loss causes peaking/ringing, which can convert to IMD and spurs. Symptom: new spurs appear after adding filtering, or small component changes create large spectral differences.
• Folded interferers — strong out-of-band energy folds into the band and looks like “mystery spurs”. Symptom: spurs track the presence of external switching, RF blockers, or wideband noise rather than the wanted tone.

Scope boundary (kept strict to avoid topic overlap)

• Clock jitter / phase-noise deep dive is not expanded here (only referenced when it limits high-frequency SNR).
• Reference noise and reference buffering are not expanded here (only treated as a budget input).
• Interfaces and link integrity (LVDS/JESD) are not discussed here.
• Static linearity theory (INL/DNL definitions) is not expanded here; only measurement impact is referenced.

Decision rules (each rule includes: condition → build → first test)

1. Condition: BW_sig is narrow and out-of-band is quiet.
   Build: 1st-order RC or 2nd-order low-Q; keep Q modest.
   First test: out-of-band tone injection near f_s/2; confirm folded spur stays below the target limit.
2. Condition: BW_sig is wide or blockers/switching noise are strong out of band.
   Build: distributed low-Q multi-stage filtering instead of a single high-Q stage.
   First test: injection sweep above BW_sig; verify spur level vs frequency while keeping THD stable.
3. Condition: differential ADC with wideband input.
   Build: FDA + symmetric RC network; keep both sides matched and controlled common-mode.
   First test: 2-tone IMD (near band edge); verify HD3/IMD stability across amplitude sweep.
4. Condition: peaking/ringing appears after adding filtering, or small C/R changes flip the result.
   Build: add or increase R_iso and damping first; reduce Q before increasing order.
   First test: small-signal sweep to detect peaking + 1-tone THD at band edge to confirm improvement.
5. Condition: THD collapses with frequency or amplitude.
   Build: treat driver headroom as the primary suspect (output current, slew, linearity margin) before changing AAF.
   First test: amplitude sweep at several frequencies; if THD improves strongly with lower amplitude, headroom is limiting.
6. Condition: channel history matters (MUX polling, large steps between samples).
   Build: enforce “settling inside the sampling window”; consider lower Q and controlled R_iso.
   First test: step/channel-switch test with programmable delay; choose the minimum safe acquisition time.
7. Condition: new spurs appear only after adding the AAF.
   Build: separate folding from IMD by changing the out-of-band stimulus while holding the in-band tone constant.
   First test: compare FFT with and without out-of-band injection; if spurs track the injection, folding is involved.
8. Condition: production risk is high (tolerance, temperature, unit variation).
   Build: avoid high-Q single stages; add footprints for R_iso options and small C trims.
   First test: corner sweep (gain, temperature, component substitution) while monitoring peaking and THD drift.

Step 1 — Choose a threat model (what is folding)

• Narrowband blocker (tone): a strong out-of-band carrier or switching harmonic. The risk is a deterministic folded spur landing inside BW_sig.
• Wideband out-of-band noise: elevated noise floor, EMI broadband energy, or driver wideband noise. The risk is in-band noise floor rise after folding.

Step 2 — Define acceptance points (where attenuation is checked)

• Nyquist edge (≈ f_s/2): the default factory-friendly checkpoint. It answers “how many dB at f_s/2 is enough?” with a clear pass/fail value.
• Dominant blocker frequency: a more realistic checkpoint if the strongest interferer is known. It prevents over-designing at f_s/2 while missing the real threat.

Step 3 — Target setting template (fill-in and output)

Output: the required minimum attenuation at the chosen acceptance point so that folded content stays below Limit_inband. This value is the engineering spec for the AAF network.

If the transition band is too narrow (common reality)

• Increase f_s: the cleanest fix; costs data rate, power, and interface complexity.
• Use distributed low-Q stages: achieves attenuation with better stability and tolerance behavior; costs BOM and area.
• Constrain the blocker: shielding/layout/source filtering to reduce A_oob,max; costs system effort.
• Revisit the acceptance point: verify the real dominant blocker frequency; avoid solving the wrong problem.

Minimal load model (usable on a bench)

• C_in,total: ADC input capacitance plus AAF capacitors seen at the driver node.
• Dynamic switching: sampling action changes the effective impedance in time, especially around sampling edges.
• Kickback impulse: sampling edges inject charge back into the network, creating small but fast disturbances that can ring.

Three input behaviors (classified by what the driver sees)

• Mostly capacitive: common in fast sampling inputs; phase margin loss and band-edge peaking become sensitive to Q and tolerance.
• Capacitive + dynamic switching (SAR-like behavior): kickback and history-dependent settling become visible; ringing can convert into spurs/IMD.
• Buffered / continuous-time front end: easier to drive, but still limited by buffer bandwidth and distortion; “easy load” does not guarantee low THD.

Why a small Riso often “fixes it”

R_iso reduces the direct capacitive stress on the amplifier output and adds damping, which can restore phase margin and reduce ringing. It is a stability tool; it also changes noise and settling, so it must be treated as a tunable knob rather than a free improvement.

Start from shipping constraints (inputs that drive the choice)

• Acceptance point: Nyquist edge (≈ f_s/2) or the dominant blocker frequency.
• Required attenuation: minimum dB needed at the acceptance point so folded content stays below limit.
• BW_sig: bandwidth to protect (passband must remain clean and flat enough).
• Driver margin: headroom / output current / bandwidth margin and sensitivity to capacitive load.

1st-order RC — when it is enough (and when it is not)

2nd-order low-Q — the common “shipping sweet spot”

A low-Q 2nd-order stage improves stopband roll-off without requiring a fragile, high-Q response. The key shipping objective is to avoid peaking that magnifies band-edge distortion and makes results tolerance-sensitive.

A 2nd-order stage should be accepted only if two checks pass together: attenuation at the acceptance point and stable THD/IMD near the band edge.

High-order / high-Q — why it often fails in production

• Tolerance sensitivity: small R/C variation shifts Q and peaking, changing spur behavior unit-to-unit.
• Driver stress: heavier and more dynamic loading increases output current demand and reduces linearity margin.
• Phase-margin risk: the driver becomes more sensitive to parasitics and PCB layout, causing “works in lab, fails in build.”
• Debug risk: becomes trial-and-error tuning rather than controllable knobs that converge.

Distributed low-Q multi-stage — the production-first strategy

When strong attenuation is needed but high-Q behavior is unacceptable, distribute attenuation across two gentle stages. Each stage stays stable and tolerance-friendly, while the combined response meets the acceptance target with less peaking risk.

Decide using these inputs (not by habit)

• ADC input: differential or single-ended.
• BW_sig: wideband vs narrowband.
• Priority: linearity-first (THD/IMD) vs stability-first (robust settling).
• Common-mode control: whether output CM must be set/held tightly.

FDA → differential ADC (the default wideband path)

• Use when: differential ADC, wide bandwidth, or tight SFDR/IMD requirements.
• What matters: symmetric networks on OUT+ and OUT− and a defined output common-mode (CM).
• Main risks: asymmetry creates even-order distortion and CM leakage; heavy capacitive loading can destabilize and worsen THD.
• First test: 2-tone IMD plus band-edge 1-tone THD to confirm stability does not convert into spurs.

Single-ended → differential (op-amp + conversion network)

• Use when: a single-ended source must feed a differential ADC and bandwidth is moderate-to-wide.
• Main risks: common-mode drift and imbalance; conversion network interacts with AAF and creates load sensitivity.
• First test: amplitude sweep at multiple frequencies while monitoring CM behavior and THD trend.

Transformer coupling and buffers (when stability or isolation dominates)

• Transformer: strong for RF/IF, provides natural differential drive and DC blocking; not suitable for DC/low-frequency precision.
• Buffer: useful when source impedance is high and bandwidth is moderate; ensures repeatable loading but can become the distortion bottleneck.
• First test: frequency sweep for passband shape plus IMD/THD check at target amplitude.

Recommended tuning order (to avoid hidden traps)

1. Stability first: control ringing/peaking with Riso and low-Q choices.
2. Linearity next: confirm headroom (swing/current/slew) across amplitude and frequency.
3. Aliasing then: meet the required attenuation at the acceptance point (Nyquist or blocker).
4. Noise last: only after the above are stable, refine BW and resistor noise trade-offs.

Knob 1 — BW (bandwidth)

Wider BW increases the frequency range where the driver must stay linear and stable. THD often degrades when BW is increased because high-frequency swing and output current demands rise and margin disappears earlier than expected.

• Symptoms: THD worsens quickly with frequency; reducing amplitude improves THD strongly.
• First check: single-tone THD vs frequency plus full-scale vs half-scale comparison.

Knob 2 — Q (peaking sensitivity)

Higher Q increases peaking and makes the response sensitive to tolerance, parasitics, and dynamic input behavior. Spurs often multiply when Q is pushed up because peaking amplifies small disturbances into visible spectral content.

• Symptoms: small-signal sweep shows peaking; minor R/C changes flip spur patterns.
• First check: peaking observation + two-tone IMD near the band edge.

Knob 3 — Riso (isolation / damping)

Riso is primarily a stability knob. It isolates the driver from capacitive stress and adds damping, reducing ringing and making results repeatable. It also adds thermal noise and can slow settling, so the best Riso is the smallest value that achieves stable behavior.

• Selection logic: increase until peaking/ringing visibly collapses, then re-check noise and settling.
• First check: step/settling behavior plus band-edge THD stability.

Knob 4 — Headroom (linearity margin)

• Swing margin: distance to rails and output common-mode constraints.
• Current margin: peak output current demanded by R/C loading and fast edges.
• Slew margin: high-frequency, large-amplitude transitions.
• Fingerprint: THD improves strongly when amplitude is reduced; clipping-like spur growth appears at high amplitude.

Budget principle (what makes it real)

• Define the band: BW_sig sets what is integrated and what is ignored.
• Assign ownership: identify the expected dominant term and who controls it.
• Bind to tests: each term must have a measurement that can confirm or falsify it.

SNR template (in-band noise contributors)

• Source noise: sensor or upstream chain noise entering BW_sig.
• Driver noise: amplifier noise and wideband output noise that lands in-band after filtering and sampling.
• Resistor thermal noise: R noise is real and increases with bandwidth integration.
• ADC noise floor: intrinsic ADC noise and quantization-related in-band floor.

THD / SFDR template (distortion contributors)

• Driver nonlinearity: output swing/current/slew limits and load interaction.
• Network nonlinearity: component voltage coefficients and tolerance-driven peaking behavior.
• ADC baseline distortion: intrinsic THD/SFDR floor of the converter.

Verification (must be part of the budget)

• Single-tone THD vs frequency: reveals band-edge sensitivity and high-frequency collapse.
• Two-tone IMD: separates true nonlinearity from simple attenuation effects and exposes peaking-driven IMD.
• Full-scale vs half-scale: quickly indicates headroom-limited behavior when THD improves strongly at lower amplitude.
• Note: high-frequency SNR may be jitter-limited; details should be handled on the clocking page, not here.

Why “looks stable on a scope” can still fail ENOB

• Continuous-time view vs sampled view: the ADC cares about error at the sample instant, not the average visual smoothness.
• Residual tail: small slow tails can be invisible on a fast display but still be large relative to the target LSB/ENOB.
• Code correlation: window-aligned residue can show up as repeatable spur patterns instead of random noise.

Engineering acceptance (define → sweep delay → observe residue)

1. Define the event: step response or MUX channel switch (A→B) that represents the worst transition.
2. Sweep sample delay: scan the sampling delay (t_delay) from early to late relative to the step/switch.
3. Observe residue: check residual spur level, code-pattern correlation, and ENOB/SNR convergence vs t_delay.
4. Pass/Fail at the window: the chosen t_delay must meet limits with repeatable results (not only “looks smooth”).

SAR / MUXed scenarios: sampling window + channel memory risk

• Channel-to-channel memory: A→B switching can leave residual charge that contaminates the next sample.
• Sequence correlation: spur patterns can depend on the channel order and the switching cadence.
• Acceptance test: run an A→B→A→B sequence and repeat the delay sweep while watching spur/floor convergence.

Why larger Riso can be “more stable” but “too slow”

Larger Riso often reduces ringing by adding damping, but it also slows the effective settling seen by the sampling window. The correct resolution is window-based: choose the smallest Riso that collapses peaking, then confirm the chosen t_delay still meets the target ENOB/spur limits.

Test baseline (lock variables before judging results)

• Fix sample rate, tone frequencies, amplitude, and FFT method so comparisons stay meaningful.
• Keep one “known-good” front-end state to revert quickly after each change.
• Use a minimal set: 1-tone THD vs f, 2-tone IMD, and sampling-delay sweep for settling correlation.

Design freeze checklist (pre-layout / pre-freeze)

Bring-up checklist (post bring-up)

Boundary (to avoid scope creep)

• No AAF topology tutorial (filter structures are handled in the filter-selection section).
• No loop-theory deep dive (only verifiable stability statements and plots are requested).
• No PCB routing details (layout validation belongs to the layout section).
• No fixed “one-part-fits-all” recommendation (examples are buckets, not mandates).

A) Fields to request (ask for plots + conditions, not single numbers)

B) Risk mapping (turn specs into failure modes + acceptance metrics)

• HD3 / IMD risk → SFDR miss at higher input frequency → Metric: SFDR vs f, two-tone IMD.
• Cap-load stability unclear → peaking / ringing and build spread → Metric: peaking(dB), IMD change after Riso, delay-sweep convergence.
• Noise density too high → SNR / ENOB shortfall → Metric: SNR/ENOB, in-band noise floor.
• Output current / headroom insufficient → compression distortion → Metric: THD vs amplitude (FS vs -6 dBFS), THD vs f under full-scale.

C) Example part numbers (by bucket)

Part numbers above are shortlist starters. Final selection must be validated against the RFQ conditions and plots requested below.

D) RFQ template (copy/paste to supplier or FAE)

The template forces answers in plots + conditions, and ties them to acceptance metrics (THD/SFDR/SNR/peaking/settle time).

Subject: ADC driver / FDA recommendation request (conditions + plots)

1) System conditions
- ADC sample rate (fs): ________
- Signal bandwidth (BW_sig): ________
- Input tone range / band-edge: ________
- Stimulus: 1-tone / 2-tone (spacing: ________)
- Amplitude: Full-scale / -6 dBFS (target: ________)
- Supply rails: ________
- Output common-mode (VOCM): ________
- Equivalent load seen by driver:
  * C_in (ADC + network): ________ pF
  * Any RC / Riso planned: yes/no (range: ________)
  * MUX switching: yes/no (sequence: ________)

2) Please provide plots under the conditions above
- THD (or HD3) vs frequency (state amplitude, load, VOCM, supply)
- SFDR vs frequency (or HD2/HD3 curves)
- Two-tone IMD (if wideband/comms)
- Capacitive-load stability guidance (allowed Cload range + required Riso if any)
- Recommended driver + RC network / reference design for an ADC input

3) Acceptance metrics (pass/fail targets)
- THD: ________ dBc
- SFDR: ________ dBc
- SNR / ENOB: ________
- Peaking: ________ dB max
- Window-based settling: spur/floor converges by t_delay = ________
- Temperature corners: cold/hot points: ________ / ________
      

A supplier response that does not include the stated plot conditions is not actionable for bring-up or production risk control.

How much attenuation is enough at fs/2?

“Enough” is set by a folded-spur limit, not by a generic filter order. Define the strongest expected out-of-band content and the maximum allowed in-band spur/floor increase, then back-calculate the minimum attenuation at the acceptance point.

• Target: Atten(fs/2 ± Δ) ≥ (OOB interferer level − allowed folded spur) + margin.
• Verify: inject a tone/noise just above Nyquist and measure the folded spur/floor in-band.
• Production bias: prefer low-sensitivity structures (low-Q or distributed low-Q) once the target attenuation is known.

Related: Anti-aliasing in practice, Filter types you can ship, Bench tests & debug.

What out-of-band interferer level should be assumed when setting the acceptance point?

Use the worst credible blocker at the front-end output, not an average. If the system has known emitters, switching edges, or mixer images, assume the strongest one can appear at the driver output under corner conditions.

• Narrowband blockers: treat as tones; set attenuation so the folded tone stays below the SFDR limit.
• Wideband noise: treat as integrated power; set attenuation so the folded noise does not raise in-band floor beyond SNR target.
• Margin: add headroom for temperature/lot spread and measurement uncertainty.

Related: Anti-aliasing in practice, Noise & distortion budgeting.

RC vs 2nd-order: when does Q hurt more than help?

Higher Q can create passband peaking and amplify load sensitivity, which often costs more SFDR/IMD than the extra roll-off saves. For production, low-Q or distributed low-Q is usually safer than a single sharp stage.

• RC is enough when BW_sig is narrow and out-of-band content is weak or controlled.
• 2nd-order low-Q is the default when a defined acceptance-point attenuation is needed.
• Q hurts when peaking rises, stability becomes load-sensitive, or lot/temperature spread increases.

Related: Filter types you can actually ship, The four knobs, Engineering checklist.

Why can a “steeper” filter worsen SFDR or IMD in real hardware?

Steeper usually means more load, more sensitivity, and tighter phase margin. The driver sees larger capacitive loading and sharper impedance transitions, which can increase peaking, raise required output current, and worsen large-signal linearity.

• Load effect: extra capacitors increase dynamic drive demand and can destabilize the loop.
• Peaking: band-edge gain bump magnifies IMD and can create spur patterns.
• Tolerance: higher-order/high-Q networks amplify component spread into performance spread.

Related: Filter types, Debug playbook.

Why does Riso improve stability but sometimes worsen THD?

Riso adds damping and isolates capacitive loading, which often reduces ringing. But it can also increase the driver’s required swing/current and make the transfer more frequency-dependent, which can expose nonlinearity.

• Drive stress: higher voltage drop and current demand can push the output stage closer to its nonlinear region.
• Frequency shaping: Riso with Cin/AAF caps can change gain/phase around band-edge, affecting IMD.
• Noise trade: added resistance raises thermal noise and can reduce SNR margin if overused.

Related: ADC input load model, The four knobs, Settling & sampling window.

How to choose an Riso starting range without killing settling speed?

Start with the smallest value that collapses peaking, then accept settling at the sampling window. Riso should be tuned against peaking(dB), THD/IMD, and window-based settling as a set.

• Tuning order: stabilize first (peaking), then check linearity (IMD/THD), then confirm settle time.
• Footprint strategy: include 0Ω + multiple options so the bring-up can sweep values quickly.
• Pass/fail: the chosen Riso must meet both spur convergence (delay sweep) and distortion targets.

Related: The four knobs, Engineering checklist.

How to model sampling ADC input load for stability?

For driver stability planning, the ADC input should not be treated as a resistor. Use a practical model: effective input capacitance + switching behavior, and design for the worst-case capacitive load the driver sees through the AAF network.

• Small-signal view: treat the input as capacitive (Cin + filter caps reflected through the network).
• Sampling view: expect periodic charge bursts that can excite ringing; accept performance at the sample window.
• Validation: use peaking sweep + delay sweep to confirm the model matches observed behavior.

Related: ADC input is not a resistor, Settling & sampling window.

What symptoms indicate “window-based settling” rather than random noise?

Window-based settling errors behave like timing- and sequence-sensitive spurs, not like a uniform noise-floor lift.

• Delay sensitivity: spur level changes when sampling delay is swept.
• Sequence sensitivity: A→B switching or cadence changes alter the spur pattern.
• Convergence behavior: SNR/ENOB improves abruptly after a certain delay, indicating settling completion inside the window.

Related: Settling & sampling window, Debug playbook.

What bench test best predicts in-system SFDR?

No single test covers everything. The most predictive approach is a three-test bundle aligned to the three failure families: linearity, alias folding, and window-based settling.

• 2-tone IMD: best predictor for band-edge linearity issues and intermod products.
• Out-of-band injection: best predictor for folding-driven spurs and floor lift.
• Sampling-delay sweep: best predictor for settle-in-window failures and timing-sensitive spurs.

Related: Bench tests & debug, Engineering checklist.

Why do results change with amplitude (FS vs -6 dBFS), and what does it imply?

Strong amplitude dependence often indicates headroom or output-stage stress rather than small-signal instability. If full-scale distortion degrades much more than expected, the driver is being pushed into a nonlinear region (swing/current/slew).

• Compression signature: THD improves dramatically at -6 dBFS but collapses at FS.
• Action: reduce required swing, confirm VOCM range, and re-check drive current margin.
• Validation: re-run 2-tone IMD and THD vs f at both FS and -6 dBFS.

Related: The four knobs, Budgeting.

How to reduce lot/temperature sensitivity without moving to a high-order filter?

Sensitivity reduction is usually a structure choice more than a “better component” choice. Aim to reduce peaking sensitivity and load sensitivity before chasing sharper roll-off.

• Prefer low-Q / distributed low-Q instead of a single sharp stage.
• Include damping footprints (Riso options, small RC pads) so bring-up can land in a robust region.
• Use stable passives (low-tempco resistors, stable capacitors) to reduce drift-driven shift.

Related: Filter types, Engineering checklist.

What plots must be requested from the amplifier/FDA vendor to avoid surprises?

The most useful vendor response is a set of plots under stated load, amplitude, VOCM, and supply. Without conditions, the data cannot be mapped to risk.

• THD/HD3/SFDR vs frequency at the intended amplitude, load, VOCM, and supply.
• 2-tone IMD with stated tone spacing and levels (for wideband systems).
• Capacitive-load stability guidance (allowed Cload range, required Riso if any).
• Recommended ADC-drive network or reference design showing the intended RC/Riso region.

Related: IC selection logic.