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Termination & Cable Capacitance for CAN and FlexRay

Termination & Cable Capacitance for CAN and FlexRay

← Back to: Automotive Fieldbuses: CAN / LIN / FlexRay

Core takeaway
Termination is only “correct” when it sits at the electrical ends and is tuned against the real harness Ctotal. Control Rterm / Cmid / hidden capacitance so the waveform settles inside the sampling window on the real vehicle harness—not just on the bench.

H2-1 · Termination & Cable Capacitance: What this page solves

Intent Establish a strict scope contract in 30 seconds: what is covered, what is not covered, and what problems this page is designed to close.
One-paragraph definition

Termination is the end-network that makes the bus load behave like the cable’s characteristic impedance (Z0) so reflections are suppressed and ringing does not intrude into the sampling region. Harness (cable) capacitance is a major driver of edge-rate, ringing frequency, and settling time. As harness length, connectors, and node loading increase, capacitance often becomes the limiting factor for CAN FD and FlexRay margin on real vehicle wiring.

Failure modes this page targets
Under-damped ringing
Overshoot and multi-cycle ringing remain near the threshold region, shrinking sample-point margin as harness length or node count increases.
Over-damped edges
The waveform becomes too slow to settle; threshold crossing time drifts and bit-time margin erodes—especially in higher-speed phases.
Midpoint capacitor pitfalls (split termination)
A midpoint capacitor can improve EMI and immunity, but poor sizing or coupling can introduce an unwanted pole and make the bus “fragile”.
Covers
  • Classic CAN / CAN FD termination choices (end vs split) and practical sizing direction.
  • FlexRay termination logic (bus vs star) and capacitance-driven robustness impacts.
  • Harness capacitance accounting (what contributes to Cdiff and how to track it).
  • Time-domain validation targets: overshoot, ringing decay, settling time, and sample-point safety window (threshold placeholders).
Not covered (link out)
  • Stub & harness branching rules and topology constraints (handled by the dedicated stub page).
  • Ground / common-mode / return-path design (handled by the ground/common-mode page).
  • Port protection selection beyond “parasitics change the bus” (handled by the protection/CMC page).
  • Controller bit timing & protocol-layer behavior (only referenced for context, not expanded here).
Deliverables (what this page produces)
1) Selection workflow
A step-by-step decision path to pick end vs split termination and a midpoint capacitor range using measurable inputs.
2) Capacitance budget template
Cable + connectors + protection parasitics + node input contributions summarized as a single Cdiff budget.
3) Real-harness verification SOP
Probe locations, waveform metrics, and pass criteria placeholders suitable for bring-up and production checks.
4) Troubleshooting map
Symptoms → first checks → fixes → pass criteria, strictly within termination + harness capacitance scope.
Figure · Scope map (what stays here vs links out)
Scope map: Termination + Cable Capacitance This page • Termination (end / split) • Midpoint capacitor effects • Harness capacitance & settling Stub & Branching Link out Ground & Common-Mode Link out Protection Parasitics Link out Protocol / Timing Link out

H2-2 · Mental model: Z0, propagation, and why termination exists

Intent Provide the smallest model needed to select termination and midpoint capacitance using time-domain reasoning instead of guesswork.
Minimal math (only what is used later)
Characteristic impedance

Z0 ≈ √(L′ / C′) — determined by cable geometry (per-length inductance L′ and capacitance C′). Termination aims to make the end load behave like Z0 to prevent a reflected “bounce”.

Propagation delay

td ≈ length / velocity — the travel time along the harness. Reflection timing is set by this delay, so the same termination can behave differently on different harnesses.

Why mismatch produces ringing

A transceiver launches a step into the harness. If the end load differs from Z0, part of the energy reflects back. That reflected energy can re-reflect at the source and discontinuities, creating overshoot and ringing until losses dissipate it. Termination provides controlled loss so the waveform settles cleanly before the sampling window.

When the bus must be treated as a transmission line
Condition-driven checklist
  • Longer harness → larger propagation delay → reflections can land near the sampling region.
  • Higher bit rate (CAN FD data-phase / FlexRay) → less time available for settling.
  • Faster edges → higher-frequency content excites ringing more strongly.
  • Higher Cdiff budget → slower edges and longer settling, even if reflections are suppressed.
Engineering takeaway
  • Termination mainly controls reflections.
  • Capacitance mainly controls edge/settling limits.
  • High-speed phases amplify small waveform imperfections into real errors because timing windows are tighter.
Metrics tracked later on real harness
  • Overshoot and ringing amplitude (relative to Vdiff).
  • Ringing frequency and decay rate (damping indicator).
  • Settling time into a stable band (pass placeholders: ±X band within Y time).
  • Sample-point margin (pass placeholders: ≥X% bit time margin).
Figure · Transmission line model (mismatch vs match)
Transmission line: mismatch causes reflections; match suppresses reflections Mismatch → reflection (ringing) Match Z0 → controlled settling Driver Tx Driver Tx Harness / Cable Z0 · td Harness / Cable Z0 · td Termination R ≠ Z0 Termination R ≈ Z0
Scope lock (prevents overlap later)

Topics dominated by branching length and topology belong to the stub page. Topics dominated by return path and common-mode coupling belong to the ground/common-mode page. This page remains focused on termination networks and harness capacitance effects validated in the time domain.

H2-3 · Harness capacitance: where it comes from and how it hurts you

Intent Turn “harness capacitance” into measurable and accountable quantities that can be tracked, budgeted, and verified.
Where capacitance comes from (inventory)

Harness capacitance is not a single number. It is the sum of distributed and lumped contributors that shape edge-rate, ringing, and settling. For differential buses, the most actionable target is the effective differential capacitance (Cdiff) seen by the transceiver. Common-mode capacitance to shield or ground can also change behavior, but return-path design belongs to the dedicated ground/common-mode page.

  • Cable pair geometry: conductor spacing, dielectric, twist, and length set the per-meter capacitance baseline.
  • Shield and jacket coupling: proximity to shield and shield bonding method add capacitance-to-reference (tracked, not expanded here).
  • Branches and junctions: stubs and branch points add effective loading and discontinuities (topology rules link out).
  • Connectors: pin geometry and internal structure often add a measurable increment per connector.
  • Protection / filtering parasitics: TVS, common-mode chokes, and footprints add parasitic capacitance that changes edges and ringing (device details link out).
  • Node input capacitance: transceiver pins, ESD structures, and ECU interface contribute per-node loading.
How capacitance hurts (three measurable effects)
1) Slower edges
Higher Cdiff increases the effective RC load and reduces dV/dt. Threshold crossing becomes later and more sensitive to variations. Tracked metric: rise/fall time to a defined threshold band (placeholders).
2) Ringing frequency shifts
Added capacitance lowers the dominant resonance frequency and changes damping. A waveform that looked “fine” on a short bench cable can develop a longer-period oscillation on the vehicle harness. Tracked metric: ringing frequency and decay rate (placeholders).
3) Longer settling time
Slower edges plus slower decay push the waveform’s stable window later in time. This becomes critical when the sampling window tightens (CAN FD data-phase and FlexRay). Tracked metric: settle-to-band time (±X band within Y time).
Deliverable · Capacitance budget template
Cdiff budget (placeholder form)
Ctotal = Ccable + Cconnectors + Cprotection + Cnode_inputs
  • Cable: length, type, per-meter C (or measured).
  • Connectors: model, count, per-connector estimate (TBD allowed).
  • Protection parasitics: footprints used (TVS/CMC), estimated incremental C (TBD allowed).
  • Node inputs: per-node input C (datasheet value or measured placeholder).
Rules for a usable budget
  • Unknown is allowed (TBD), but every contributor must have a row.
  • One definition of Ctotal must be used across bring-up and production.
  • Version the budget so waveform changes can be traced to harness changes.
Deliverable · Measurable fields (record only)
  • Harness length: as-built measurement or drawing value.
  • Cable type: supplier + part number.
  • Connector model: part number + count.
  • Branch count: number of junctions (no topology expansion here).
  • TVS footprint: package/footprint used (record only).
  • CMC footprint: part footprint used (record only).
  • Probe location: endpoint / node / midpoint tags for repeatable scope captures.
  • Environment tags: temperature/humidity label (record only).
Scope lock
Protection device selection and common-mode return-path design are intentionally not expanded here. This page only tracks their parasitic loading as budget entries.
Figure · Capacitance budget stack (Cdiff contributors)
Capacitance budget stack: cable, connectors, protection parasitics, node inputs → total Cdiff Cable C_cable Connectors C_conn Protection C_prot Node inputs C_node Cdiff budget C_cable + C_conn + C_prot + C_node = C_total Total load C_total (Cdiff)

H2-4 · Damping regimes: under / critical / over damping (what to look for)

Intent Map time-domain symptoms to termination/capacitance causes so troubleshooting starts with the correct first action.
Three damping regimes (visual classification)
Under-damped
Overshoot and multi-cycle ringing. The waveform “bounces” near the threshold region and can intrude into the sampling window.
Critical (target)
Minimal ringing and fast convergence. The waveform enters a stable band quickly and stays there before sampling.
Over-damped
Little to no ringing, but edges are slow and settling is late. Threshold crossing drifts and timing margin shrinks.
Deliverable · Waveform quick-read (termination + capacitance only)
Symptom
  • Large overshoot and multiple ringing cycles.
  • Ringing persists close to the decision threshold.
  • Settling time exceeds the available window.
Likely cause (in-scope)
  • Termination not aligned with Z0 (effective mismatch).
  • Asymmetric end network or midpoint sizing that shifts damping.
  • Cdiff budget lower than expected but reflection energy high.
First check (in-scope)
  • Confirm end-network presence and placement (end vs split).
  • Compare ringing amplitude/decay at the same probe point across configurations.
  • Cross-check the Cdiff budget version for connector/protection changes.
Pass criteria placeholders (define later)
Overshoot ≤ X · Settling-to-band ≤ Y · Sample-point margin ≥ Z
Figure · Under / Critical / Over damping waveforms (simplified)
Damping regimes: under, critical, over Time ±X band Under Overshoot Critical Over Settling
Scope lock

The quick-read mapping is limited to termination networks and capacitance loading. Topology-driven reflections and return-path/common-mode coupling are handled by their dedicated pages.

H2-5 · CAN termination fundamentals: end values, topology assumptions, and common mistakes

Intent Establish the correct topology assumptions for CAN termination so “capacitance” is not blamed for wiring and placement mistakes.
Topology assumption (what “end of bus” really means)

CAN termination only behaves as intended when the bus is treated as a line with two electrical ends. An electrical end is the last point on the main trunk after the final significant branch—this is not always the farthest ECU by distance.

Scope note: stub length rules and branch topology constraints are handled by the Stub page (link out).
End termination logic (why only the ends terminate)
  • Ends absorb reflections: matching at the electrical ends reduces energy that would otherwise reflect back into the bus.
  • Middle nodes do not terminate: adding termination in the middle increases loading and can create new discontinuities that distort edges and timing.
  • Two ends, consistent values: a termination pair only works as a pair—missing or mismatched ends change damping and ringing behavior.
Common mistakes (and why they get misread as “capacitance”)
Only one end terminated / ends mismatched
Ringing frequency and decay change abruptly with harness variants, often mistaken for a “capacitance shift”. The root issue is reflection energy not being absorbed at both ends.
Termination not at the electrical ends
A “hidden tail” of trunk beyond the termination behaves like extra distributed loading plus a reflection site. Scope captures become probe-location-dependent, which looks like a moving capacitance budget.
Star / multi-branch wired like a line
Multiple branches create multiple effective “ends”. Treating it as a single line can leave some paths unterminated. Branch details belong to the Stub page (link out) to keep this page scoped to termination and cable loading.
Deliverable · Termination checklist (bring-up and service)
  • Two ends only: termination exists only at the two electrical ends (yes/no).
  • End values consistent: both ends use the same termination value/network type (yes/no).
  • Placement at electrical ends: termination is not “left behind” by a trunk extension (yes/no).
  • Hidden termination sources: ECU, gateway, harness module, or diagnostic node adds/changes termination (yes/no).
  • Topology flag: if non-linear topology exists, mark “Stub page required” (yes/no).
  • Change control: termination network is protected against untracked harness/ECU variants (yes/no).
Recording fields (for later correlation)
Termination type (end/split) · Termination location tags · Harness variant ID · ECU variant ID · Probe point definition
Figure · Correct vs wrong CAN termination (topology assumption)
Correct vs wrong CAN termination Correct (Line bus) Wrong (Common mistakes) CANH CANL Rterm 120Ω Rterm 120Ω ECU ECU ECU CANH CANL Rterm MID ! Misplaced Star ECU ECU ECU

H2-6 · Split termination & midpoint capacitor: how it works and how it can backfire

Intent Explain why the midpoint capacitor is a trade-off knob (EMI/immunity vs waveform margin), not a “bigger is better” part.
What split termination is (structure and invariants)

Split termination replaces a single end resistor with two resistors that meet at a midpoint node. The midpoint is then coupled to a reference through a capacitor. The key invariant is that the termination must still behave like a proper end network for the differential bus.

Why it helps (common-mode shunt path)
  • CM energy relief: the midpoint capacitor offers a controlled path for common-mode noise to return to a reference.
  • EMI and immunity lever: better CM handling can reduce radiation sensitivity and improve robustness against coupled disturbances.
  • Scope lock: detailed return-path and grounding implementation is handled by the Ground & Common-Mode page (link out).
How it can backfire (extra pole, slower edges, shifted damping)
Cmid too large
The midpoint network can slow transitions and delay settling. The waveform trends toward over-damping and timing margin shrinks. This is commonly misdiagnosed as “harness capacitance increased”.
Cmid too small or ineffective
EMI/immunity benefits may be marginal. The bus can remain sensitive to coupled noise even when differential termination looks correct. Reference and loop effectiveness belong to Ground & Common-Mode (link out).
Deliverable · Cmid selection strategy (framework)
Inputs
  • Bit rate / phase (Classic vs FD data-phase).
  • Harness Ctotal budget (from H2-3).
  • Goal priority: EMI/immunity vs waveform margin.
  • Probe point definition (end / node / midpoint).
Outputs (placeholders)
  • Cmid range: low / mid / high (project-defined).
  • Decision: capacitor-only vs RC midpoint network (condition-based).
  • Stop conditions: waveform signatures and margin checks.
Waveform signatures
  • Too large: slower edges, late settling, over-damped trend.
  • Too small/ineffective: EMI benefit weak, noise sensitivity remains.
  • Good region: fast convergence into ±X band before sampling.
When a midpoint RC is considered (conditions only)
  • If EMI/immunity dominates and the environment is disturbance-heavy, an RC midpoint network may be evaluated.
  • If the waveform is already trending over-damped or margin is tight, avoid aggressive midpoint capacitance.
  • If the reference point is not clearly defined, do not “solve it with more Cmid”; fix reference selection first (link out).
Figure · Split termination with midpoint capacitor (CM shunt path)
Split termination: two resistors to midpoint, midpoint capacitor to reference CANH CANL Split termination R/2 R/2 Midpoint Cmid Reference CM shunt path To bus
Scope lock

This section treats the midpoint capacitor as a termination-network parameter and focuses on its waveform and margin implications. Reference selection and return-path implementation are handled by the Ground & Common-Mode page.

H2-7 · CAN FD / higher-speed sensitivity: sample-point margin vs settling time

Intent Convert “CAN FD is pickier” into an actionable time budget: settling must enter a stable band before the sampling window closes.
What gets tighter at higher speed
  • Sample-point margin shrinks: the stable window before sampling becomes shorter as bit time reduces.
  • Settling time dominates: ringing/edge recovery must finish earlier, not just “eventually reach level”.
  • Loop-delay symmetry matters more: asymmetric paths shift the effective window and make borderline settling fail.
Scope note: controller bit timing parameters are not expanded here (link out to CAN FD Transceiver / Controller pages).
Why bench looks OK but the real harness fails

Real harnesses typically increase Ctotal (longer cable, more connectors, more parasitics) and introduce more discontinuities (branches, junctions, device footprints). The result is longer settling and stronger ringing that can intrude into the sampling window.

Failure pattern
Ringing or slow recovery crosses the decision region near the sample point, reducing margin even when amplitude appears sufficient.
First priority
Prove whether settling completes before sampling. Adjusting termination blindly before this check often wastes iterations.
Deliverable · Sampling-window checklist (physical-layer only)
Measure
  • Dominant → recessive transition waveform at a defined probe point.
  • Overshoot amplitude (≤ X placeholder).
  • First crossing / first zero-cross (time marker).
  • Settling-to-band time into ±X (≤ Y placeholder).
Record
  • Probe point tag: end / node / midpoint (repeatability).
  • Harness variant ID and connector count.
  • Termination type (end vs split) and placement tags.
  • Environment label (temperature/humidity tag).
Pass criteria placeholders
Settling-to-band ≤ X · Overshoot ≤ Y · Sample-point margin ≥ Z
Figure · Sample-point window and settling risk
Sample-point window: settling must complete before sampling Bit time Start End Sample ±X band Risk window Overshoot Settling

H2-8 · FlexRay termination: bus vs star and why capacitance shows up differently

Intent Prevent CAN rules from being misapplied: FlexRay termination depends on topology (bus vs star), and capacitance impacts edges more directly at 10 Mbps.
Termination is topology-defined (bus vs star)

FlexRay termination placement and count must follow the actual topology. Bus and star systems do not share the same “two ends only” assumption. Star coupler mechanism details are handled by the Active Star Coupler page (link out); this page focuses on locating termination points.

Why capacitance shows up differently at higher speed
  • Shorter available window: edge delay and settling consume a larger fraction of a faster bit time.
  • Connectors and branches matter more: incremental parasitic capacitance is less “forgiving”.
  • Field variance becomes visible: small harness differences can shift stability when the margin is tight.
Deliverable · FlexRay termination locating checklist
Bus topology
  • Mark the two electrical ends of the trunk.
  • Verify termination networks are located at the ends.
  • Check for hidden terminations in ECUs or harness modules.
  • Record connector count and harness variant ID.
Star topology
  • Identify the star coupler location (system-defined reference).
  • Locate where termination is defined: coupler side or branch ends.
  • Tag each branch with length and connector count (capacitance risk label).
  • Keep channel A/B labels consistent during capture and review.
Recording fields
Topology tag (bus/star) · Channel tag (A/B) · Termination-point tags · Branch IDs · Harness variant ID
Figure · FlexRay bus vs star (termination points only)
FlexRay bus vs star termination locating Bus Star A/B Rterm End Rterm End Node Node Node Star Coupler Node Node Node Rterm Rterm Termination points
Scope lock

This section focuses on locating termination points by topology and labeling fields for repeatable checks. Active star coupler mechanisms and protocol details are handled by dedicated pages.

H2-9 · Design worksheet: choose Rterm + Cmid using measurable inputs

Intent Turn termination selection into a reusable workflow: measurable inputs → documented outputs → verification targets.
Scope lock (what this worksheet does / does not do)
  • Does: choose termination family (single/split), define Rterm strategy label, set a Cmid range label, and generate waveform verification targets.
  • Does not: expand stub topology rules, grounding/return details, protection device selection, or controller bit timing (link out to sibling pages).
Deliverable · Fill-in worksheet (copy into design reviews)
No tables · mobile-safe
Worksheet header
Project / Platform
[fill]
Harness variant ID
[fill]
ECU / Node variant ID
[fill]
Probe point tag
End / Mid / Node
Section 1 · Inputs (measurable / recordable)
Bus type
Classic / FD / FlexRay
Use a single label. No protocol details here.
Topology tag
Line / Star / Mixed
If “Mixed”, link out to Stub rules before selecting values.
Speed tier
Low / Mid / High
Tiering keeps the worksheet portable across platforms.
Harness length / structure
Short / Medium / Long
Record connector count and branch tags (no deep topology here).
Ctotal estimate
[value] or Unknown
Prefer measured or budgeted Ctotal (H2-3). Unknown triggers the “measure-first” path.
Parasitics tags
TVS / CMC / Footprint
Record presence only. Component selection belongs to Protection pages.
Section 2 · Outputs (decision + verification targets)
Termination family
Single / Split
Choose based on EMI/immunity priority vs waveform margin; grounding details link out.
Rterm strategy label
End-only / Split-family
Use labels to keep the worksheet stable across component variants.
Cmid range label
Low / Mid / High
“Too large” tends to slow settling; “too small” reduces CM benefit (verify, do not guess).
Waveform targets (placeholders)
Overshoot ≤ X · Settling-to-band (±X) ≤ Y · Sample margin ≥ Z
Targets must be proven on the real harness (H2-10).
Unknown Z0: measure-first path (no blocking)
Priority order
  • Measure trend first (TDR or step response).
  • Back-calculate only as a rough sanity check.
  • Close the loop with waveform targets and pass criteria.
Figure · Decision flow (worksheet to verification)
Termination worksheet decision flow Start Bus type Classic / FD / FlexRay Topology Line Star/Mixed Speed tier Low / Mid / High Ctotal? Measure-first Family Single/Split Cmid range Low/Mid/High Verify Real harness

H2-10 · Verification: what to measure on real harness (and what “pass” looks like)

Intent Provide a copyable SOP: probe points, required metrics, recording fields, and pass criteria placeholders—validated on the real harness.
Rule: pass is defined on the real harness

Bench wiring is useful for iteration, but final judgment must be made on the real harness configuration. Harness capacitance and discontinuities are system-level properties that cannot be fully represented by short bench setups.

Equipment (principles only)
  • Differential probe: bandwidth and common-mode range must cover the expected transient behavior.
  • Oscilloscope: bandwidth and sampling should reveal ringing and settling trends (avoid “smoothed” captures).
  • TDR (optional): use to locate discontinuity trends and compare harness variants (no deep method here).
  • Controlled harness stand-ins: short/long variants for A/B comparisons when the full vehicle harness is unavailable.
Probe points (must-measure)
End point
Confirms termination effectiveness and detects “hidden tails” beyond the termination point.
Midpoint
Used when split termination exists; validates midpoint network influence on settling and CM behavior.
Worst-case node
Confirms that the most disadvantaged node still meets settling and margin targets.
What to measure (aligns with the worksheet)
  • Overshoot amplitude: record peak relative to Vdiff (threshold placeholder).
  • Ringing frequency / decay trend: record trend and compare variants (no hard threshold required).
  • Settling-to-band time: time to enter ±X band and remain (X/Y placeholders).
  • Threshold-crossing jitter: timing dispersion at decision region (trend record).
  • Dominant/recessive symmetry: check that edges and recovery are not strongly asymmetric.
Deliverable · Copyable SOP (minimal and repeatable)
Step 1 · Setup & tags
  • Declare topology tag and termination family (single/split).
  • Declare harness variant ID and connector count tag.
  • Declare probe point tag: End / Mid / Node.
Step 2 · Capture worst transition
  • Capture the dominant → recessive transition at the declared probe point.
  • Ensure the capture reveals ringing and settling (avoid overly filtered views).
Step 3 · Extract metrics
  • Overshoot peak.
  • First crossing / first zero-cross time marker.
  • Settling-to-band time into ±X.
  • Crossing jitter trend across multiple frames.
Step 4 · Pass criteria (placeholders)
Overshoot < X% of Vdiff
Settling within ±X mV in Y ns
Sample-point margin ≥ X% bit time
Error counters do not increase over Y minutes (link out to Diagnostics)
Figure · Measurement setup (must-measure points)
Verification setup: ECU → harness → termination with probe points ECU PHY Harness Connector Branch tag Parasitic Rterm End Probe End Probe Mid Probe Node Must Must Must Record fields Probe tag · Harness ID · Family · Env tag Overshoot · Settling · Margin

H2-11 · Layout hooks (within ECU): termination placement & hidden capacitance control

What this section controls (scope lock)
  • In scope: termination network placement, stub length inside ECU, loop-area minimization, and “hidden capacitance” sources that silently change damping.
  • Out of scope (link out): ground/return implementation, shield strategy, detailed EMC mechanism, and TVS/CMC selection theory (handled on sibling pages).
  • Goal: keep the termination + harness capacitance assumptions intact from schematic → PCB → test.
Termination placement rules (practical, topology-agnostic)
Rule 1 — Minimize the termination stub: the path from bus pins to the Rterm/split network must be the shortest, most direct path; any extra routing becomes a local stub that adds reflection + extra capacitance.
Rule 2 — Minimize loop area: keep the termination loop compact (short traces, tight geometry, few layer transitions) to avoid EMI-driven layout changes that later “move” the damping behavior.
Rule 3 — Keep the “electrical end” consistent: if the electrical bus end is defined at the connector side, avoid pushing termination deep into the ECU routing where it creates an unintended segment between connector and termination.
Link-out placeholders: Ground & Common-Mode · Stub & Harness Length · Protection / CMC
Hidden capacitance sources inside ECU (what silently changes damping)
These items often shift the effective Cdiff/Ccm and the reflection profile, even when the harness is unchanged:
  • Long internal routing: extra length between connector ↔ protection ↔ transceiver ↔ termination increases effective capacitance and creates a local stub segment.
  • Oversized test pads / multiple debug hooks: large pads and branching probes add discontinuities and parasitic capacitance.
  • Protection/CMC footprints: even with the same TVS/CMC, footprint + placement can add stray capacitance and create small resonant structures.
  • Uncontrolled layer transitions: frequent vias and reference changes can create localized impedance steps.
Layout checklist (review-ready, termination/capacitance only)
Placement
  • Rterm/split network is placed to minimize the termination stub (connector-to-termination segment is not accidentally extended).
  • Termination loop area is compact; avoid long “U-shaped” return paths around the termination network.
  • Midpoint path (split termination) is short and direct to its defined reference (details handled on Ground/CM page).
Hidden-C control
  • Remove unnecessary large test pads on CAN/FlexRay differential nets; keep only one minimal probe point if required.
  • Protection/CMC footprints are placed close to the port; routing does not form extra branches before the termination node.
  • Do not add “EMI quick fixes” (extra caps/RC) on the bus without recording the exact location + footprint (it alters damping).
Consistency & logging
  • Keep “port ↔ transceiver ↔ termination” geometry consistent across revisions; log any length/stackup change as a damping risk.
  • Label measurement points (End / Mid / Node) and keep the probe tag stable across builds and harness variants.
Example material numbers (BOM references for parasitic-aware footprints)
These are common automotive-qualified examples used as footprint/parasitic references (not a universal recommendation):
  • Single termination resistor (120 Ω, AEC-Q200 example): CRCW0603120RJNEA (Vishay, 0603)
  • Split termination resistors (60.4 Ω ×2, AEC-Q200 example): CRCW060360R4FKEA (Vishay, 0603)
  • Midpoint capacitor Cmid (0.01 µF, AEC-Q200 example): GCM188R71H103KA37J (Murata, 0603, X7R class)
  • CAN-FD low-cap ESD protection (two-line device example): PESD2CANFD24VT-Q (Nexperia)
  • CAN bus common-mode choke (automotive line-choke example): ACT45B-510-2P-TL003 (TDK, ACT45B family)
Use case on this page: these part numbers help document “what changed” when damping shifts (package, footprint, placement, and parasitics). Electrical limits and EMC compliance must be validated in H2-10 verification.
Figure · ECU port local layout map (termination + hidden-C risk points)
Connector (Bus pins) Protection TVS / CMC (placeholder) Transceiver PHY Termination Single / Split d1 d2 d3 Rterm Cmid ! Footprint parasitic ! Long internal trace ! Big test pad Probe tag discipline END MID NODE

H2-12 · Troubleshooting playbook: symptoms → first check → fix (termination/capacitance only)

Scope lock
  • Only covered here: termination placement/enablement mistakes, split/Cmid side effects, harness + connector + protection parasitics, probe point errors.
  • Not covered: controller bit-timing registers, protocol-layer debug, firmware retry policies (handled on sibling pages).
  • Pass criteria: use placeholders (X/Y) so the same playbook applies to Classic CAN / CAN FD / FlexRay verification (H2-10).
Parts referenced in troubleshooting (to tag parasitic changes)
  • ESD diode examples (CAN-FD low-cap): PESD2CANFD24VT-Q, PESD2CANFD36UQB-Q
  • CMC example: ACT45B-510-2P-TL003
  • Termination resistors examples: CRCW0603120RJNEA, CRCW060360R4FKEA
  • Cmid MLCC example: GCM188R71H103KA37J
FD passes on bench but frame errors appear on real harness
Likely cause: harness Ctotal + extra reflection points push settling into the sampling window; termination stub inside ECU extends the “electrical end”.
First check: measure settling time at END/MID tags; confirm termination really sits at the electrical end (no long internal segment before Rterm).
Fix: shorten the termination stub (H2-11 map), remove hidden-C sources (big test pads), re-run worksheet inputs (H2-9) with real harness Ctotal.
Pass criteria: settling reaches ±X band by Y time; error counters remain flat over Z minutes (placeholders).
Split + Cmid improved EMI, but communication became “fragile”
Likely cause: Cmid too large or midpoint reference path too long adds an extra pole and stretches the edge/settling.
First check: compare edge rate + settling before/after split; verify midpoint trace is short and not routed as a long branch.
Fix: step Cmid down within the planned range (H2-6/H2-9), keep midpoint path compact, avoid “EMI patch caps” on the bus that inflate Ctotal.
Pass criteria: waveform reaches threshold band by Y time; no new ringing mode appears (placeholders).
Ringing increased after swapping TVS/CMC or connector footprint
Likely cause: parasitic capacitance/inductance changed due to package + footprint + placement, shifting damping regime.
First check: confirm the BOM/footprint change; compare the waveform with identical probe tags and identical harness.
Fix: restore the previous footprint/placement discipline; re-budget Ctotal (H2-3) including protection parasitics; keep port protection close to connector.
Pass criteria: overshoot < X% and ringing decays within Y time (placeholders).
Only one end terminated (or termination accidentally enabled in the middle)
Likely cause: wrong topology assumption; termination not at both electrical ends or enabled where it should not be.
First check: audit where 120 Ω (or split pair) exists on the real network; verify termination location matches the electrical ends, not the mechanical ends.
Fix: correct termination placement/enablement; remove “extra” mid-bus termination that over-damps and distorts sampling margins.
Pass criteria: damping regime returns toward critical; stable margins across harness variants (placeholders).
Waveform looks “OK” at one point but fails at another (measurement inconsistency)
Likely cause: probe location/tag changed (END vs MID vs NODE), or the probe itself created a local capacitive load.
First check: enforce probe tag discipline; re-measure at the same physical point with the same setup.
Fix: keep one minimal probe pad; avoid large test pads; document the probe point in the verification log (H2-10).
Pass criteria: results are reproducible within ±X across repeats (placeholder).
Edge became too slow after “stability fixes” (over-damping / late threshold crossing)
Likely cause: Ctotal increased unintentionally (extra pads, added RC, longer trace segment before termination, or Cmid too large).
First check: compare rise/fall and settling; inspect for added capacitive elements and longer internal routing.
Fix: remove extra pads/RC; shorten the internal segment; adjust Cmid within range and re-verify.
Pass criteria: threshold crossing jitter stays below X; settling meets Y (placeholders).
Under-damped overshoot appears after harness change (same ECU)
Likely cause: new reflection points and impedance steps; termination no longer matches the new harness class.
First check: validate the harness class inputs (length/branches/connectors); re-check termination placement at electrical ends.
Fix: run worksheet (H2-9) for the new harness class; avoid patching with ad-hoc capacitors that hide the real mismatch.
Pass criteria: overshoot and ringing decay meet X/Y placeholders on the real harness.
Split midpoint behavior differs across PCB revisions (same schematic)
Likely cause: midpoint reference routing changed (longer path, extra via, different placement), adding parasitics and shifting the pole.
First check: compare midpoint trace length/shape and nearby components; confirm Cmid footprint/value is identical.
Fix: restore a compact midpoint path; keep termination network geometry stable; re-measure damping regime with fixed probe tags.
Pass criteria: revision-to-revision waveforms match within ±X (placeholder).
Works on short harness, fails on long harness (margin collapses with capacitance)
Likely cause: long harness increases Ctotal and adds more reflection points; settling enters the sampling window.
First check: measure settling time on the long harness at END/MID points and compare against the placeholder budget.
Fix: treat harness length class as a worksheet input; validate termination family and Cmid range for that class.
Pass criteria: sampling margin ≥ X% of bit time and settling meets Y (placeholders).
A “fix” works until variant/temperature/build changes (missing logging fields)
Likely cause: the effective damping changed due to an untracked parasitic/layout/BOM difference.
First check: confirm that harness version, connector, protection BOM, footprint revision, and probe tag are recorded.
Fix: enforce “parasitic change tags” (part number + footprint + placement); rerun verification on the real harness matrix (H2-10).
Pass criteria: pass metrics hold across variants under the same placeholder thresholds.
Figure · Troubleshooting matrix (symptom → first check)
Symptoms First check Bench OK, harness fails (FD) Settling into sample window? Ctotal↑? End-point? Split helps EMI, link fragile Cmid too large? Midpoint path long? Ringing after TVS/CMC/conn swap Parasitic change tag? Probe consistent? One-end or wrong-place termination Audit electrical ends + R presence OK at one point, fails at another END/MID/NODE tag consistent? Edge too slow after “fixes” Hidden C added? Cmid ↑? Testpad ↑? Overshoot after harness change New reflections? Termination still correct? Split differs across PCB revisions Midpoint routing changed? Footprint same?
The matrix gives the first physical-layer check. Detailed measurement SOP and placeholder thresholds belong to H2-10 verification.

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H2-13 · FAQs: Termination & Cable Capacitance (troubleshooting only)

Scope: only termination placement/family (single/split), Cmid effects, harness/connector/protection parasitics (Ctotal), probe point & bandwidth traps. No protocol/firmware/controller timing details.
Two 120 Ω ends but still ringing — first check Ctotal or termination location?
Likely cause: termination is not at the electrical ends (a long internal segment/stub exists), or Ctotal increased enough to shift the damping regime.
Quick check: at END probe tag, measure overshoot (%Vdiff) + ring decay time + settling-to-band; confirm Rterm is physically located at the electrical end (no long connector↔Rterm segment).
Fix: move/route the termination network to minimize the termination stub; remove hidden-C contributors (big test pads, extra branches); re-run the worksheet inputs using real harness Ctotal.
Pass criteria: overshoot < X% of Vdiff; waveform settles within ±X mV by Y ns; ring decays to <X% in Y ns (placeholders).
Split termination improved EMI but CAN FD got flaky — Cmid too large or reference point wrong?
Likely cause: Cmid introduces an extra pole (too large), or the midpoint reference path is long/inductive, stretching settling into the sampling window.
Quick check: compare before/after: settling-to-band (±X mV), edge slope, and any new ringing mode; inspect midpoint trace length and whether it becomes a branch/loop.
Fix: step Cmid down within the planned range; keep midpoint routing short/direct; avoid adding extra “EMI patch” capacitors that inflate Ctotal.
Pass criteria: settling within ±X mV by Y ns; sample-window margin ≥ X% of bit time; no new resonance peak above X% (placeholders).
Works with short cable, fails with long harness — first timing/settling metric to log?
Likely cause: long harness increases Ctotal and reflection points; settling crosses into the sampling region (FD/FlexRay are more sensitive).
Quick check: log Tsettle-to-band (time to reach ±X mV band) at END/MID; log overshoot (%Vdiff) + first crossing time + ring decay constant.
Fix: treat harness length class as a worksheet input; verify termination family (single/split) and Cmid range for the long harness class; remove hidden stubs inside the ECU.
Pass criteria: Tsettle-to-band ≤ Y ns (or ≤ X% of bit time); overshoot < X%; repeatability within ±X across runs (placeholders).
After adding a TVS array, overshoot increased — parasitic Cdiff mismatch or placement?
Likely cause: added protection parasitics changed the local impedance step; placement/footprint created a small branch before the termination node.
Quick check: confirm the protection is port-close; measure overshoot and ring frequency shift before/after; verify probe setup unchanged (same END/MID tag and bandwidth limit).
Fix: move protection closer to the connector; shorten the branch; re-budget Ctotal including protection parasitics; keep symmetry to avoid Cdiff mismatch between lines.
Pass criteria: overshoot < X% of Vdiff; ringing frequency stable within ±X% across builds; decay within Y ns (placeholders).
Only one node sees errors — local hidden stub/added capacitance near that ECU?
Likely cause: that ECU has local hidden capacitance (test pads, longer routing) or a local termination mistake, creating a node-specific damping shift.
Quick check: measure at that node’s NODE tag vs END tag; compare Tsettle-to-band and overshoot; audit local termination network enablement and stub length.
Fix: remove extra pads/branches; shorten the local bus entry routing; ensure termination is not accidentally enabled at the node (unless defined as an electrical end).
Pass criteria: node waveform metrics match system baseline within ±X%; no node-only overshoot increase >X% (placeholders).
FlexRay passes at room temp, fails at cold — capacitance drift or edge-rate change?
Likely cause: temperature shifts effective damping (C changes + driver edge changes), pushing settling beyond the usable window on the real topology.
Quick check: at cold, log Tsettle-to-band, overshoot, and ring decay at END/MID; compare against room-temp with identical harness and identical probe tag/bandwidth.
Fix: verify termination placement/topology first; adjust Cmid range (if split) to recover settling margin; remove hidden stubs that become dominant at higher speed.
Pass criteria: cold metrics stay within the same placeholders: overshoot <X%, settle ≤ Y ns (or ≤ X% bit time), repeatable across Z cycles (placeholders).
Changing resistor tolerance changed stability — what’s the quickest check?
Likely cause: effective termination moved away from the target, shifting damping (under/over) enough to reduce margin on long harness/high speed.
Quick check: measure actual Rterm in-circuit (or at least the assembled value class); compare overshoot/settle on the same harness; check if both ends use the same effective Rterm.
Fix: tighten tolerance or standardize termination BOM across ends; avoid mixed termination families (single vs split) without worksheet justification.
Pass criteria: both ends within ±X% of target R; waveform metrics (overshoot/settle) within placeholders across harness variants.
Midpoint capacitor moved closer/farther and behavior changed — loop/return sensitivity?
Likely cause: moving Cmid changed the midpoint loop parasitics (series inductance/branch length), shifting the pole and damping response.
Quick check: compare the new layout’s midpoint trace length/shape; measure any shift in ring frequency and Tsettle-to-band; verify no new branch was created.
Fix: keep Cmid close to the split resistors with a short/direct path; keep geometry stable across revisions; re-validate with the same probe tag discipline.
Pass criteria: ring frequency and decay remain within ±X%; settling within ±X mV by Y ns (placeholders).
Ringing frequency shifted after connector change — what does that imply about C/L?
Likely cause: the connector/transition changed effective parasitics (ΔC and/or ΔL), moving the dominant resonance and altering damping.
Quick check: compare ring frequency (Fring) and decay on the same harness; inspect the transition geometry (pinout/footprint/trace breakout) for added branch length.
Fix: minimize the impedance step at the connector breakout; keep protection/termination placement consistent; re-budget Ctotal including connector parasitics.
Pass criteria: Fring shift ≤ X% across builds; decay time ≤ Y ns; overshoot <X% (placeholders).
End values look right but the eye still closes — over-damping or measurement bandwidth?
Likely cause: over-damping/slow edge from inflated Ctotal/Cmid, or measurement artifacts (bandwidth limit, probe loading, inconsistent probe point).
Quick check: verify the same END/MID probe tag; repeat with a known bandwidth setting and minimal probe loading; log rise/fall time + Tsettle-to-band and compare against the sampling window placeholders.
Fix: remove hidden C contributors (pads/branches); reduce Cmid if split; keep termination at the electrical end; standardize measurement setup and logging fields.
Pass criteria: rise/fall within placeholder envelope; settle ≤ Y ns; sample-window margin ≥ X%; measurement repeatability within ±X (placeholders).
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