Scope, Role, and Boundaries of a Passive Balancing Driver

This section defines the control/scheduling layer for passive cell balancing in multi-cell battery charging / BMS systems. We do not talk about passive vs active balancing theory, isolation / daisy-chain ADCs, or OCV/SOH reconstruction. We assume the pack voltage is already measured and we only decide when, for how long, and how many channels to discharge without overheating the PCB.

Many BMS or multi-cell charger ICs expose one or more CELLx_BAL pins but do not provide a full dispatcher. A passive balancing driver fills that gap: it sequences channels, respects thermal limits, and stops immediately on charger removal or pack faults.

What this driver actually does

It receives per-cell voltages, temperature information, and charger presence, then decides which cell is eligible for passive discharge. It also decides the maximum number of simultaneous channels and whether a global BAL_DISABLE must be asserted.

What this chapter deliberately ignores

• No comparison between passive vs active architectures.
• No discussion on isolated / daisy-chain measurement buses.
• No details on OCV / Coulomb / SOH fusion.

By keeping the scope this tight, later chapters can focus on channel scheduling, thermal spreading, and fault-triggered shutdown without repeating pack-measurement content from other BMS pages.

Channel Scheduling for Passive Balancing

Once the driver layer is defined, the first practical problem is who goes first, how many can run in parallel, and for how long. This section turns that into a repeatable flow that can run in a small MCU. It also exposes the reason why balance/measure interleave must be preserved when sourcing alternative BMS/AFE parts.

Input set for the scheduler

A practical MCU-side scheduler should work with a fixed set of inputs so that sourcing teams can check them when picking an alternative IC:

• CellVoltage[i] for i = 1…N
• ΔV_start – minimum imbalance to start balancing
• N_concurrent_max – max channels to run together (1–2 is common)
• T_on_min / T_on_max – enforce balance window
• Forbidden adjacency map – do not open thermally coupled cells together
• Charger_state – CV / maintenance / absent / fault

Round-robin vs ΔV-priority

Round-robin with eligibility is simple and fair; it just skips cells whose ΔV is below threshold. ΔV-priority is faster for CV tail but must run with strict concurrency limits and with thermal feedback. Both modes must respect the “forbidden adjacency” information coming from layout/thermal analysis.

Interleave balance and measurement

Balancing pulls the cell voltage down transiently, corrupting ADC sampling. The scheduler should open the balance FET, wait a short settle time, then request measurement. This is why BOM notes must say:

“Replacement must support balance/measure interleave, or allow MCU to disable balancing during ADC sampling.”

Concurrency and rhythm

For most 4–6S boards, running 1–2 channels in parallel is the safe choice. After a channel finishes, write a last_balance_ts[i] and enforce a cool-down. Chapter on thermal spreading will reuse that timestamp to avoid hot spots.

Thermal Spread & Hot-Spot Control

In real builds, the bottleneck is not “how fast we can balance” but “how fast a single edge of the board gets hot”. Passive balancing burns energy in local resistors and FETs, usually arranged in a straight line (Cell1…Cell6). This chapter adds thermal awareness on top of the scheduling logic from the previous chapter: rotate zones, limit concurrent channels, and stretch off-time when temperature is high.

We stay on the board-level problem only. We do not cover pack-level runaway, vehicle-level propagation, or mechanical ducting — those belong to higher-level BMS/HV pages.

Identify board-level heat sources

Start from the obvious: bleed resistor power (P = I²R) is the main heater. Add the FET conduction loss, and add the fact that many packs put Cell1…Cell6 on one copper strip. If two adjacent cells are balanced together, you get thermal stacking even when the absolute balance current is modest.

Spread in space (zones)

A simple and robust rule is to create two interleaved zones: Zone A = 1, 3, 5 and Zone B = 2, 4, 6. At runtime the driver is allowed to open cells from one zone only. This makes “two channels running” still safe because they are physically apart on the PCB. If your layout is vertical or grouped, define zones accordingly — the idea is the same: never open two thermally-coupled cells together.

Spread in time (on-time / off-time)

Typical production values:

• Per-channel on-time: 3–5 seconds
• Per-channel cool-down: 15–30 seconds
• Total board active time in one window: limited by layout note / enclosure

These are not arbitrary — they are how you keep a small 4–6S board from cooking one side when it is doing maintenance balancing overnight.

Temperature inputs and degradation

Use any temperature the system exposes: AFE internal temperature, board NTC, or pack temperature. If the alternative BMS/AFE does not report any temperature, the MCU must sample an external NTC and feed it to this logic. With temperature:

• T > T1: concurrency = 1, off-time × 2
• T > T2: trigger global BAL_DISABLE (see next chapter)
• On recovery, use hysteresis so the driver does not chatter

BOM notes

“Alternative must support temperature feedback for balancing or allow external MCU to force global disable.”

“Do not reduce resistor power rating without extending balance off-time.”

Shutdown, Fault, and Safe Disable Path

Even with good scheduling and thermal spreading, there are moments when balancing must stop immediately — not when the current window ends. This chapter defines the fault sources, the shutdown granularity (local / group / global), and the priority order so field maintenance can tell why the driver stopped.

Fault sources that must stop balancing immediately

At minimum, treat these as “stop now” conditions:

• Charger not present / input UVLO
• Thermal > T2 (from the previous chapter)
• Cell fault: OV, UV, or obviously bad reading
• Host / MCU timeout (no heartbeat)
• Service / shipping mode activated

Shutdown granularity

Not every failure needs to kill all balancing:

• Local stop — only the current cell. Use it for bad read / single-cell OV/UV.
• Group / zone stop — same side or same thermal zone. Use it for board-level hot spot.
• Global BAL_DISABLE — everything off. Use it for charger removal, T > T2, or MCU watchdog.

If the AFE supports a hardware BAL_DISABLE, use that path first and let the MCU log afterwards.

Priority order

Make the order explicit so procurement and firmware do the same:

1. Charger / input removed → Global
2. Thermal > T2 → Global
3. Cell fault → Local (optionally Group)
4. Host / MCU timeout → Global for automotive / safety

Event logging for maintenance

Log at least: which channel was on, start/end time, fault source, and shutdown level. If the replacement IC does not expose a log area, keep the log in MCU RAM/FRAM. Using the same timestamps as the charger/BMS state machine makes field debugging easier.

BOM notes

“Alternative must expose charger / fault status to the balancing driver or allow MCU to force BAL_DISABLE.”

“Log reason for balance abort to support field maintenance.”

Integration with Multi-Cell Charger Controllers and BMS AFEs

A passive balancing driver never runs in isolation. It must hang behind a multi-cell charger controller and/or a BMS AFE that already knows: “we are in CC”, “we are in CV”, “the charger is not present”, or “a cell reported a fault”. This section shows how to plug the scheduler/thermal/shutdown logic from previous chapters into common IC architectures from the major vendors.

We keep this chapter focused on integration and signals: we do not explain charger PWM/buck/buck-boost principles, and we do not explain isolated/daisy-chained communication — those belong to other BMS pages.

Common integration patterns

1) AFE with built-in balance control. You only push conditions (CV reached, temp OK, charger present). Scheduling and thermal constraints still belong to your firmware, because not all AFEs rotate zones or interleave measurements.

2) AFE exposes balance pins only. This is the most common case. You must run Chapter 2 (scheduling), Chapter 3 (thermal), and Chapter 4 (shutdown) in the MCU. Do not copy vendor demo code without thermal safeguards.

3) No balance → external board. AFE measures, MCU decides, external FET board executes. Chapter 3 still applies because FETs and resistors are now even more localized.

Interface with charger state machine

• Charger enters CV → BAL_ENABLE
• Charger removed / not present → BAL_DISABLE
• Charger fault → BAL_DISABLE + log(reason = charger_fault)

These three rules prevent the classic mistake: the pack keeps bleeding after the adapter has been unplugged.

Procurement / alternative checklist

When sourcing an alternative multi-cell charger or AFE, verify:

• Per-cell balance outputs are present
• Balance/measure interleave is supported or can be emulated
• Balance current is sufficient or can be compensated by longer T_on
• Temperature / fault is exposed to the driver

Small-Batch Procurement and Cross-Brand Alternatives

Small batches rarely get the exact IC the design engineer picked. You may find the TI part with the nice balance hooks is out of stock, while an ST or NXP monitor-only AFE is available. This section explains what must not be lost when swapping brands: per-cell control, thermal-aware operation, and balance/measure interleave.

Typical small-batch situations

You planned for a TI bq device with balance hooks; lead time becomes 14 weeks. Distributor has an ST storage AFE and an NXP monitor-only device on the shelf. You can switch, but then you must re-validate: per-cell control, balance/measure interleave, and thermal spreading.

Fields you must re-check before approving a swap

• Per-cell balance output: is there a distinct control for each series cell?
• Balance current/power: if lower than original, increase T_on from Chapter 2.
• Temperature feedback: if missing, feed an NTC to MCU and let Chapter 3 run there.
• Balance/measure interleave: if unsupported, run “off → wait → measure” in firmware.
• Automotive / AEC-Q100: if the design was for automotive, keep the grade.

Cross-brand migration patterns

If the original AFE had native balancing and the replacement does not, move Chapter 2–4 into MCU. If the original had higher balance current, do not “speed it up”; instead, keep thermal limits and extend the balance window. If the original had good temperature reporting, but the replacement does not, connect a board NTC to MCU and let Chapter 3 command the global BAL_DISABLE.

BOM note templates

“Alternative must preserve per-cell passive balancing control; do not replace with monitor-only devices.”

“If balance current is lower than original, firmware must extend balance window and preserve thermal limits.”

“Keep temperature feedback path for thermal spreading shutdown.”

Recommended topics you might also need

• Cell Monitor AFE (3–18S+)
• Active Balancer / Charge Shuttle
• Multi-Cell Charger Controller (2S–6S)
• Isolated Stack Comm (isoSPI/CAN-FD)
• BMS Master MCU (Safety)

1. What’s the safe number of passive balancing channels to run in parallel on a 4–6S pack?

On small 4–6S boards the safe default is one channel at a time. You can allow two channels only if the layout is split into non-adjacent zones (e.g. 1,3,5 vs 2,4,6) and temperature is below T1. When temperature rises above T1, force concurrency = 1; if it reaches T2, trigger global BAL_DISABLE. This ties back to the thermal spreading logic of Chapter 3 and the shutdown rules of Chapter 4.

2. Should I enable balancing during CV charge or only after charge completion?

The safest window is late CV or maintenance charge, when the charger is present and current is low. You can also balance during CV if the charger reports “input present” and you disable balancing immediately when the charger is removed. The key rule is: charger fault or removal → immediate BAL_DISABLE + event log. This is the integration pattern from Chapter 5.

3. How do I prevent ADC readings from being distorted when a cell is being balanced?

Treat “balanced” measurements as invalid and interleave: turn off balance → wait measurement delay → sample. If the AFE natively supports balance/measure interleave, enable that mode; if the replacement AFE does not, implement the timing in the MCU. Add to your BOM note: “replacement must support balance/measure interleave or allow MCU-controlled off-then-measure sequencing.”

4. What temperature thresholds should I use to degrade or disable balancing?

Use a two-level policy: at T1 reduce concurrency to 1 and extend cool-down time; at T2 trigger a global BAL_DISABLE through the driver. Exact numbers depend on board copper, enclosure, and cell spacing, but the behavior must stay the same across IC substitutions. If the alternative IC does not expose temperature, read an NTC with the MCU and feed the same policy.

5. Can I mix internal balance FETs and external MOSFET-based balancing on the same design?

Yes, as long as both are driven by the same passive balancing driver that enforces channel scheduling and thermal spreading. Internal FETs usually tolerate shorter on-times, while external MOSFET+resistor branches may heat up faster and must obey the cool-down from Chapter 3. Never let the AFE auto-balance while the MCU is also opening external branches without coordination.

6. How often should I rotate balancing across adjacent cells to avoid hot spots?

A practical pattern is 3–5 seconds on per cell, then 15–30 seconds off for that same cell, and alternate between Zone A (1,3,5) and Zone B (2,4,6). If the board temperature rises toward T1, skip the hot zone for one or two cycles. This way you equalize voltage without warming a single edge of the PCB for too long.

7. What signals should trigger an immediate global BAL_DISABLE?

Always stop all balancing on charger removal/input UVLO, on overtemperature at or above T2, on host/MCU timeout, and when the system enters service/shipping mode. Some packs also stop globally on cell read failures for safety. Use the AFE’s hardware BAL_DISABLE when available and log the reason in firmware.

8. How do I log “balance aborted because of charger removal” events?

Log four fields: cell/channel ID, start timestamp, stop timestamp, and stop reason = “charger_removed”. If the AFE does not provide nonvolatile logging, store it in MCU RAM/FRAM and align timestamps with the charger/BMS state machine. This lets field engineers see that the driver stopped correctly when external power disappeared.

9. What do I need to check if I replace a TI monitoring/BMS IC with an ST/NXP alternative?

Verify that the alternative still has per-cell balance outputs, exposes cell voltage and temperature to the driver, and supports balance/measure interleave or can be controlled by the MCU. If balance current is lower, extend the balance window from firmware. Add to the BOM: “do not replace with monitor-only parts”.

10. Can I run balancing while the pack is supplying the system load?

You can, but you must interleave measurements more strictly because load current and balance current add up on the same cell. Some designs only allow balancing while external power is present or the system load is below a threshold. If ADC noise becomes excessive, suspend balancing until the load relaxes.

11. How do I size the balance time window if the alternative IC has a lower balance current?

Keep the short per-channel on-time from Chapter 2 (3–5 s), but repeat it more times and extend the overall balance window until the target ΔV is met. Do not compensate by making a single on-time very long, because that breaks the thermal spread of Chapter 3. Write in your BOM that firmware shall extend balance windows for lower-current alternates.

12. How do I write a BOM note so purchasing won’t pick a monitor-only part?

Use a direct statement in English: “Alternative must preserve per-cell passive balancing control; do not replace with monitor-only devices. If balance current is lower than original, firmware must extend balance window and keep thermal limits. Keep temperature feedback for BAL_DISABLE.” This tells purchasing that this function is not optional.