Where Sync & Timing Breaks First

• SYSREF/CLK paths: alignment depends on the relative timing budget across isolation, not on a single “nice” clock spec.
• Data vs control: data paths are margin-driven; control paths are state-driven (safe defaults under power events).
• Multi-channel (2–8ch): channel matching must be guaranteed as a group, not assumed from “typical” values.
• Mixed direction: forward and reverse directions rarely share identical timing; asymmetry must be explicit in the budget.

Boundary Contract

What This Page Delivers

• A reusable timing budget template for isolation paths (fixed offset + mismatch + noise + drift).
• Practical grouping rules for matched multi-channel timing.
• Measurement-ready acceptance criteria placeholders (X/Y/N) to prevent lab-to-lab disputes.

tPD — Propagation Delay (direction + edge dependent)

Definition: Time offset from input edge to output edge across the barrier (often split as tPLH/tPHL).

How to measure: Use a shared reference edge; specify threshold rule (X%) and edge polarity; record both rise and fall delays.

System consequence: A fixed latency shift can move sampling/alignment windows even when jitter is low.

Common trap: Treating “typ” as stable across PVT, or mixing rise/fall edges in one acceptance claim.

tSK — Channel-to-Channel Skew (group integrity term)

Definition: Relative delay difference between channels that are intended to align (within one package or across multiple devices).

How to measure: Drive the same stimulus into all channels; measure output edge timestamps with the same threshold rule; report max-min over Y samples.

System consequence: Multi-channel sampling alignment breaks even if each channel’s absolute delay “looks OK”.

Common trap: Assuming two single/dual-channel parts match like one multi-channel part, or ignoring direction asymmetry in mixed-direction groups.

Jitter — Random vs Deterministic (budget impact only)

Definition: Edge timing variation around a mean. Random jitter accumulates statistically; deterministic jitter is bounded and often coupling-driven.

How to measure: Declare window length and statistic (RMS or p-p); isolate measurement noise; avoid comparing RMS and p-p without a stated conversion factor.

System consequence: Jitter reduces timing margin and can masquerade as “skew” when thresholds bounce under common-mode injection.

Common trap: Using a single p-p capture as a budget value, or failing to lock the same sampling/trigger method across labs.

Deterministic Latency — Fixed Offset That Does Not Average Out

Definition: A repeatable, fixed timing offset (or discrete steps) introduced by architecture, retiming placement, or power/sequence states.

How to measure: Measure absolute delay against a stable reference before/after topology or power-sequence changes; log state conditions (VDD, UVLO events).

System consequence: Alignment can shift “by a chunk” without visible jitter growth; lock can fail after a reset/thermal/power event.

Common trap: Folding deterministic shifts into a generic “tPD” number and losing traceability when systems behave differently after recovery events.

Measurement Assumptions (placeholders to lock later chapters)

• Threshold rule: X% of swing (declare X).
• Sample size: Y edges per channel (declare Y).
• Window: Z seconds per condition (declare Z).
• Environment: T = {T1/T2/T3} °C and VDD = {V1/V2} (declare points).
• Pass/fail format: “max-min ≤ X” and “RMS ≤ Y” with stated statistic.

Spec Transferability Check (test condition → system equivalence)

• VDD / UVLO behavior: If VDD changes during startup, recovery, or load steps, treat timing change as drift (not “fixed”).
• Load / Cload / edge shaping: If system loading slows edges or introduces threshold bounce, add margin to measurement error and deterministic jitter risk.
• Temperature range: If the system operates beyond “typ room”, timing spread must be captured as drift across declared T points.
• Data rate / toggle pattern: If real traffic has different edge density than datasheet stimulus, bounded jitter can be underestimated—require an explicit pattern note.

typ vs max vs distribution (production consistency lens)

• typ: center estimate only; never used as pass/fail for alignment-critical paths.
• max/min: use for worst-case constraints, but verify the scope (across PVT? only one condition?).
• distribution: if not provided, treat as unknown spread—add margin or require sample characterization to protect yield.

Engineering rule: if a number is missing its conditions, it is missing its meaning.

When Skew Is More Dangerous Than Jitter

• Multi-channel alignment: skew is a deterministic mismatch that does not average out; it directly breaks relative sampling alignment.
• Part-to-part grouping: skew risk rises when channels are split across devices (package-level matching is lost).
• Clock quality focus: jitter dominates only after skew and drift are bounded to the alignment requirement.

Spec-to-Budget Mapping (fields are placeholders)

Each datasheet spec must land in a budget column: tPD, tSK, jitter, drift, or measurement error.

Step-by-Step Workflow (reusable)

1. Define the alignment group: which channels must match (A/B/…); note direction mix and whether channels span multiple devices.
2. Choose the layer model: Source → Conditioning → Isolation → Receiver → Sampling point.
3. Extract per-layer terms: separate fixed offset, drift, jitter, and measurement error.
4. Apply margin order: lock worst-case drift and fixed mismatch first; add statistical jitter last (with declared statistic).
5. Declare acceptance: state X/Y/N placeholders (threshold rule, samples, window, T/V points) and compute Total_skew.

Layer Breakdown (where the budget terms live)

• Source: reference clock stability and initial phase/delay offsets that become “baseline”.
• Conditioning: buffer/driver/level shaping terms that alter edge timing or add threshold sensitivity.
• Isolation: channel mismatch and barrier-induced variation (direction asymmetry included).
• Receiver: input threshold bounce, loading, and retiming placement effects.
• Sampling point: the effective alignment window where SYSREF/CLK or multi-channel timing must land.

Budget Equation + Pass/Fail Placeholders

Total_skew = Σ(skew_fixed) + Σ(skew_drift) + k · RMS(jitter) + Σ(measurement_error)

Pass criteria: Total_skew ≤ X ps (declare: threshold rule = X%, samples = Y, window = Z, Temp/VDD points = N).

Budget Template (fill-in cards, no wide tables)

Alignment Target (timing-only)

• Goal: keep SYSREF and CLK relationships predictable across the barrier so downstream alignment windows remain valid.
• Budget focus: bound tPD match, tSK, jitter, and drift under declared measurement assumptions.
• Critical nuance: deterministic offsets after power/recovery events must be recorded as a fixed budget contributor.

Topology Choice: Low-Jitter Isolation vs Digital Isolation + Retime

• Prefer low-jitter clock isolation when the clock is the sampling reference and jitter is a dominant budget term.
• Prefer digital isolation + retimer/CDC when deterministic alignment and grouping control dominate, and a controlled retime point exists on the secondary side.
• Always declare the statistic (RMS/p-p), window, and trigger/threshold rules; otherwise budgets are not comparable across labs.

Common Failure Signatures (timing accounting first)

SYSREF/CLK Path Checklist (isolation-only)

• Path contract: define which segments share the same barrier and belong to the same match group.
• tPD match: record edge polarity (rise/fall) and direction; prevent mixing tPLH and tPHL in one claim.
• tSK control: define group membership; avoid part-to-part grouping without explicit spread margin.
• Jitter accounting: declare RMS/p-p, window length, and bandwidth; include threshold bounce as “equivalent jitter”.
• Drift accounting: separate temperature/voltage/aging drift; verify at declared points.
• Recovery behavior: bound deterministic offset after UVLO/reset; log state conditions for reproducibility.

What Changes When Scaling to 2–8 Channels

• Single package vs multi-device stitching: part-to-part spread and thermal gradients add skew and drift beyond datasheet “typ”.
• Mixed direction: forward and reverse paths can have different tPD distributions; alignment must be defined per match group.
• Shared vs independent supplies: shared rails improve correlation; independent rails improve isolation but can worsen edge drift and asymmetry.

Match-Group Rules (timing contract)

• Define groups explicitly: which channels must align (Group A/B/…); do not assume all channels share one skew limit.
• Split by direction: mixed-direction channels require separate tPD/tSK accounting.
• Pin the reference path: SYSREF/CLK-critical channels should not be mixed with unrelated control lanes without a stated skew budget.

Architecture Decision Matrix (no part numbers)

Use these cards to select an architecture by risk, routing, testability, and cost pressure. Scores are qualitative (Low/Med/High).

Verification Hooks (group-based)

• Stimulus: drive the same edge stimulus across all channels in a group (same threshold rule).
• Metric: report skew as max-min over Y samples within a declared window.
• Conditions: verify at declared T/V points; include recovery events if field behavior depends on reset/UVLO.

Signal Class → Dominant Timing Sensitivity

• Clock (sampling reference): dominated by jitter and coupling. Re-clock can add fixed offset that must be bounded.
• Data (multi-lane / group-aligned): dominated by skew and deterministic mismatch; a defined retime point can “reset” uncertainty in the sink domain.
• Control (enable/reset/IRQ/state): dominated by tPD and glitch-free monotonicity; pulses require explicit CDC semantics to avoid loss or duplication.

Decision Tree (3 Steps)

Step 1 sets the optimization goal. Step 2 selects the signal semantics. Step 3 chooses placement. Each choice must map to explicit budget terms.

Placement Options → Budget Meaning

Hidden Couplings That Inflate “Equivalent Jitter”

• Return-path across the gap: forces current to detour, distorts edges, and makes trigger thresholds unstable.
• Barrier capacitance: injects common-mode transients into the secondary reference, appearing as threshold bounce.
• High dv/dt environments: switching nodes couple into the barrier and receiver input networks, creating “fake jitter” under events.

Layout Guardrails (Isolation Timing Focus, ≤10)

• Hard partition primary/secondary copper and reference planes: prevent cross-gap reference dependencies.
• Do not allow high-speed return paths to cross the barrier gap: cross-gap return equals edge distortion mapped into timing noise.
• Keep barrier-underlay copper minimal: reduce capacitive coupling and common-mode injection.
• Push high dv/dt nodes away from isolator and timing-critical lines: avoid event-only failures.
• Stabilize receiver thresholds (clean local supply + decoupling): threshold bounce inflates equivalent jitter.
• Keep match-group routes symmetric: equal reference and environment reduces fixed mismatch and drift gradients.
• Close each side’s current loop locally: avoid large loops that radiate and pick up transients.
• If a Y-cap is used, treat it as a budgeted element: define leakage constraints and measure the effect on timing noise.
• Standardize measurement method: trigger level, probe grounding, and capture window must be declared.
• Verify under events: include switching transients, UVLO/reset, and thermal conditions in the timing acceptance plan.

Drift Terms (Budget Language)

• Continuous drift: track ΔtPD(T) and ΔtSK(T) across temperature points (placeholders only).
• State-dependent offset: power-cycle / UVLO / reset can introduce a repeatable fixed offset between states.
• Long-term drift: lifetime and stress can widen distributions; focus on tail growth and match-group consistency, not mechanism detail.

Supply & Sequence Effects (Where “Transient Skew” Hides)

Drift Test Plan (Template)

Measurement Contract (Lock Before Debating Numbers)

Tool Selection (When to Use What)

Measurement Checklist (≤10)

• Declare rise/fall definitions and the trigger threshold used.
• Use a defined reference path and keep it unchanged across runs.
• Use same-source triggering or correlated timing when comparing paths.
• Declare window length and whether event segments are included.
• Declare statistic type (RMS / p-p / max-min) and keep it consistent.
• Set and record sample count N; avoid mixing runs with different N.
• Record temperature and VDD points for every dataset (placeholders allowed).
• Separate Offset_state from jitter; store it as its own field.
• Standardize probe grounding and fixture delay handling (declare yes/no).
• Repeat at multiple PVT points and after event sequences to confirm stability.

Pass Criteria Template (Placeholders)

tSK_max ≤ X ps over N samples @ T = Z°C, V = Vnom
ΔtSK(T) ≤ Y ps from T_low to T_high
Offset_state ≤ W ps across sequence S
jitter_RMS ≤ J ps over window W with BW = B

Production Lockdown (Minimal Trace Fields)