← Back to: eFuse / Hot-Swap / OR-ing Protection
Executive Summary
An eFuse gives programmable current limit (ILIM) and controlled dv/dt soft-start, applies fast/slow trip curves to pass benign inrush while tripping true shorts, blocks reverse current, and exposes PG/FAULT and I²C/PMBus telemetry for logging and field recovery—unlike one-time, unobservable fuses or high-drop Schottky OR-ing.
Do not equate traditional fuses or Schottky OR-ing with eFuses: they lack programmability, telemetry, and controlled start-up.
Two lethal substitutions: (1) Schottky for ideal-diode control → excessive drop/heat; (2) Non-telemetry eFuse for a telemetry-required BOM → no cloud observability.
BOM hook: Telemetry required; do-not-substitute with non-telemetry parts.
Mechanism & Block Interactions
Current sense → ILIM DAC → comparator → pass control forms the limiting loop. A programmable dv/dt ramp shapes start-up, protection comparators enforce SC/OV/OT, reverse blocking prevents backfeed when VOUT > VIN, and PG/FAULT plus I²C/PMBus provide observability and recovery hooks.
Inrush sizing: I_inrush ≈ C_load × dV/dt. Shape dv/dt to pass benign capacitive surge while avoiding upstream brown-out.
Conduction heating: P_cond ≈ I_RMS² × Rds(on), ΔT ≈ P_cond × θJA. Escalate to Hot-Swap if thermal headroom is marginal.
Reverse blocking: ensure V_rev_block ≥ |V_backup − V_main|_max and validate leakage cutoff during OR-ing transitions.
BOM hooks: ILIM = __A; dv/dt = __ V/ms; ttrip_fast ≤ __ µs; reverse block ≥ __ V; PG/FAULT to MCU; telemetry = status/ILIM/Vin/Vout/Isense/Temp/EventLog. Do not substitute telemetry-enabled parts with non-telemetry devices.
Key Parameters & Calculations
Set ILIM and dv/dt from the allowed inrush, then choose Fast/Slow trip windows to pass benign surge while tripping hard faults;
verify reverse blocking and thermal limits. Use I_inrush ≈ C_load × dV/dt, P_cond ≈ I_RMS² × Rds(on), ΔT ≈ P_cond × θJA.
ILIM flow: define I_inrush_limit from source/connector limits → compute dV/dt_max with C_load → choose working dV/dt & set ILIM ≥ I_inrush(working) but ≤ source capability.
Trip windows: Fast (µs) for shorts within copper/connector SOA; Slow (ms–s) for overload/foldback. Target = pass benign surge, trip harmful current.
Reverse blocking: ensure V_rev_block ≥ |V_backup − V_main|_max; measure reverse leakage and cutoff during OR-ing transitions.
BOM hooks: ILIM = __ A; dv/dt = __ V/ms; ttrip_fast ≤ __ µs; slow foldback = __ A @ __ ms; reverse blocking ≥ __ V; PG/FAULT to MCU; telemetry = status/ILIM/Vin/Vout/Isense/Temp/EventLog.
Telemetry & I²C/PMBus Minimal Schema
Substitution is allowed only if telemetry is aligned to a minimal cross-brand schema and validated. Required fields:
STATUS{SC,OV,OT,REV,RETRY,LATCH}, ILIM_SET, I_SENSE(avg/peak), VIN, VOUT, TEMP, and
EVENT_LOG(last_code, counter, timestamp).
Mapping flow: Brand registers → unit/LSB scaling → enum mapping → unified schema → validate with scripted faults → approve substitution.
Polling & events: Periodically read STATUS/Vin/Vout/Isense/Temp; on PG/FAULT, snapshot EVENT_LOG. Buffer uploads during disconnection.
Common pitfalls: LSB/offset mismatch; ILIM_SET is read-only mirror; non-exclusive event codes; no buffering causes lost incidents.
BOM hooks: Telemetry (I²C/PMBus) required: STATUS{SC,OV,OT,REV,RETRY,LATCH}, ILIM_SET, I_SENSE(avg/peak), VIN, VOUT, TEMP, EVENT_LOG. Cross-brand substitution allowed only after cloud mapper is updated and validated.
Latch vs Auto-Retry (Timing & Firmware Dependencies)
Choose Latch for high-safety systems to avoid oscillatory restarts and require human/firmware clearance. Choose Auto-Retry when faults are transient and self-recovery is desired—but cap retry cycles and duty to protect the upstream rail.
Latch: single fault → latched-off until cleared by human/FW. Suits high-risk domains; enables root-cause logging; prevents bounce.
Auto-Retry: auto recovery for transients; configure N_retry_max, t_retry_off, and duty_retry_max to avoid hammering the source.
PG/FAULT timing: debounce PG (0.5–2 ms) and FAULT (50–200 µs); ensure a log window ≥ debounce and I²C read time.
Validation scripts: (1) Step load→SC pulse: measure ttrip_fast, PG↓, FAULT↑; (2) ms overload: verify Latch vs Retry behavior; (3) repeated SC: confirm N_retry_max and upstream sag; (4) log integrity with EVENT_LOG.
BOM hooks: Mode={Latch|Auto-Retry}; N_retry_max=__; t_retry_off=__ ms; t_retry_on_ramp=__ ms; duty_retry_max=__%; PG debounce=__ ms; FAULT debounce=__ µs; Log=STATUS/Vin/Vout/Isense/Temp/EventLog.
Thermal & SOA Checks (When to Use Hot-Swap)
Check conduction loss and temperature rise in steady state, then validate pulse/short-circuit SOA. If margin is thin or repeated pulses approach SOA limits, upgrade to Hot-Swap (controller + external MOSFET).
Steady-state: P_cond ≈ I_RMS² × Rds(on), ΔT ≈ P_cond × θJA. Consider Rds(on) vs temperature and copper spreading.
Pulsed short: estimate E_pulse ≈ V_DS · I_D · t_pulse (rectangular approx) and map to SOA. Derate for repetition and duty.
Upgrade threshold: ΔT close to limit, SOA point near boundary, or upstream supply sags under retries → move to Hot-Swap.
Validation scripts: (1) Long-run I_RMS thermal soak to record ΔT; (2) Inject t_pulse/I_peak and compute E_pulse → map to SOA; (3) Repeated pulses with duty limits; (4) Auto-Retry heat run to monitor upstream sag/overheat.
BOM hooks: Rds(on) ≤ __ mΩ; θJA ≤ __ °C/W; ΔT_meas ≤ __ °C @ I_RMS = __ A; SOA pass @ V=__ V, I=__ A, t_pulse=__ ms, rep=__ Hz; Upgrade to Hot-Swap if Margin_T < __ °C or SOA ratio < __%.
Interface with Ideal-Diode / OR-ing (Low-Drop Switching)
Ideal-diode controllers provide low-drop priority switching; the eFuse adds current limiting, protection, and reverse blocking.
Calibrate the priority window ΔV_priority (typ. 30–80 mV, part-dependent), coordinate reverse blocking to avoid back-feed and “hiccup”.
Priority window: start with 30–80 mV and tune in hardware. Too small → oscillation; too large → delayed switchover & extra droop.
Reverse blocking: Ideal-diode governs forward paths; eFuse blocks reverse when VOUT>VIN. Use hysteresis/hold-time to prevent ping-pong.
No Schottky parallel: diode drop × current = heat; also breaks priority control and telemetry consistency. Prohibit in BOM.
BOM hooks: ΔV_priority = __ mV (calibrated); t_sw ≤ __ ms; I_backflow ≤ __ mA; Reverse blocking ≥ __ V; Schottky-parallel OR-ing = prohibited; Kelvin sense for gate/sense.
Test pointers: Sweep source delta to find switch points; fast drop/restore on Main to log Vout_min & t_sw; inject reverse step at Vout to verify cutoff and leakage.
Validation & Test Flow (Executable)
Run a scriptable matrix to cover inrush, fast trip, overload/thermal, reverse blocking, PG/FAULT timing, hot-plug repeatability, and event-log consistency. Record the minimal telemetry set: Vin, Vout, I_load, I_inrush_peak, t_trip_fast, t_slow, ΔT, I_rev_leak, t_sw, PG/FAULT edges, EVENT_LOG{code,counter,timestamp}.
Script cues: Use ≥200 MHz scope; SC edge < 200 ns; temperature at steady state and during pulses; log raw I²C/PMBus frames for traceability.
BOM hooks: I_inrush_limit=__ A; t_trip_fast ≤ __ µs; I_fold_slow=__ A@__ ms; V_rev_block ≥ __ V; I_rev_leak ≤ __ mA; PG=__ ms; FAULT=__ µs; t_sw ≤ __ ms; Hot-plug fail_rate ≤ __%; EVENT_LOG schema per telemetry chapter.
Small-Batch Procurement & Cross-Brand Alternatives (A→A / A→B / A→C)
Approve replacements only after threshold parity (ILIM, dv/dt, trip curves) and telemetry alignment. Prefer A→A (same brand, pin-compatible) → A→B (cross-brand, near footprint, mapping updated) → A→C (over-spec upgrade with layout/SOA recheck).
Validate these fields: ILIM range · dv/dt control · Fast/Slow Trip · Reverse block · PG/FAULT · Telemetry · Rds(on) · θJA
A→A (Same Brand, Pin-Compatible)
Zero-layout change. Verify parity using trip curves and dv/dt behavior.
- TI: TPS25947 ↔ TPS2595x; TPS25981 ↔ TPS25982
- ST: STEF05 ↔ same-family STEF variants; STEF12 ↔ same-family variants
- onsemi: NIS5020 ↔ NIS5021
- Microchip: MIC2545A ↔ MIC2549 / MIC20xx family
- Renesas: ISL6144 ↔ ISL6146 (family parity check required)
- NXP / Melexis: generic eFuse parts uncommon in this domain; A→A typically not applicable
A→B (Cross-Brand, Near-Footprint)
Mandatory: update BOM thresholds and telemetry mapping before release.
- 5 V port protection: TI TPS25947 ↔ ST STEF05 ↔ onsemi NIS5021 ↔ Microchip MIC2549
- 12 V load protection: TI TPS25982 ↔ ST STEF12 ↔ onsemi FPF2xxx
- 12–24 V controlled power-up: TI TPS25940/25980 ↔ Renesas ISL6144/6146
BOM note: Telemetry required; mapping updated (STATUS/I/VIN/VOUT/TEMP/EVENT_LOG). No Schottky OR-ing.
A→C (Over-Spec Upgrade / Layout Change)
If ΔT or SOA is tight, upgrade to Hot-Swap + external MOSFET and re-check layout.
- TI: eFuse → LM5069 / TPS24772 (Hot-Swap controller)
- Renesas: ISL6144 / ISL6146 (Hot-Swap)
- onsemi: NIS6350 / NIS6xxx (higher power domain)
- Microchip: MIC2549 → move to low-Rds(on) external FET solution if needed
- NXP / Melexis: not typical for generic eFuse in this page; handle at system level if brand must be present
Re-validate SOA (Ch.6) and ΔV_priority (Ch.7); accept layout changes.
BOM hooks: ILIM_set=__ A; dv/dt=__ V/ms; FastTrip=__ µs@__A; SlowTrip=__ ms@__A; V_rev_block ≥ __ V; I_rev_leak ≤ __ mA; PG=__ ms; FAULT=__ µs; Rds(on) ≤ __ mΩ@__°C; θJA ≤ __ °C/W; Telemetry fields present: STATUS/ILIM/I/VIN/VOUT/TEMP/EVENT_LOG.
Prohibit: non-telemetry parts for telemetry-required designs; Schottky OR-ing; release without cloud mapping update.
Layout & Implementation Guidelines (Reliable · Measurable · Thermally Safe)
Avoid “parameters OK but board fails” by focusing on five areas: Thermal copper, Measurement points, Surge loop minimization, Probe pads, and ESD/surge placement. Tie results to ΔT and SOA checks (Ch.6) and to priority window stability (Ch.7).
Thermal: solid copper under eFuse + via array; keep away from temp-sensitive parts; reserve contact copper to chassis. Target margin ≥ 15–20 °C.
Measurement: Kelvin points for current/voltage; short/clean PG/FAULT & I²C; place pull-ups near device; validate edges and I²C integrity.
Surge loop: place input capacitors tight to VIN/GND; use parallel traces and via curtains; limit hot-plug inductive loop area.
Probe pads: reserved pads for scope/load; keep I_SENSE and VIN/VOUT pads adjacent and labeled to avoid fly-wires.
ESD/surge: TVS close to connectors; short return; single-point tie of protection ground and signal ground; pre-check IEC 61000-4-2/-4-5.
Thermal/SOA linkage: ΔT_meas ≤ __ °C @ I_RMS=__ A; θJA ≤ __ °C/W; SOA pass @ V=__ V, I=__ A, t=__ ms, rep=__ Hz.
Switching stability: ΔV_priority tuned; no oscillation/hiccup; PG debounce=__ ms; FAULT debounce=__ µs.
Pitfalls & Pre-Release Checklist (Launch Gate)
Parameters can look correct while systems still fail from brown-out, back-feed, thermal limits, or logging gaps. Treat the items below as must-pass gates. Only an all-green checklist qualifies for release.
Schottky in place of ideal-diode
Fixed drop → heat; priority window lost.
Gate: “No Schottky OR-ing” present in BOM; ΔV_priority preserved.
ILIM too high / Fast Trip too lax
Shorts overheat copper/connector.
Gate: t_trip_fast ≤ __ µs @ SC; copper ΔT ≤ __ °C.
dv/dt too fast
Upstream brown-out unseen during plug-in.
Gate: VIN sag ≤ __ mV across dv/dt sweep; no false trips.
Reverse blocking untested
Back-feed during dual-rail switching.
Gate: I_rev_leak ≤ __ mA @ Vout>Vin by __ V (temp corners).
PG/FAULT not wired or logged
Firmware retries lack evidence.
Gate: PG debounce=__ ms; FAULT debounce=__ µs; edges captured.
No hot-plug repeatability
Field-only hiccups or PG chatter.
Gate: ≥ __ cycles/min for __ min; fail rate ≤ __%.
Cross-brand mapping not updated
Cloud analytics and alarms break.
Gate: STATUS/ILIM/I/VIN/VOUT/TEMP/EVENT_LOG mapped.
Capture set: Waveforms {Vin, Vout, I_inrush, I_load, PG, FAULT}; Scalars {t_trip_fast, dv/dt, I_rev_leak, ΔT, θJA, t_sw, ΔV_priority}; Logs {code, counter, timestamp}; parity with cloud records.
BOM note 1: Telemetry required; non-telemetry parts are not allowed.
BOM note 2: No Schottky OR-ing; keep ideal-diode priority window and reverse-blocking intact.
BOM note 3: Release only after cloud mapping for STATUS/ILIM/I/VIN/VOUT/TEMP/EVENT_LOG is updated.
| Test | Threshold | Result |
|---|---|---|
| SC Fast Trip | t_trip_fast ≤ __ µs; ΔT ≤ __ °C | □ PASS □ FAIL |
| dv/dt Brown-Out | VIN sag ≤ __ mV (sweep) | □ PASS □ FAIL |
| Reverse Blocking | I_rev_leak ≤ __ mA @ ΔV=__ V | □ PASS □ FAIL |
| PG/FAULT Logging | PG=__ ms; FAULT=__ µs; edges logged | □ PASS □ FAIL |
| Hot-Plug Repeatability | ≥ __ cycles/min × __ min; fail ≤ __% | □ PASS □ FAIL |
| Priority Window (Ch.7) | ΔV_priority tuned; no ping-pong | □ PASS □ FAIL |
| Cloud Mapping (Ch.4) | STATUS/ILIM/I/VIN/VOUT/TEMP/EVENT_LOG mapped | □ PASS □ FAIL |
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Frequently Asked Questions
How do I decide the correct ILIM value without over-stressing the source?
Start from the source and connector current limits, calculate the worst-case inrush using C_load × dV/dt, and choose ILIM above the working inrush but still below upstream limits. Margin is important—too low causes nuisance trips, too high overheats copper or damages the connector during repeated plug-in.
When should I move from an eFuse to a full Hot-Swap controller?
If the thermal margin from I²R loss is below about 15–20 °C, or if short-circuit pulses get close to the SOA boundary, a Hot-Swap controller with an external FET is safer. It handles higher stress levels, offers more SOA headroom, and usually provides better layout freedom for thermal spreading.
What parameters define a safe dv/dt ramp during power-up?
The dv/dt must allow capacitive inrush without browning-out the upstream rail. Check I_inrush ≈ C_load × dV/dt, and compare it against connector and supply limits. A slightly slower ramp enhances system stability and helps avoid false fault flags on sensitive downstream loads during plug-in events.
How do I separate benign inrush from a true short using Fast and Slow trip windows?
Fast trips handle microsecond-scale short circuits within copper SOA, while slow foldback allows millisecond capacitive surges to pass. Define thresholds using waveform tests and tolerance to upstream sag. The goal is passing legitimate start-up while quickly cutting off real faults with minimal thermal stress.
What telemetry fields are essential when cloud monitoring is required?
At minimum, STATUS{SC,OV,OT,REV,RETRY,LATCH}, ILIM_SET, I_SENSE, VIN, VOUT, TEMP, and EVENT_LOG are required. These support field recovery, traceability, and post-mortem validation. A part without this set will break analytics, so omission in BOM usually disqualifies non-telemetry devices for production use.
How do I choose between latch and auto-retry fault handling modes?
Latch mode fits safety-critical systems since the load remains off until human or firmware clearance. Auto-retry helps recover from transient faults but requires limits for retry count and duty cycle. Excessive retries can hammer the source or hide real faults, so thermal and sag monitoring must be added.
Why is a Schottky OR-ing diode prohibited next to an eFuse?
Diodes cause significant drop and heat, break priority control, and prevent coherent telemetry across rails. An ideal-diode controller maintains low loss and precise priority window control. Mixing Schottky with eFuse often causes reverse leakage issues and inconsistent current measurements that mislead cloud analysis.
When do I need to validate reverse blocking performance?
Any dual-source or OR-ing application requires measured leakage and cutoff behavior when VOUT exceeds VIN. Test across temperature and voltage deltas to confirm back-feed stays below BOM limits. Lack of validation may lead to unnoticed hiccups or uncontrolled current paths during supply transitions.
What test data should be collected during validation?
Capture waveforms for Vin, Vout, I_inrush, I_load, PG and FAULT. Log t_trip_fast, dv/dt, I_rev_leak, ΔT, and EVENT_LOG codes. Correlating these with input voltage and retry counts helps detect hidden problems like upstream sag, timing race conditions or premature device aging.
How do I guarantee correct cross-brand substitution?
Match ILIM range, dv/dt control, Fast/Slow trip windows, reverse blocking specs, Rds(on), θJA and the full telemetry set. Validate register mapping in the cloud and re-run test scripts. Parity in datasheets alone is not enough—waveform results and EVENT_LOG consistency must align before release.
Why is thermal copper and Kelvin sensing critical for reliability?
Without thermal spreading and accurate measurement points, parameters can look correct on paper while the board overheats or misreads current. Kelvin connections and solid copper under the device ensure safe ΔT, stable dv/dt, accurate telemetry, and better correlation between cloud analytics and real hardware behavior.
What checklist should be completed before issuing a release?
Confirm no Schottky OR-ing, validated ILIM and trip behavior, verified reverse blocking, PG/FAULT logging, repeatable hot-plug tests and cloud mapping updates. Even if parameters meet datasheet limits, failure in any checklist item can cause unpredictable field issues or break traceability in post-deployment diagnostics.
