Gate Driver ICs with Current & Temperature Sensing

Q: Telemetry looks noisy only during switching—first suspect sampling window or common-mode injection?

Likely cause: samples taken inside dv/dt edge noise region, or CM spike couples into the sense reference. Quick check: correlate noise bursts to PWM edges; shift sample window +200 ns and compare RMS (same load, same phase). Fix: enforce blanking + windowing; tighten Kelvin reference; add small RC at sense input (keep fc above control needs). Pass criteria: window offset ≥ 200 ns from edges; edge-correlated artifact ≤ 2%FS; invalid-window flagged = 100%; false trips = 0 in 10⁶ edges.

Q: DESAT trips at high dv/dt but not at low—blanking/filter or layout return path?

Likely cause: dv/dt injection into DESAT sense path, insufficient blanking/filter, or return/reference path mismatch. Quick check: record trip phase vs switching edge; increase blanking by +200–500 ns and see if trips disappear without delaying real faults. Fix: tune blanking/filter; reduce DESAT loop area; keep clamp/diode return tied to the correct power reference (no cross-split return). Pass criteria: dv/dt stress at target (e.g., 50–100 kV/µs) yields false DESAT = 0 in 10⁶ edges; real fault detect time penalty ≤ 10% vs baseline.

Q: Foldback oscillates near threshold—thermal time constant mismatch or control loop gain?

Likely cause: foldback loop reacts faster than the thermal plant, or hysteresis/dwell is too small causing limit “chatter”. Quick check: log temperature and foldback state; count toggles near Tstart and measure oscillation period (seconds-scale indicates thermal loop issue). Fix: add hysteresis + dwell; rate-limit limit changes; split into two-stage foldback (gentle then hard limit). Pass criteria: hysteresis ≥ 5 °C; dwell ≥ 200 ms; foldback toggles ≤ 1 per 10 s; limit slew ≤ 10%/s near threshold.

Q: Current readback differs by ~20% between phases—Kelvin routing or per-phase calibration missing?

Likely cause: non-Kelvin sense pickup, unequal shunt parasitics, or missing per-phase offset/gain calibration. Quick check: apply identical DC load; compare zero-current offset and gain per phase; swap sense-pair routing (if possible) to see if error follows routing. Fix: enforce true 4-terminal Kelvin; match RC filters per phase; perform per-phase zero-offset + gain calibration and store coefficients. Pass criteria: phase-to-phase gain mismatch ≤ 2%; phase-to-phase current error ≤ 5% at rated load; zero-offset ≤ 1%FS; drift alarm if > 1%FS.

Q: Analog telemetry crosses isolation but fails EMC—switch to digital stream or add filtering/guard?

Likely cause: analog telemetry bandwidth exposes CM noise; barrier supply ripple shifts the analog reference; poor shielding/guarding on the analog line. Quick check: check telemetry noise vs isolation supply ripple and vs switching edges; compare with a low-pass (e.g., 10–50 kHz) and re-test EMC. Fix: limit analog bandwidth + guard routing; or migrate to digital telemetry with CRC/validity and deterministic update framing. Pass criteria: EMC pass with telemetry enabled; analog noise ≤ 5 mV_rms (or ≤ 2%FS); digital CRC error = 0 in 10⁸ bits; field telemetry dropouts ≤ 1/hour.

Q: Short-circuit protection meets time but the device still dies—energy clamp path or soft turn-off too slow?

Likely cause: reaction time is acceptable, but SC energy (I·V·t) exceeds device limit due to overshoot, poor clamp path, or overly gentle soft turn-off. Quick check: capture VDS/VCE overshoot and current during SC; compute E_sc over the event window; compare to datasheet E_sc limit margin. Fix: shorten clamp loop and improve return; adjust soft turn-off current/slope; add/retune external clamp/snubber where required. Pass criteria: E_sc ≤ 70% of device rating; V overshoot ≤ 120% of DC bus (or per spec); no secondary ringing beyond 10% for > 200 ns; repeated SC survives N events.

Q: Telemetry is stable on the bench but drifts in the field—offset drift, CM coupling, or reference shift?

Likely cause: temperature-driven offset/gain drift, ground/reference movement under load, or CM coupling that is absent in bench wiring. Quick check: run a zero-current capture at startup and periodically; track offset vs temperature; flag drift events when switching state changes. Fix: add startup + periodic re-zero; tighten reference partitioning; add drift diagnostics (offset/gain plausibility + rail_hit counters). Pass criteria: offset drift ≤ 0.5%FS over operating range; gain drift ≤ 1%FS; re-zero interval ≤ 24 h (or per use case); drift alarms trigger within 1 s of exceedance.

Q: Fault pin asserts immediately but telemetry frames arrive late—priority policy or firmware/bus bottleneck?

Likely cause: /FLT is hardware-priority but telemetry is queued behind bus/ISR load; timestamping happens after buffering. Quick check: measure /FLT edge to MCU log timestamp; compare under idle vs max CPU load; count dropped/late frames. Fix: treat /FLT as the acceptance signal; move timestamping to ISR edge; reserve bandwidth for fault frames; rate-limit non-critical telemetry. Pass criteria: /FLT edge-to-log ≤ 500 µs (or ≤ 1 frame); telemetry fault frame latency ≤ 2 frames; dropped frames = 0 in 10⁶ frames under worst load.

Q: Current telemetry saturates during transients—bandwidth too low, filter too heavy, or ADC clipping?

Likely cause: input filter corner too low for the event, amplifier/ADC headroom insufficient, or CM range exceeded during fast edges. Quick check: inspect rail_hit/saturation flags; step-load test and compare peak error vs filter fc; verify CM range at switching edges. Fix: raise fc for event capture; increase headroom or reduce gain; add event-only path (fast comparator) separate from average telemetry. Pass criteria: saturation_count = 0 in defined operating envelope; peak error ≤ 5% for specified step; fc ≥ 5× control bandwidth; CM range margin ≥ 20% at dv/dt target.

Q: DESAT logs “short circuit” but scope suggests overload—threshold definition or inference logic wrong?

Likely cause: threshold/blanking definitions do not match the acceptance contract, or classification relies on incomplete fields. Quick check: compare log fields (threshold, blanking, decision time) against scope markers; validate classification across a controlled overload sweep. Fix: lock definitions (t_detect start/end) and log them; adjust inference rules to include state (PWM phase, dv/dt window, saturation flags). Pass criteria: classification accuracy ≥ 95% over N controlled tests; decision timestamp error ≤ 100 ns vs scope marker; required log fields present = 100%.

← Back to: Gate Driver ICs

A current/temperature-sensing gate driver turns protection into a measurable loop: it captures current and thermal evidence fast enough to trigger safe turn-off or foldback, while exporting telemetry that controllers can trust for diagnostics and derating decisions.

The goal is not “more data,” but valid data in the right window—with defined latency, accuracy, and pass/fail criteria under high dv/dt conditions.

H2-01. Positioning & Scope: What “Current/Temp Sensing Driver” Really Means

A Current/Temp Sensing Gate Driver is a gate driver that turns current and temperature into actionable telemetry (events + measurements) to enable faster protection loops and stable derating (foldback).

The focus is not “more protection features,” but how sensing, reporting, and timing make current/temperature usable for verification, debugging, and closed-loop control under high dv/dt conditions.

In scopeCovered to “use-in-design” depth

Telemetry types: fault events vs continuous measurements and how each is consumed.
Sensing paths: shunt-based current and DESAT-derived signals (as telemetry inputs).
Thermal foldback: stable derating templates and anti-oscillation guardrails.
Isolation & integrity: high dv/dt injection, CMTI constraints, and data trust.
Verification lens: what must be logged and what must be proven on the bench.

Not in scopeOnly referenced as dependencies

DESAT mechanism theory (device physics / detailed comparator design).
Active Miller clamp theory and sizing rules as a standalone topic.
Deadtime/interlock design as a standalone switching-control topic.
Bootstrap sizing math and diode recovery deep-dive.
Full layout cookbook beyond the minimum rules needed for sensing integrity.

When it is neededThree hard triggers

Protection must be explainable: faults require timestamps/reasons and measurable severity (not just a shutdown).
Short-circuit energy window is tight: hardware-level sensing/reporting is required before software can react.
Derating must be stable: foldback is preferred over abrupt OTP to avoid thermal cycling and control oscillation.

System boundary: PWM/MCU → sensing gate driver → power stage, with telemetry returning as fault events and measurements.

H2-02. Telemetry Loops: Protection Loop vs Control Observability

Telemetry must be treated as two different loops with different time scales, windows, and filters: a Protection Loop (ns–µs) and an Observability Loop (µs–ms).

Protection loopns–µs, hardware-critical

Goal: move the switch into a safe state before damage energy accumulates.
Inputs: DESAT/over-current events, fast comparators, UVLO/OTP triggers.
Outputs: hard turn-off or controlled (soft) turn-off + fault assertion.
Key KPI: detection + propagation + shutdown latency, with low false-trip rate.

Observability loopµs–ms, control + reliability

Goal: provide trustworthy I/T data for derating, diagnostics, and performance tuning.
Inputs: shunt-derived current, temperature sensors, sampled/filtered telemetry frames.
Outputs: foldback decisions (limit current, adjust frequency, reduce power) + logs.
Key KPI: data integrity (windowing, filtering, calibration) without control oscillation.

Why separation matters A slow averaged current number cannot protect a switch, and a fast fault event cannot support stable derating. Each loop must use the right channel (event vs measurement), the right sampling window, and the right filter.

Driver hardware responsibilities

µs-class response safety-first

Windowing: blanking around switching edges so injected dv/dt does not become a false decision.
Decision: fast detect/compare and deterministic propagation to the gate output stage.
Action: safe shutdown behavior (hard or soft) and unambiguous fault reporting.
Outcome if wrong: device stress (too slow) or nuisance trips (too sensitive).

Controller software responsibilities

ms-class stability diagnostics + derating

Synchronization: sample I/T in windows that avoid dv/dt injection and aliasing.
Filtering: choose averaging/decimation consistent with thermal and power-stage time constants.
Foldback: implement stable derating curves with hysteresis and rate limits.
Outcome if wrong: foldback oscillation, misleading logs, and unpredictable performance.

Two-loop model: protection decisions are µs-class and event-driven; observability supports stable derating and trusted logs on longer windows.

H2-03. Current Sensing Building Blocks Inside/Next to the Driver

Current sensing around a gate driver should be classified by where the signal comes from and what loop it serves: fast event protection versus continuous observability.

The goal is to select a sensing building block that produces usable telemetry under high dv/dt: it must be measurable in the required time window, survive common-mode injection, and exit through a channel that the system can consume.

DESAT-based Primary loop: Protection

What it measures

An event proxy of abnormal switch behavior (saturation/short-like condition), not a calibrated current number.

Best for

Short-circuit/overstress protection, fast shutdown decisions, and fault classification logs.

Key limits

Sensitive to blanking/filter choices that trade delay vs false trips.
Can be distorted by dv/dt injection and clamp path parasitics.
Provides limited observability unless paired with event capture (timestamp + action).

Typical mistakes

Treating DESAT as a “current meter.”
Over-filtering to remove noise and unintentionally increasing damage energy.
Logging only “fault happened” without the configuration profile and timing context.

Shunt-based Primary loop: Observability

What it measures

A continuous quantity derived from shunt voltage (Kelvin sense → conditioning → ADC/stream).

Best for

Power limiting, derating control, efficiency tuning, and trustworthy operating logs.

Key limits

Requires windowing away from switching edges to avoid aliasing and injection.
Kelvin routing and return integrity dominate accuracy more than component “spec sheet” numbers.
Cross-isolation analog telemetry is EMC-sensitive; digital telemetry adds latency and bandwidth limits.

Typical mistakes

Using a heavily averaged current number as a fast protection decision input.
Ignoring Kelvin constraints and then “fixing” noise with excessive filtering.
Sampling during dv/dt transitions and blaming the sensor for “random jitter.”

Other proxies Primary loop: Depends

What it measures

A proxy correlated with current (e.g., sense-FET ratio, CT/Hall output), often requiring calibration and drift modeling.

Best for

When shunt loss is unacceptable, isolation constraints dominate, or galvanic sensing is preferred.

Key limits

Bandwidth/linearity/offset drift may limit closed-loop use without compensation.
Magnetic coupling and placement can introduce non-obvious error modes.
Often becomes a separate sensing topic; this page keeps only the applicability boundary.

Typical mistakes

Assuming proxy output is “absolute current” without temperature compensation.
Closing a fast protection loop on a sensor with ms-class response time.
Skipping plausibility checks (saturation, open/short diagnostics).

Output consumption Fault is fastest and unambiguous for protection decisions; Analog telemetry provides continuous observability but is EMC-sensitive across isolation; Digital telemetry supports timestamping and integrity checks but introduces protocol latency and bandwidth limits.

Three sensing families converge to the same output channels; the difference is signal chain conditions, timing windowing, and data trust.

H2-04. DESAT Telemetry Path: Blanking, Filtering, and Inference

The DESAT path becomes usable telemetry only when blanking, filtering, and thresholding are treated as timing and integrity knobs—not just “noise fixes.”

This section treats DESAT as an event channel: it reports abnormal behavior with deterministic timing, then drives shutdown behavior and produces an event record for higher-level policy (latch, retry, derate).

Blankingedge immunity vs delay

Controls: minimum time before a decision is allowed.
Trade-off: too short → false trips; too long → extra stress energy.
Fast check: faults concentrated near switching edges indicate insufficient blanking or injection.
Guardrail: keep blanking deterministic and record the active profile in logs.

Filterfalse trip rate vs latency

Controls: deglitch/qualification of the DESAT comparator output.
Trade-off: stronger filtering → fewer nuisances but longer detection time.
Fast check: random faults that disappear with filtering often indicate dv/dt injection.
Guardrail: filtering must not exceed the allowed protection energy window (X µs).

Thresholdclassification boundary

Controls: what qualifies as abnormal behavior vs heavy load.
Trade-off: too low → nuisance; too high → late detection.
Fast check: threshold sensitivity to temperature or device swap indicates margin is tight.
Guardrail: tie threshold to a validated test fixture and record the setting ID.

Soft turn-offstress vs overshoot

Controls: shutdown slew and energy distribution during fault turn-off.
Trade-off: too fast → overshoot/EMI; too slow → excessive dissipation.
Fast check: overshoot/ringing changes with soft-off strength indicate a layout/parasitic interaction.
Guardrail: prefer safe device state first; then tune emissions after survival is proven.

What can be inferredevent classification lens

Short-like event

fast + repeatable

Triggers quickly and consistently under the same conditions; correlates strongly with bus voltage and commanded switching state.

Overload-like event

slower + thermal

Appears later in the cycle and often correlates with temperature rise, duty increase, or extended conduction stress.

Injection-like event

edge-correlated

Clusters near switching edges and improves dramatically with blanking/filter adjustments or return-path/layout corrections.

Policy actionsuse events to drive system behavior

Latch: lock out switching until reset when the event indicates severe stress or repeated trips.
Auto-retry: controlled re-enable with cooldown and retry counter to prevent oscillatory fault cycling.
Derate mode: enter foldback after non-catastrophic events, with exit conditions and hysteresis.

What to logfield template (placeholders)

timestamp: X (time base definition)
leg/phase ID: Y (bridge/phase identifier)
event type: DESAT
profile ID: blanking/filter/threshold setting set (ID only, not raw numbers)
action taken: soft-off / hard-off / latch / retry / derate
retry count & cooldown: N / X ms
snapshot: last known I/T telemetry buckets (optional)

DESAT becomes usable telemetry when configuration (blanking/filter/threshold) and the event record are treated as first-class design objects.

H2-05. Shunt Telemetry: Placement, Common-Mode, Bandwidth, and Kelvin Rules

A shunt produces usable telemetry only when placement, common-mode immunity, Kelvin routing, and bandwidth/windowing are treated as a single signal-chain contract.

The target is not “a current waveform,” but a current number that remains trustworthy under dv/dt and switching ripple, and exits through a channel that the control and logging layers can consume.

Placement decision tree 3 steps to select high-side/low-side/per-phase

Step 1 — High-side or low-side?

common-modedv/dt injection

High-side fits when phase/leg current must be referenced to the bus side and bi-directional behavior must remain unambiguous.
Low-side fits when ground-referenced measurement is acceptable and the design can control ground bounce and shared return coupling.
Guardrail: if the shunt nodes see large dv/dt or wide common-mode swings, choose a sensing path that tolerates the required common-mode range.

Step 2 — Total current or per-phase?

balancingthermal spread

Per-phase supports current sharing and early detection of a drifting leg.
Total supports coarse power limiting and simplified logging.
Guardrail: if policy actions differ by phase/leg, per-phase telemetry is required to avoid false attribution.

Step 3 — Output channel (fault/analog/digital)

EMClatency

Analog telemetry provides continuous observability but is more sensitive across isolation and noisy returns.
Digital telemetry supports integrity checks and timestamping but introduces update-rate and latency constraints.
Guardrail: select the channel that matches the intended loop (ms-class observability vs µs-class events).

Bandwidth budgeting choose what to measure, then back-solve the minimum bandwidth and windowing

Averagefoldback / power limit

Requirement: stable and repeatable after switching ripple is rejected.
Risk: ripple folding/aliasing pollutes the average if sampled on edges.
Guardrail: sample in quiet windows and average over controlled intervals.
Min bandwidth: BW ≥ X kHz (system-defined).

Peaksharing / limit peaks

Requirement: capture fast changes without saturating the front-end.
Risk: high bandwidth increases sensitivity to dv/dt injection and return coupling.
Guardrail: keep Kelvin loop short and filter at the sense pins, not on long traces.
Min bandwidth: BW ≥ Y MHz (system-defined).

Eventthreshold / alert

Requirement: deterministic decision timing and low false-trip rate.
Risk: noise bursts and edge coupling appear as “instant overcurrent.”
Guardrail: use windowing/qualification around switching transitions.
Latency: decision ≤ N µs (system-defined).

Bi-directional current regen / synchronous rectification introduces sign and near-zero pitfalls

Sign convention

must be explicit

Define positive direction per leg/phase and keep it consistent across telemetry, control, and logs; otherwise derating and fault attribution become ambiguous.

Zero drift

offset + temp

Offset drift and injected common-mode transients can move the zero point, corrupting average current and triggering false foldback near light load.

Near-zero behavior

deadtime + SR

Around current zero-crossing, deadtime and synchronous rectification transitions can create apparent spikes; sampling must avoid these transition windows.

Draw the measurement loop (Kelvin) separately from the power return, and keep RC conditioning near the driver sense pins to reduce dv/dt injection.

H2-06. Temperature Sensing & Thermal Foldback: Strategy, Not Just OTP

Temperature is a slow telemetry channel (ms–s) that enables stable derating. Foldback must be treated as a policy with guardrails, not a single over-temperature shutdown threshold.

The objective is predictable operation: when temperature rises, the system enters a controlled derating region, avoids oscillation, and escalates to a hard shutdown only at the defined safety limit.

Temperature sources usefulness depends on what temperature the sensor represents

On-diedriver IC

Represents: driver die temperature (proxy, not switch junction).
Best for: protecting the driver and detecting local heating trends.
Error sources: thermal path mismatch to power device, airflow dependence.
Typical mistake: treating it as junction temperature of the switch.

External NTCboard / case

Represents: board/case temperature near the power device.
Best for: stable foldback decisions and system-level thermal control.
Error sources: placement offset, thermal grease/interface variability.
Typical mistake: placing it in a cool zone and assuming it protects the hotspot.

Dioderemote probe

Represents: temperature near the diode junction location.
Best for: remote sensing when NTC routing is constrained.
Error sources: bias current accuracy, wiring resistance, noise coupling.
Typical mistake: skipping calibration and then trusting absolute numbers.

Estimated Tjmodel-based

Represents: estimated junction temperature based on power and thermal model.
Best for: predictive derating when direct sensing is insufficient.
Error sources: model mismatch, aging, airflow and mounting changes.
Typical mistake: using a fixed model without periodic plausibility checks.

OTP vs Foldback vs Telemetryengineering consequences

OTPhard stop

Strength: simple and deterministic.
Risk: repeated trips create thermal cycling and user-visible interruptions.
Acceptance: Thard = X °C, restart = Y °C.

Foldbackcontrolled derating

Strength: continuous control and extended operating time.
Risk: can oscillate without hysteresis and rate limiting.
Acceptance: stable under ΔP/Δt (no hunting), placeholders X/Y/N.

Telemetryobservability

Strength: enables logging, tuning, and predictive maintenance.
Risk: untrusted data triggers wrong derating decisions.
Acceptance: noise/drift within N over Y minutes.

Foldback knobschoose the controlled variable and add stability guardrails

Current limit: Ilimit(T) to reduce conduction and switching stress while preserving control continuity.
Frequency reduction: fs(T) to lower switching losses and reduce heating rate.
Timing adjustment: controlled deadtime or switching schedule changes to reduce loss hot spots (policy-level knob).
Two-stage strategy: strong derating near Tlimit, then hard stop at Thard.

Anti-oscillation guardrails add hysteresis, rate limiting, and minimum dwell time so foldback does not hunt around a threshold.

A foldback curve defines where derating starts (Tstart), becomes strong (Tlimit), and escalates to hard shutdown (Thard). Use hysteresis and rate limits to prevent thermal hunting.

H2-07. Isolation & Data Integrity for Telemetry Under High dv/dt

Under isolation, telemetry often fails as plausible-looking but wrong data. Data integrity requires correct reference, correct timing, and a provable integrity contract.

This section treats isolation as a data-integrity boundary, not an isolation-technology tutorial. The focus is how common-mode transients and isolated bias noise can create offsets and spikes that masquerade as real current/temperature.

Pass criteriatelemetry is valid only when all are true

Reference correctness: the telemetry value is defined against the intended ground/domain (Primary vs Secondary).
Timing correctness: samples are taken in valid windows (not during dv/dt noise zones).
Integrity correctness: the transfer path supports checks (CRC/sequence) or deterministic plausibility monitoring (X/Y/N).

CMTI injectionhow dv/dt turns into fake telemetry

Injection path

barrier capacitance

High dv/dt at the switching node couples through parasitic capacitance across the barrier and disturbs the measurement reference, shifting the apparent current/temperature.

Observable symptoms

edge-correlated

Current/temperature spikes align with PWM edges.
Offsets jump when the isolated bias load or switching frequency changes.
Fault handling order is inconsistent (telemetry “normal” arrives before the fault indication).

Minimal guardrails

reference + window

Keep domain references explicit (Primary GND vs Secondary PGND).
Use sampling blanking windows to avoid edge noise zones.
Treat isolated bias noise as a telemetry offset driver; decouple and partition accordingly.

Analog vs Digitalacross isolation (no tables)

Analogcontinuous, low-latency

Strength: continuous observability with minimal protocol overhead.
Risk: reference drift and isolated-bias noise appear as amplitude/offset errors.
Risk: dv/dt injection can create edge-correlated spikes that look like real signals.
Best for: slow-to-medium observability loops (µs–ms) with strict windowing.
Acceptance: offset drift ≤ X, edge spike ≤ Y (placeholders).

Digitalcheckable, timestampable

Strength: supports CRC/sequence checks and timestamp tagging.
Risk: update period and frame latency can miss the intended control window.
Risk: valid frames can still be “wrong-window” if timestamp/state context is absent.
Best for: logs, health monitoring, derating policy (ms-scale).
Acceptance: period = X, latency/jitter ≤ Y, drop rate ≤ N (placeholders).

Noise injection checklist5 fast checks to detect fake telemetry

1) Edge-correlated spikes

CMTI signature

Quick check: move the sampling point away from edges (or extend blanking) and observe spike reduction.
Fix direction: tighten reference partitioning and reduce coupling into the sense path.
Pass: spike amplitude ≤ X and edge correlation ≤ Y.

2) Offset jumps with isolated bias changes

bias-to-offset

Quick check: change isolated-bias load/switching condition and track telemetry offset movement.
Fix direction: improve secondary decoupling and keep analog references local and quiet.
Pass: offset drift ≤ X over Y minutes.

3) Telemetry “stable” but violates physics trend

false stability

Quick check: compare current/temperature trends with expected power and heating behavior (plausibility).
Fix direction: correct sign convention, reference domain, and sampling window definition.
Pass: trend consistency error ≤ X (placeholder).

4) Digital frames valid but late

timestamp needed

Quick check: log timestamp + PWM state and verify frames land in the intended window.
Fix direction: tighten update period, prioritize fault signaling, and include state context.
Pass: latency ≤ X and wrong-window rate ≤ Y.

5) Fault pin and telemetry disagree

precedence

Quick check: verify fault indication precedes any “normal” telemetry interpretation.
Fix direction: define channel priority and enforce deterministic fault-first handling.
Pass: fault precedence always true (X/Y/N definition).

Define domain references explicitly and treat telemetry paths across the barrier as integrity-critical channels under high dv/dt.

H2-08. Interfaces, Timing & Synchronization: Getting Measurements into the Right Window

Telemetry is meaningful only when it lands in the valid sampling window. Timing rules must define blanking, phase context, and fault precedence.

Timing rules here define measurement validity, not control theory. A valid record includes timestamp, phase/leg ID, PWM state context, and a deterministic update period/latency budget.

Timing ruleshard requirements for valid telemetry

1) MUST define blanking windows

edge noise

Samples inside edge-adjacent noise zones are invalid and must be flagged as out-of-window.

2) MUST timestamp every sample/frame

common time base

Use a defined time base (X) so late frames can be detected and discarded.

3) MUST tag phase/leg ID

multi-phase

Per-phase samples cannot be mixed without explicit alignment rules and identifiers (Y).

4) MUST record PWM state context

HS/LS/deadtime

State context disambiguates samples taken during on-time, off-time, deadtime, or tri-state conditions.

5) SHOULD sample in quiet windows

center-of-window

Prefer mid-interval sampling within the valid window to minimize coupling sensitivity.

6) SHOULD enforce fault precedence

fault-first

Fault indication must be handled before interpreting any “normal” telemetry values.

7) MUST define update period and latency/jitter

budget

Specify update period (X) and worst-case latency/jitter (Y) to prevent wrong-window usage.

8) SHOULD implement plausibility checks

physics limits

Reject impossible step changes beyond X/Y/N limits within one update interval.

Synchronizationinterleaving changes where the quiet window exists

Per-phase windowing: each phase is sampled in its own valid window; phase ID is mandatory.
Global windowing: a shared sampling instant may be used only if every phase is inside a valid window at that instant.
Aggregation guardrail: totals must not mix non-aligned samples unless an explicit alignment/resampling rule is defined.

Field templateminimal record for validity and forensics

timestamp

time base X

Timestamp on a defined clock domain; enables late-frame detection and alignment.

phase_id

Identifies leg/phase; prevents cross-phase mix-ups under interleaving.

state

HS/LS/DT

PWM state context: high-side on, low-side on, deadtime, tri-state, etc.

current

sign + unit

Includes sign convention and unit; near-zero behavior must be windowed and plausibility-checked.

temperature

source_id

Includes temperature source ID (on-die/NTC/model) so policy uses the correct thermal proxy.

fault_reason

enum

Fault reason code; fault pin precedence must be guaranteed over telemetry frames.

profile_id

versioned

Configuration snapshot ID (blanking/filter/foldback curve version) for reproducibility.

validity

in/out

Explicit flag: in-window vs out-of-window. Out-of-window values are not used for control decisions.

Treat samples inside noise zones as invalid; define sampling windows, timestamps, and update budgets so telemetry cannot be misused in the wrong window.

H2-09. Accuracy & Calibration: Offset/Gain/Drift and Self-Diagnostics

Telemetry becomes trustworthy only when errors are modeled, calibration is repeatable, and self-diagnostics can detect invalid measurements.

This section defines telemetry accuracy contracts and diagnostic criteria, not sensor-selection theory. The deliverable is a practical path from “readable values” to “defensible numbers” under switching stress.

TL;DRfour must-haves for trustworthy telemetry

Offset: stable zero-current reference with defined capture windows (X/Y/N).
Gain: proportionality remains valid across temperature and operating modes (X/Y/N).
Drift: long-term change is monitored and bounded with policy actions (X/Y/N).
Diagnostics: open/short/saturation/drift are detected and logged with fault reason codes.

Error budgetSource → Symptom → Quick check → Mitigation

Front-end & shunt physics (tolerance + self-heating)

offsettemp drift

Source: shunt tolerance/TCR, self-heating, contact resistance, incomplete Kelvin pickup.
Symptom: low-current bias, warm-up shift, per-phase mismatch.
Quick check: compare cold vs warm offset in a defined zero-current window; diff per phase/leg.
Mitigation: Kelvin rules, thermal-aware placement, temperature-binned coefficients (X/Y/N).

Common-mode coupling & dv/dt injection

edge-correlatedCMTI

Source: switching-node dv/dt coupling into sense loop; barrier capacitance and reference bounce.
Symptom: spikes aligned to PWM edges; offset jumps with switching mode changes.
Quick check: shift sampling away from edges (or extend blanking) and track spike reduction.
Mitigation: windowed sampling, local RC at sense pins, explicit domain references (X/Y/N).

Sampling window + quantization + saturation

validityrail-hit

Source: wrong-window sampling, ADC/reference range limits, late frames used as real-time values.
Symptom: clipping at rails, sudden zeros, valid frames with implausible steps.
Quick check: log rail-hit counters and validity flags; correlate errors with PWM edges and frame latency.
Mitigation: enforce validity flags, define period/latency budgets, treat saturation as invalid (X/Y/N).

Temperature chain mismatch + thermal lag

ms–sfoldback

Source: sensor not colocated with hotspot; thermal time constant delays response.
Symptom: temperature looks “fine” while stress rises; foldback arrives too late and overshoots.
Quick check: compare temperature slope against power-loss trend (plausibility, X/Y/N).
Mitigation: source ID, rate-limited derating, two-stage foldback with hysteresis (X/Y/N).

Calibration flowstep-by-step, repeatable, logged

Idle gating (define a true zero-current window)

valid windowstate

Precondition: PWM state indicates a quiet interval; validity flag must be in-window.
Action: capture samples for offset estimation (average + variance, X/Y/N).
Store: offset0 + confidence metrics + profile_id.
Pass: noise/variance below X and offset within Y.

Known-load point (lock gain to a controlled reference)

gaintemperature bin

Precondition: controlled load point is available (X A / Y duty / N ms, placeholder).
Action: capture calibrated point and compute/update gain (optionally temperature-binned).
Store: gain (or slope) with the same profile_id revisioning.
Pass: gain error ≤ X and repeatability ≤ Y across repeats.

Runtime trim (drift watch and safe micro-updates)

driftpolicy

Trigger: temperature crosses thresholds, mode changes, or drift rate exceeds X/Y/N.
Action: allow offset micro-update only inside validated zero/low-current windows.
Log: drift_rate, validity, and any applied derating action.
Pass: drift bounded within X over Y minutes; no policy oscillation.

Self-diagnosticsdetect invalid telemetry before it drives decisions

Open/short and sensor disconnect

fault reason

Detect stuck-at rails, abnormal noise, or non-responsive readings under controlled state changes; report as explicit reason codes (X/Y/N).

ADC saturation (rail-hit)

invalid

Treat repeated rail-hit events as invalid measurement windows; log rail-hit counters and prevent use in foldback decisions.

Drift monitoring in zero-current windows

Δoffset/Δt

Track offset drift rate only in validated windows; escalate actions when drift exceeds X/Y/N thresholds.

Plausibility checks (physics limits)

reject jumps

Reject impossible step changes for current/temperature within one update interval; log as plausibility violation (X/Y/N).

A defensible calibration loop captures offset in valid windows, anchors gain at a controlled load point, stores versioned coefficients, and continuously runs sanity checks.

H2-10. Design Hooks & Pitfalls: False Trips, Ringing, and Thermal Mismatch

Calibration makes telemetry accurate; hooks make telemetry stable under real switching stress. Each pitfall below is symptom-driven with a fast isolation step and a guardrail.

This section is symptom-driven for telemetry/protection loops, not a general layout tutorial. The goal is to eliminate false trips, ringing-driven jitter, saturation, and thermal-mismatch misclassification.

PitfallsSymptom / Likely cause / Fast isolation step / Fix & guardrail

DESAT false trips vs dv/dt injection

false trip

Symptom: short-circuit/overcurrent trips appear in normal switching, often edge-correlated.
Likely cause: dv/dt injection plus blanking/filter settings that admit edge noise.
Fast isolation step: extend blanking or shift decision window; verify trip-rate reduction.
Fix & guardrail: enforce windowed validity, tighten reference partitioning, set pass limits (X/Y/N).

Shunt telemetry jitter / noisy current

jitter

Symptom: current value jitters and causes derating oscillation or unstable control decisions.
Likely cause: incomplete Kelvin routing, RC placed far from sense pins, coupled return currents.
Fast isolation step: sample only in quiet windows; verify noise drops and edge-correlation disappears.
Fix & guardrail: Kelvin separation, local RC, validity flags; pass: jitter ≤ X.

Shunt / ADC saturation (rail-hit)

invalid

Symptom: current clips at rails, snaps to zero, or produces implausible steps.
Likely cause: front-end range too small or injection spikes exceed measurement headroom.
Fast isolation step: log rail-hit counters and correlate with edges and load steps.
Fix & guardrail: expand headroom, enforce rail-hit=invalid, keep sampling out of noise zones (X/Y/N).

Thermal foldback overshoot due to sensor lag

lag

Symptom: thermal protection reacts late; foldback overshoots before stabilizing.
Likely cause: thermal time constant + sensor not representing the hotspot + no rate limiting.
Fast isolation step: compare temperature slope vs power-loss trend; identify delayed response.
Fix & guardrail: two-stage foldback + hysteresis + minimum dwell time; pass: no hunting (X/Y/N).

Phase/arm thermal asymmetry causes wrong derating

mismatch

Symptom: one phase runs hotter, but total telemetry hides it; derating triggers too late or on the wrong phase.
Likely cause: missing phase context, uneven thermal paths, or sampling misalignment under interleaving.
Fast isolation step: inspect per-phase logs (phase_id + state) and compare trends.
Fix & guardrail: enforce phase tagging and aligned windows; pass: phase delta ≤ X.

Near-zero sign & drift breaks regen/SR decisions

zero-cross

Symptom: current direction flips near zero; light-load behavior triggers wrong foldback or misclassification.
Likely cause: zero drift plus wrong-window samples around deadtime transitions.
Fast isolation step: evaluate offset only in validated windows; check sign stability under steady conditions.
Fix & guardrail: re-zero in safe windows, add plausibility limits; pass: sign flips ≤ N.

Short Kelvin loops and local RC conditioning reduce dv/dt injection; keep power return paths separate from the measurement loop and enforce valid sampling windows.

H2-11. Validation & Production Test: How to Prove the Telemetry Loop Works

A telemetry loop is only “real” when it has a measurement contract, a repeatable stimulus, and pass/fail criteria that survive lab-to-lab and production sampling.

This section defines acceptance criteria for detection time, disable time, soft turn-off slope, and reporting latency, plus production shortcuts that do not require full-power rigs.

Measurement contractdefine where each timing measurement starts and ends

t_detect (detection time)

event → decision

Start: event reference (choose one and lock it): threshold crossing / comparator trip / injected step marker.
End: driver decision indicator: internal latch edge / fault pin transition / recorded status bit (X/Y/N).

t_disable (disable time)

decision → gate change

Start: decision indicator (same as t_detect end).
End: gate falls below a defined VG threshold (or dV/dt window), measured at the device gate (X/Y/N).

slew_off (soft turn-off slope)

controlled discharge

Window: a defined VG interval (or VDS/VCE interval) during soft turn-off (X/Y/N).
Pass form: slope must remain inside a band: [A,B] with no ringing beyond N%.

t_report (reporting latency)

fault → usable log

Start: /FLT transition (or status latch edge).
End: MCU timestamped record with fault_reason + phase_id + validity (X/Y/N).

Test matrixStimulus / Observe / Log / Pass criteria / Example BOM

Level 1 — Controlled overcurrent (low risk, validates the data path)

latencyvalidity

Stimulus: controlled load step or current command step with a known marker edge (X A / Y ms).
Observe: telemetry current response and validity flags away from dv/dt edges.
Log: timestamp, phase_id, pwm_state, current, validity, update_period, rail_hit.
Pass: t_report ≤ X; update period = Y ± Δ; no false trips in N cycles.
Example BOM: 4-terminal shunt WSK25125L000FTA; isolated shunt amp AMC3301DWER or isolated ΣΔ ADuM7703-8BRIZ.

Level 2 — Moderate fault event (validates detection + disable + soft turn-off)

t_detectt_disableslew_off

Stimulus: short pulse overcurrent or controlled clamp event (X A peak / Y µs).
Observe: decision edge, gate fall trajectory, and any soft turn-off behavior.
Log: fault_reason, decision timestamp, gate state snapshot, retry/lockout state.
Pass: t_detect ≤ X; t_disable ≤ Y; slew_off inside [A,B]; report within N frames.
Example DUT options: smart 3-phase driver with shunt amplifiers DRV8353 / DRV8323 / 6EDL7141.

Level 3 — Hard short (acceptance only; no methodology expansion)

worst-casepolicy

Stimulus: hard short condition defined by a standardized fixture and trigger marker (X/Y/N).
Observe: worst-case t_detect/t_disable across temperature and operating modes.
Log: lockout vs auto-retry decision, cooldown time, fault counters.
Pass: worst-case t_detect ≤ X; t_disable ≤ Y; policy matches N (lockout/retry limits).
Example isolated DUT: isolated driver with SPI diagnostics/monitoring UCC5880-Q1 (or UCC5881-Q1).

Data integrity under dv/dt (detect “looks real but is fake” telemetry)

edge-correlationCMTI margin

Stimulus: sweep switching edge rate or switching node dv/dt (X/Y/N settings).
Observe: correlation of current/temperature spikes to PWM edges and barrier events.
Log: validity flags, blanking state, saturation counters, and edge timestamps.
Pass: edge-correlated artifacts remain below X; invalid windows are flagged; no silent corruption.
Example BOM: isolated amp AMC3301-Q1 and/or isolated ΣΔ ADuM7703 with explicit validity gating.

Thermal foldback verification (prove stability, no hunting)

foldbackhysteresis

Stimulus: controlled temperature ramp (or controlled loss ramp) with known slope (X °C/min).
Observe: derating curve adherence and stability (no oscillation/hunting).
Log: temperature source_id, foldback state, commanded limits, dwell timers.
Pass: foldback follows template within X; no limit toggling more than N times per Y seconds.
Example BOM: NTC NCP15WF104F03RC (10 kΩ class) + a driver temperature monitor path (X/Y/N).

Log templateminimum fields for defensible validation

timestamp (time base X), phase_id/leg_id, pwm_state
current (with sign + unit), temperature (with source_id)
validity (in-window/out-of-window), update_period, latency_est
fault_reason (enum), fault_pin_snapshot, retry/lockout_state
rail_hit/saturation_count, profile_id (blanking/filter/foldback curve version)

Minimal validation kit BOMexample part numbers that make the loop testable

Telemetry-capable driver examples

DUT

DRV8353HRTAT (smart 3-phase gate driver with current shunt amplifiers)
DRV8323 / DRV8323R (smart 3-phase gate driver with current shunt amplifiers)
6EDL7141 (3-phase smart gate driver with SPI and current sense amplifiers)
UCC5880-Q1 (isolated SiC/IGBT gate driver with SPI-configurable diagnostics/monitoring)

Current / isolation sensing building blocks

telemetry

AMC3301DWER / AMC3301-Q1 (isolated shunt current sense amplifier family)
ADuM7703-8BRIZ (isolated ΣΔ ADC option for shunt monitoring)

Sense elements

shunttemp

WSK25125L000FTA (Vishay WSK2512 family example, 4-terminal low-ohm shunt)
NCP15WF104F03RC (Murata NTC thermistor example)

Note: part numbers above are examples to make the loop measurable; final choices depend on voltage domain, isolation class, and current range.

The setup ties stimulus (load/short fixture) to measurement (gate/SW/sense) and to logs (/FLT + telemetry frames) using a shared trigger and timestamp base.

H2-12. Selection Logic & Application Playbooks: Telemetry Without Cross-Over

Selection is a mapping from system requirements to telemetry contracts and then to spec priorities and architecture blocks.

This section provides rules and starting blocks only. It does not expand into application tutorials or switch-technology deep dives.

When it is mandatoryuse telemetry drivers when any trigger is true

Very small short-circuit energy window: requires proven t_detect/t_disable (X/Y/N).
Closed-loop thermal management: foldback must be stable and logged (no hunting).
Field diagnostics requirement: fault_reason + validity + phase context must be defensible.
Multi-phase or multi-bridge: per-phase tagging and skew control prevent “average hides the hotspot”.
High dv/dt environment: data integrity must be proven, not assumed.

RulesIf you care about X → prioritize Y

Short-circuit survivability

fast loop

Prioritize fault reaction time, configurable blanking/filter, and measurable t_detect/t_disable (X/Y/N). Example: UCC5880-Q1.

Control observability

continuous

Prioritize telemetry latency, update period, and validity flags. Examples: DRV8353, DRV8323, 6EDL7141.

Trustworthy numbers under dv/dt

integrity

Prioritize reference partitioning, CMTI margin, and a telemetry path that supports validation. Examples: isolated shunt amplifier AMC3301 or isolated ΣΔ ADuM7703.

Stable thermal derating

foldback

Prioritize temperature source clarity (on-die vs NTC), programmable foldback curve, hysteresis, and dwell timers (X/Y/N). Example NTC: NCP15WF104F03RC.

Multi-phase fairness

phase context

Prioritize per-phase current channels (or deterministic multiplexing), phase_id tagging, and consistent sampling windows. Shunt example: WSK25125L000FTA.

Pick this architecture when…three starting blocks, no cross-over

Block 1 — Smart non-isolated driver with integrated current sensing

SPICSA

Use when: same ground domain, continuous current observability is required.
Examples: DRV8353 / DRV8323, 6EDL7141.
Top metrics: latency, update period, validity flags, CSA gain options (X/Y/N).

Block 2 — Isolated driver with digital diagnostics + monitoring

isolationfast protection

Use when: high dv/dt domains, safety hooks, and measured reaction time matter most.
Examples: UCC5880-Q1 / UCC5881-Q1 (SPI-configurable diagnostics/monitoring).
Top metrics: reaction time, configuration granularity, monitoring coverage, reporting priority (X/Y/N).

Block 3 — Driver + external isolated current/temperature telemetry

modulardefensible

Use when: continuous telemetry must cross isolation with verifiable integrity.
Examples: AMC3301 (isolated amp) or ADuM7703 (isolated ΣΔ) + shunt WSK2512 + NTC NCP15WF104F03RC.
Top metrics: isolation class, bandwidth/latency, calibration hooks, validity flags (X/Y/N).

Playbooksstarting blocks only, no tutorials

Traction inverter / high dv/dt stacks

isolationfast SC

Goal: prove reaction time and enable defensible fault logs.
Combo: isolated diagnostic driver UCC5880-Q1 + isolated current telemetry AMC3301-Q1 (or ADuM7703).
Top metrics: t_detect/t_disable, reporting priority, integrity under dv/dt (X/Y/N).
Next links: [Traction inverter page] · [Isolated gate driver page]

PV/ESS inverter and DC-DC

thermaldiagnostics

Goal: stable foldback + health telemetry for maintenance decisions.
Combo: driver + external isolated sensing block (AMC3301 + WSK2512 shunt) + NTC NCP15WF104F03RC.
Top metrics: temperature source error, foldback stability, calibration hooks (X/Y/N).
Next links: [PV/ESS page] · [Accuracy & calibration section]

PFC + half/full bridge + LLC

latencyvalidity

Goal: align telemetry windows and keep “edge artifacts” out of decisions.
Combo: driver + modular telemetry (ADuM7703 or AMC3301) + strict validity gating.
Top metrics: update period/jitter, windowing rules, saturation handling (X/Y/N).
Next links: [PFC page] · [Interfaces & timing section]

POL / VR multiphase

multi-phaseCSA

Goal: per-phase observability and mismatch detection for thermal spreading.
Combo: integrated CSA smart driver DRV8353 / DRV8323 or 6EDL7141 + calibrated shunt WSK2512.
Top metrics: per-phase tagging, sampling alignment, drift watch (X/Y/N).
Next links: [Multiphase topology page] · [Design hooks section]

The tree starts from switch/topology, asks three telemetry questions, and maps to one of three architecture blocks with the key metrics that drive acceptance.

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H2-13. FAQs

These FAQs close only field troubleshooting and acceptance disputes for current/temperature telemetry drivers. No new theory is introduced.

Format rule: every answer has exactly 4 lines — Likely cause / Quick check / Fix / Pass criteria (numeric targets included).

Telemetry looks noisy only during switching—first suspect sampling window or common-mode injection?

Likely cause: samples taken inside dv/dt edge noise region, or CM spike couples into the sense reference.

Quick check: correlate noise bursts to PWM edges; shift sample window +200 ns and compare RMS (same load, same phase).

Fix: enforce blanking + windowing; tighten Kelvin reference; add small RC at sense input (keep fc above control needs).

Pass criteria: window offset ≥ 200 ns from edges; edge-correlated artifact ≤ 2%FS; invalid-window flagged = 100%; false trips = 0 in 10⁶ edges.

DESAT trips at high dv/dt but not at low—blanking/filter or layout return path?

Likely cause: dv/dt injection into DESAT sense path, insufficient blanking/filter, or return/reference path mismatch.

Quick check: record trip phase vs switching edge; increase blanking by +200–500 ns and see if trips disappear without delaying real faults.

Fix: tune blanking/filter; reduce DESAT loop area; keep clamp/diode return tied to the correct power reference (no cross-split return).

Pass criteria: dv/dt stress at target (e.g., 50–100 kV/µs) yields false DESAT = 0 in 10⁶ edges; real fault detect time penalty ≤ 10% vs baseline.

Foldback oscillates near threshold—thermal time constant mismatch or control loop gain?

Likely cause: foldback loop reacts faster than the thermal plant, or hysteresis/dwell is too small causing limit “chatter”.

Quick check: log temperature and foldback state; count toggles near Tstart and measure oscillation period (seconds-scale indicates thermal loop issue).

Fix: add hysteresis + dwell; rate-limit limit changes; split into two-stage foldback (gentle then hard limit).

Pass criteria: hysteresis ≥ 5 °C; dwell ≥ 200 ms; foldback toggles ≤ 1 per 10 s; limit slew ≤ 10%/s near threshold.

Current readback differs by ~20% between phases—Kelvin routing or per-phase calibration missing?

Likely cause: non-Kelvin sense pickup, unequal shunt parasitics, or missing per-phase offset/gain calibration.

Quick check: apply identical DC load; compare zero-current offset and gain per phase; swap sense-pair routing (if possible) to see if error follows routing.

Fix: enforce true 4-terminal Kelvin; match RC filters per phase; perform per-phase zero-offset + gain calibration and store coefficients.

Pass criteria: phase-to-phase gain mismatch ≤ 2%; phase-to-phase current error ≤ 5% at rated load; zero-offset ≤ 1%FS; drift alarm if > 1%FS.

Analog telemetry crosses isolation but fails EMC—switch to digital stream or add filtering/guard?

Likely cause: analog telemetry bandwidth exposes CM noise; barrier supply ripple shifts the analog reference; poor shielding/guarding on the analog line.

Quick check: check telemetry noise vs isolation supply ripple and vs switching edges; compare with a low-pass (e.g., 10–50 kHz) and re-test EMC.

Fix: limit analog bandwidth + guard routing; or migrate to digital telemetry with CRC/validity and deterministic update framing.

Pass criteria: EMC pass with telemetry enabled; analog noise ≤ 5 mV_rms (or ≤ 2%FS); digital CRC error = 0 in 10⁸ bits; field telemetry dropouts ≤ 1/hour.

Short-circuit protection meets time but the device still dies—energy clamp path or soft turn-off too slow?

Likely cause: reaction time is acceptable, but SC energy (I·V·t) exceeds device limit due to overshoot, poor clamp path, or overly gentle soft turn-off.

Quick check: capture VDS/VCE overshoot and current during SC; compute E_sc over the event window; compare to datasheet E_sc limit margin.

Fix: shorten clamp loop and improve return; adjust soft turn-off current/slope; add/retune external clamp/snubber where required.

Pass criteria: E_sc ≤ 70% of device rating; V overshoot ≤ 120% of DC bus (or per spec); no secondary ringing beyond 10% for > 200 ns; repeated SC survives N events.

Telemetry is stable on the bench but drifts in the field—offset drift, CM coupling, or reference shift?

Likely cause: temperature-driven offset/gain drift, ground/reference movement under load, or CM coupling that is absent in bench wiring.

Quick check: run a zero-current capture at startup and periodically; track offset vs temperature; flag drift events when switching state changes.

Fix: add startup + periodic re-zero; tighten reference partitioning; add drift diagnostics (offset/gain plausibility + rail_hit counters).

Pass criteria: offset drift ≤ 0.5%FS over operating range; gain drift ≤ 1%FS; re-zero interval ≤ 24 h (or per use case); drift alarms trigger within 1 s of exceedance.

Fault pin asserts immediately but telemetry frames arrive late—priority policy or firmware/bus bottleneck?

Likely cause: /FLT is hardware-priority but telemetry is queued behind bus/ISR load; timestamping happens after buffering.

Quick check: measure /FLT edge to MCU log timestamp; compare under idle vs max CPU load; count dropped/late frames.

Fix: treat /FLT as the acceptance signal; move timestamping to ISR edge; reserve bandwidth for fault frames; rate-limit non-critical telemetry.

Pass criteria: /FLT edge-to-log ≤ 500 µs (or ≤ 1 frame); telemetry fault frame latency ≤ 2 frames; dropped frames = 0 in 10⁶ frames under worst load.

Current telemetry saturates during transients—bandwidth too low, filter too heavy, or ADC clipping?

Likely cause: input filter corner too low for the event, amplifier/ADC headroom insufficient, or CM range exceeded during fast edges.

Quick check: inspect rail_hit/saturation flags; step-load test and compare peak error vs filter fc; verify CM range at switching edges.

Fix: raise fc for event capture; increase headroom or reduce gain; add event-only path (fast comparator) separate from average telemetry.

Pass criteria: saturation_count = 0 in defined operating envelope; peak error ≤ 5% for specified step; fc ≥ 5× control bandwidth; CM range margin ≥ 20% at dv/dt target.

DESAT logs “short circuit” but scope suggests overload—threshold definition or inference logic wrong?

Likely cause: threshold/blanking definitions do not match the acceptance contract, or classification relies on incomplete fields.

Quick check: compare log fields (threshold, blanking, decision time) against scope markers; validate classification across a controlled overload sweep.

Fix: lock definitions (t_detect start/end) and log them; adjust inference rules to include state (PWM phase, dv/dt window, saturation flags).

Pass criteria: classification accuracy ≥ 95% over N controlled tests; decision timestamp error ≤ 100 ns vs scope marker; required log fields present = 100%.

Temperature telemetry looks stable but junction still overheats—sensor placement or thermal lag not modeled?

Likely cause: sensor measures a slow/remote node (case/board), while junction rises faster; foldback trigger uses the wrong thermal model.

Quick check: apply a controlled loss step; compare sensor response time (τ) to expected junction dynamics; check for phase/arm thermal asymmetry.

Fix: use calibrated mapping (Tsource→Tj estimate); add dT/dt guard; couple foldback to worst-case phase/arm temperature, not average.

Pass criteria: Tj estimate error ≤ 10 °C at steady state; response lag τ characterized and used; foldback starts within 1 s of exceedance; no arm-to-arm bias > 5 °C unflagged.

Production test passes but customers see false trips—was dv/dt integrity missing from the acceptance matrix?

Likely cause: production test validates functional paths but omits dv/dt-correlated corruption and edge-window validity checks.

Quick check: run dv/dt sweep and count false trips per 10⁶ edges; verify invalid-window flags and edge-correlation metrics.

Fix: add a dv/dt integrity row to the test matrix; enforce windowing + validity; require saturation/rail_hit counters in the production report.

Pass criteria: false trips = 0 in 10⁶ edges at dv/dt target; invalid-window flagged = 100%; saturation_count = 0; EMC pass with telemetry enabled.

Gate Driver ICs with Current & Temperature Sensing

Gate Driver ICs with Current & Temperature Sensing

H2-01. Positioning & Scope: What “Current/Temp Sensing Driver” Really Means

H2-02. Telemetry Loops: Protection Loop vs Control Observability

H2-03. Current Sensing Building Blocks Inside/Next to the Driver

H2-04. DESAT Telemetry Path: Blanking, Filtering, and Inference

H2-05. Shunt Telemetry: Placement, Common-Mode, Bandwidth, and Kelvin Rules

H2-06. Temperature Sensing & Thermal Foldback: Strategy, Not Just OTP

H2-07. Isolation & Data Integrity for Telemetry Under High dv/dt

H2-08. Interfaces, Timing & Synchronization: Getting Measurements into the Right Window

H2-09. Accuracy & Calibration: Offset/Gain/Drift and Self-Diagnostics

H2-10. Design Hooks & Pitfalls: False Trips, Ringing, and Thermal Mismatch

H2-11. Validation & Production Test: How to Prove the Telemetry Loop Works

H2-12. Selection Logic & Application Playbooks: Telemetry Without Cross-Over

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