Gain is never “free” in an INA: as gain increases, usable bandwidth, deep settling, and overload/common-mode recovery often become the real limits.
The correct design target is not a single -3 dB number, but meeting a condition-bound settling/recovery window under the required amplitude, common-mode, load, and temperature/supply corners.
Center Thesis & Page Scope (What this page owns)
Thesis (1 sentence)
Gain is never “free”: higher INA gain trades bandwidth, settling time, and recovery behavior, so real dynamics must be verified in both small-signal and large-signal regimes under stated conditions.
What this page owns (hard scope)
Gain → loop behavior: how effective loop gain/phase margin trends with gain settings (as seen via peaking, phase lag, and time-domain ringing).
Small-signal dynamics: closed-loop bandwidth, flatness, and peaking, mapped to observable ringing/overshoot.
Settling-limited performance: time to settle to 0.1% / 0.01% (or tighter) after steps or MUX events.
Large-signal limits: full-power bandwidth, slew-rate limitation, and output swing constraints as they change with amplitude and gain.
Recovery behavior: overload recovery and common-mode step recovery (long tails, baseline shifts, slow return to linear operation).
Metric chain used across the page (read left → right)
Each spec is meaningful only with conditions stated (gain, common-mode point, output swing, load, temperature). Without conditions, bandwidth and settling claims are not comparable.
ADC interface, anti-alias filter topologies, and end-to-end settling/SNR budgeting across the signal chain → ADC Drive & Anti-Alias Filtering
Full application schematics (bridge/RTD/ECG/4–20 mA, etc.) → the relevant Application-Focused pages
Scope boundary: this page explains how gain changes bandwidth, settling, large-signal limits, and recovery. Load-stability tuning, ADC/AAF details, and full application schematics are linked out.
Bandwidth Metrics That Actually Matter (Small-signal vs Large-signal)
Key rule
“Bandwidth” must be matched to the failure mode being avoided. The -3 dB point describes small-signal amplitude roll-off, but it does not guarantee fast settling, low distortion at large amplitude, or quick recovery after overload or common-mode steps.
For each metric below, evaluation must state conditions: gain setting, common-mode point, output swing, load, and temperature.
1) Small-signal bandwidth (-3 dB) & peaking
Definition
The frequency where closed-loop small-signal gain drops by 3 dB, plus any magnitude peaking near the corner that indicates limited phase margin.
What it predicts
Peaking is a direct warning for step overshoot and ringing. Two INAs can share a similar -3 dB point yet show very different time-domain behavior due to peaking.
Common trap
Treating -3 dB as a settling guarantee. A flat response with low peaking often settles faster than a higher-BW response with ringing.
Quick test
Measure frequency response at the intended gain and common-mode point, then cross-check with a small step to see overshoot/ringing consistency.
When to prioritize
Dynamic signals where waveform shape matters and ringing must be minimized, especially at higher gain settings where peaking tends to shift.
2) Settling-based bandwidth (0.1% / 0.01% window)
Definition
The time needed for output to enter and remain within a specified error band after a step or switching event. The “bandwidth” is then the maximum event rate that still meets that settling window.
What it predicts
Whether sampling or control decisions can be made reliably within a time window. Slow tails cause “codes wander” even if -3 dB bandwidth looks adequate.
Common trap
Using a loose settling band (e.g., 1%) for a high-resolution system, then discovering the system fails at 0.01% due to ringing or recovery tails.
Quick test
Apply a known step (or emulate MUX switching) and measure time to 0.1% and 0.01% under the intended gain, common-mode, and output swing.
When to prioritize
Sampled systems, multiplexed measurements, and any design where a time window (not frequency response) sets correctness.
The highest frequency where a specified large output amplitude remains acceptably linear. Beyond this point, slew-rate or swing limits distort the waveform.
What it predicts
Distortion that appears only at real amplitudes: “small-signal looks fine” but large-signal shows triangularization, harmonic growth, and effective bandwidth collapse.
Common trap
Verifying only small-signal BW at a tiny output swing, then operating with large amplitude near rails where slew/swing limits dominate.
Quick test
Sweep a sine at the intended amplitude and common-mode point; monitor waveform shape and distortion as frequency increases.
When to prioritize
High dynamic range signals, fast transients, or any case where amplitude is large enough that slew and headroom set the real limit.
The time required for the output to return to correct differential behavior after a rapid change in input common-mode voltage.
What it predicts
Baseline shifts and long tails after switching events. CM recovery issues can masquerade as “bandwidth problems” when the true limiter is recovery.
Common trap
Testing only with steady common-mode, then deploying into a system with MUX switching, ground shifts, or CM transients that trigger slow recovery.
Quick test
Apply a controlled common-mode step while holding differential input constant; measure the differential output tail and time to return within the target band.
When to prioritize
Switching systems (MUX), noisy industrial environments, or any design where common-mode changes quickly relative to the settling window.
The -3 dB point describes small-signal roll-off; settling, full-power bandwidth, and CM-step recovery determine whether real systems meet time-window and distortion limits.
Where the Tradeoff Comes From in an INA (Loop gain & internal stages)
Core mechanism
The gain–bandwidth tradeoff is a loop-gain budget problem. As gain is increased (via Rg or a resistor network), the effective loop margin available for speed and stability is consumed earlier, so closed-loop bandwidth falls and peaking/phase lag can rise.
This page focuses on the loop-level reasons and observable outcomes. Load-cap stability tuning and ADC interface details are linked out as separate topics.
1) Gain setting changes the loop “seen” by internal stages
3-op-amp INA: Rg primarily changes the closed-loop gain and the effective noise-gain shape at internal nodes; the loop margin available for speed changes with gain.
2-op-amp INA: gain setting and source impedance interactions can alter the effective poles/zeros seen by the loop, making peaking more sensitive to conditions.
Observable outcome: at higher gain, the same device can show lower -3 dB bandwidth and stronger peaking even with an identical external load.
2) Dominant pole + compensation limit how fast the loop can close
Dominant pole provides a predictable roll-off so the loop remains stable across gain and process corners.
Compensation trades speed for phase margin; at higher closed-loop gain, the usable bandwidth typically compresses to preserve stability.
Observable outcome: bandwidth reduction is often accompanied by increased phase lag (group delay changes) near the corner.
3) Why peaking appears at certain gain settings
Category A — loop margin becomes tight
At some gains, the loop crosses where phase margin is lowest, so peaking rises and step ringing becomes visible.
Category B — conditions add extra poles
Source impedance, probing capacitance, protection RC, or wiring can introduce an extra pole that hurts margin most in a specific gain band.
Category C — near-rail headroom effects
Near-rail output swing or unfavorable common-mode points can make the response look “unstable” at large amplitude even if small-signal data looks fine.
Quick check (minimal)
Repeat the same small step test across multiple gains and note whether ringing frequency and decay change with gain.
Repeat with a different probe/shorter ground lead to rule out measurement-chain poles.
Repeat at a lower output swing and a centered common-mode point to separate headroom effects from true loop peaking.
A loop-level view explains the trend: gain setting reshapes noise gain and loop margin, while dominant-pole compensation trades speed for stability, causing bandwidth compression and possible peaking.
Small-Signal Response vs Gain (Flatness, peaking, group delay)
Trend summary (what typically changes with gain)
-3 dB corner usually shifts lower as gain increases (closed-loop bandwidth compresses).
Peaking can rise in certain gain bands when phase margin is tight, causing ringing even if the -3 dB point looks acceptable.
Group delay is often less flat near the corner at higher gain, which can reduce phase consistency for time-aligned or multi-channel systems.
Matching the metric to the failure mode is essential: a higher -3 dB bandwidth does not guarantee a clean step response or stable phase behavior.
Why peaking matters (measurable consequences)
Settling slows down
Peaking maps to overshoot and ringing, which extends the time to enter and stay within tight settling bands (0.1% / 0.01%).
Amplitude flatness degrades
A “bump” near the corner introduces frequency-dependent gain error, which can corrupt dynamic measurements even if average bandwidth meets a target.
Phase consistency worsens
Group delay ripple near the corner translates to phase mismatch, which is visible as timing misalignment in coherent sampling and multi-channel systems.
“Bandwidth looks fine but the waveform looks bad” — root-cause classifier
Case 1 — insufficient phase margin
Small-step response rings with a repeatable frequency.
Peaking and ringing trend with gain setting.
Next action: compare gains and focus on peaking + settling behavior.
Case 2 — measurement or load artifact
Ringing changes noticeably with probe, cable, or grounding.
Long ground leads or probe capacitance exaggerate “instability”.
Next action: shorten ground, change probe, repeat the same step.
Case 3 — headroom / near-rail behavior
Small-signal looks clean, but distortion/ringing appears at large swing.
Symptoms worsen near rails or at unfavorable common-mode points.
Next action: reduce swing and re-test; then sweep amplitude at fixed frequency.
Scope boundary
Detailed capacitive-load stabilization belongs to Output Drive, Load & Stability. This section classifies symptoms and connects gain-domain response to waveform behavior.
The same -3 dB bandwidth target can hide very different behavior: peaking predicts overshoot/ringing and correlates with poorer settling and less consistent phase near the corner.
Settling Time Is the Real Spec (0.1%, 0.01%, ppm-level)
Engineering definition (what “settling” means)
Settling time is the time required after a defined stimulus (typically a step of ΔV) for the output to enter a defined error band (±X% or ±X ppm) around the final value and remain inside that band for a defined hold interval.
Spec sentence template (copy-ready)
After a step of ΔV at the stated gain and common-mode, the output shall settle to within ±X (percent or ppm) of the final value and remain within band for ≥ Thold, with a measured settling time tsettle(X) ≤ Twindow.
Final value (how it is defined)
The final value should be defined consistently (e.g., a steady-state mean over a long window). Without a consistent final-value definition, two setups can report different “settling times” for the same waveform.
Why the same bandwidth can produce very different settling
A) Peaking & underdamped response
A higher -3 dB corner with more peaking can ring longer than a lower-bandwidth, well-damped response. Tight bands (0.01% / ppm) are often dominated by the last few rings.
B) Slow tails inside the band
The waveform can look “quiet” at 0.1% yet still drift slowly relative to a ppm-level band. At tight thresholds, the settling time becomes tail-limited rather than ringing-limited.
C) Recovery-related nonlinearity
Larger steps or switching events can push internal stages out of their most linear region. Returning to the linear region can add a recovery delay that small-signal bandwidth does not predict.
Practical consequence
A design that “meets bandwidth” can still fail the system if it cannot settle within the required error band before the sampling/decision window closes.
How to choose the settling band X (method, not ADC design)
Start from allowed dynamic error: define the maximum permissible transient error at the measurement output during the decision window.
Translate error to a band: express it as ±X% of final value or ±X ppm (absolute microvolts relative to the full-scale or target level).
Check measurability: if noise or measurement uncertainty is near X, define a repeatable rule (averaging window, repetitions, and final-value definition) so pass/fail is unambiguous.
Scope boundary
Detailed ADC sampling-window budgeting and anti-alias filter interactions belong to ADC Drive & Anti-Alias Filtering. This page provides the method to translate system tolerance into a settling band.
Tight settling bands (0.01% and ppm-level) often expose ringing tails and recovery effects that are invisible at 0.1%, shrinking the usable sampling/decision window.
Why large-signal performance can collapse even when small-signal looks fine
Slew-rate and output-swing limits create an amplitude-dependent bandwidth. A system can pass small-signal frequency tests yet fail in real operation when large steps or large sine amplitudes push the output into SR-limited or headroom-limited behavior.
Two reusable checks (fast diagnosis)
Fix frequency, sweep amplitude: if distortion or waveform “triangle” grows rapidly with amplitude, SR or headroom is the limiter.
Fix amplitude, sweep frequency: if the waveform becomes slope-limited beyond a frequency, SR is the limiter (full-power BW boundary).
Slew-rate (SR) limited region
At large amplitude, the required output slope increases with frequency. Once the required slope exceeds SR, the output can no longer follow a sine smoothly, producing triangularization and sharply rising harmonics. The “effective bandwidth” becomes amplitude-dependent (full-power behavior).
Observable symptoms
Waveform edges look slope-limited; sine becomes “pointy” or triangular.
Distortion rises fast with frequency at the same amplitude.
Large-step settling becomes dominated by slope limit rather than ringing.
Output swing / headroom limited region
Near-rail output operation or unfavorable common-mode points can degrade linearity and recovery. This often looks like “bandwidth got worse” or “THD suddenly got worse,” but the limiter is headroom, not small-signal bandwidth.
Observable symptoms
Small-signal tests pass, but large swing introduces flattening/clipping-like behavior.
Performance depends strongly on common-mode and supply headroom.
Define the operating envelope: target amplitude range and frequency range for the real signal.
Place the target point(s) on an amplitude–frequency plane and add guardband margin.
Check region: confirm the target points remain inside the small-signal linear region, away from SR-limited and swing-limited boundaries.
Map back to settling: if the target points cross into SR/swing-limited regions, settling time will degrade and must be re-verified using the H2-5 settling band.
Large-signal limits are amplitude-dependent. Use an amplitude–frequency view to keep real operating points away from SR and headroom boundaries, then verify settling using the required error band.
Bandwidth describes how fast a linear system responds. Recovery describes how fast the system returns to linear behavior after leaving it. In many real signals, overload recovery time is the limiter that decides whether the output re-enters the settling band before the sampling/decision window closes.
Common overload sources (what pushes an INA out of the linear region)
A) Differential overdrive (ΔVdiff too large)
Trigger: step/impulse exceeds the linear input/output range at the chosen gain.
Fingerprint: output clips or hits a plateau; recovery tail scales strongly with overdrive.
Risk: tsettle(tight bands) explodes even if small-signal settling looked excellent.
B) Common-mode step (ΔVcm fast transient)
Trigger: common-mode jump from switching, cable injection, ground bounce, or protection events.
Fingerprint: baseline shift, slow return, or temporary gain/linearity disturbance.
Risk: coherent sampling and tight-band settling fail even when -3 dB bandwidth is adequate.
C) Output saturation / internal limiting
Trigger: headroom shortfall (near rails), unfavorable common-mode point, or internal clamps engaging.
Fingerprint: rail-stick time + long tail after leaving saturation; recovery depends on dwell time.
Risk: looks like “bandwidth is bad,” but the true limiter is recovery back to linear behavior.
Recovery time as a verifiable specification
Recovery time should be specified using the same pass/fail structure as settling: define the overload event and require the output to return to the final value within ±X (percent or ppm) and remain inside band for ≥Thold, with trecovery(X) ≤ Twindow.
Condition fields that must be stated (to avoid ambiguous results)
Operating point
Gain, input common-mode, supply, output load
Overload event
ΔVdiff or ΔVcm, dwell time, repetition rate
Pass rule
Final value, ±X band, Thold, Twindow
Why high gain can recover more slowly
Higher gain can push internal nodes into limiting earlier, increasing the probability of saturation and extending recovery tails. A strong dependence on overdrive amplitude and dwell time is a classic recovery signature.
Quick diagnosis: bandwidth-limited vs recovery-limited
Test 1 — small step vs large step
If small steps settle quickly but large steps show rail-stick and long tails, the limiter is recovery rather than small-signal bandwidth.
Test 2 — sweep gain at fixed stimulus
If recovery tail grows strongly with gain while ringing frequency remains similar, the system is being pushed into limiting at higher gain.
Test 3 — sweep common-mode
If recovery behavior depends strongly on input common-mode, the issue is likely CM recovery/headroom rather than pure loop bandwidth.
The pass/fail endpoint remains the same: return to the required settling band before the usable window closes.
Overload creates a different system state. Recovery is verified by returning into the required settling band and staying there before the usable decision window closes.
Noise vs Bandwidth: When More Gain Helps, and When It Hurts
Noise is a bandwidth-integrated result
Input-referred noise density becomes output RMS noise after integrating over the effective bandwidth. Wider bandwidth generally increases integrated RMS noise, even if the noise density number looks unchanged.
Scope boundary
This section stays within the bandwidth-linked noise boundary. Deep DC accuracy topics (offset/drift budgeting) belong to the dedicated DC accuracy pages.
When more gain helps
Back-end noise dominates: gain lifts signal above the next-stage noise floor, improving effective resolution.
Bandwidth requirement is modest: gain-induced bandwidth compression does not violate the target dynamics and can reduce integrated noise.
Peaking is controlled: the response remains well-damped so tight-band settling is not degraded by ringing tails.
When more gain hurts
Target bandwidth is squeezed: dynamics fail because the effective bandwidth drops below the requirement.
Peaking reshapes noise: gain bands with peaking can amplify certain frequencies, making time-domain noise and ringing more visible.
Overload risk increases: higher gain reaches limiting earlier, so recovery tails can dominate the usable window.
Define the effective bandwidth (the measurement or control-relevant band), not just the datasheet -3 dB point.
Measure RMS noise using a consistent bandwidth rule (time-domain RMS with defined filtering or FFT integration).
Sweep gain and watch two outcomes: integrated RMS noise trend and any peaking-related bumps in the spectrum.
Close the loop with settling: confirm the required settling band and usable window still pass at the chosen gain.
Integrated noise is set by the effective bandwidth. Gain can improve effective resolution only if the required dynamics (bandwidth, settling, and recovery) still pass in the real operating window.
Practical Measurement: Test Setups and Datasheet Traps
Why “datasheet vs lab” mismatches happen
Dynamic results are highly condition-dependent. Probe capacitance, cable inductance, protection/filter networks, and source impedance can add poles/zeros and reshape phase margin, creating ringing or slow tails that look like “bandwidth is worse” even when the amplifier is fine under datasheet conditions.
Minimal lab chain for BW / settling (repeatable template)
A) Stimulus (source)
Step / sine with known source impedance and defined amplitude and bias (common-mode).
B) Step injection
Inject a controlled ΔV at a defined node (diff input or output) with a repeatable edge.
C) INA setup
Gain setting, input common-mode point, supply/headroom, and reference/pin modes aligned to the datasheet condition.
D) Load / ADC interface
RL and the true CL (including ADC input capacitance and any filter/protection networks).
E) Probe / scope / DAQ
Probe capacitance, ground method, scope bandwidth, and sampling rule can change the waveform.
Practical rule
If changing only the probe/ground method changes ringing frequency or overshoot, the measurement chain is creating or reshaping poles/zeros.
Common traps (fingerprints that prevent wrong conclusions)
Trap 1 — probe capacitance & long ground lead
Fingerprint: ringing changes drastically with a different probe or shorter ground.
Action: use a short ground spring / active probe where needed; minimize loop area.
Trap 2 — protection/filter networks reshape phase
Fingerprint: adding/removing RC/TVS/series-R changes peaking and tight-band settling immediately.
Action: treat the network as part of the DUT and record RL/CL and its location.
Trap 3 — source impedance creates extra poles
Fingerprint: BW/settling changes when the source resistance changes.
Action: state the source impedance and bias method; avoid “unknown” sources in comparisons.
Datasheet condition checklist (the fields that must match)
Core settings
Gain setting, input common-mode, supply range
Load
RL, CL (including probe and ADC input capacitance)
Operating swing
Output amplitude and proximity to rails
Environment
Temperature point, measurement bandwidth rule
After conditions match, evaluate using the same acceptance endpoint: settle into the required band and remain stable within the usable window.
A “minimal chain” prevents the measurement setup from becoming the dominant source of peaking, ringing, or slow tails.
Design Workflow: Turn Dynamics Requirements into Specs
Goal: translate requirements into verifiable pass/fail specs
Dynamics should be specified as measurable outcomes under stated conditions. The workflow below turns real signal requirements into a spec set (BW, peaking, settling, large-signal, recovery) and a verification package with clear pass criteria and guardband placeholders.
Step 1 — define requirements (inputs)
Signal limits
Max frequency, max amplitude, max step ΔV
Error tolerance
Settling band ±X (% or ppm) and usable window Twindow
Common-mode dynamics
ΔVcm magnitude and speed (dV/dt) expectation
Overload expectation
Overdrive depth, dwell time, repetition rate
Step 2 — derive specs (outputs)
Small-signal
-3 dB BW plus peaking limit (flatness rule)
Settling
tsettle(0.01% or ppm) under stated conditions
Large-signal
SR / full-power behavior and swing/headroom limits
Recovery
Overload and CM-step recovery back into the band
Noise in band
Integrated RMS noise in the defined effective bandwidth
Condition rule
Every spec must bind to conditions: gain, common-mode point, supply/headroom, RL/CL, and measurement bandwidth rule.
Enter ±X band, hold ≥Thold, before Twindow, with guardband margin
Guardband placeholders (system-owned)
Use placeholders such as X% / X ppm, Twindow, and margin (%) to keep the workflow reusable across systems. Final values must be set by the system budget and verified under the stated conditions.
The workflow turns real signal requirements into condition-bound specs and a verification package with unambiguous pass/fail rules and guardband placeholders.
Application Patterns (Dynamics Mapping Only)
What this section does
Each use-case is reduced to a dynamics profile and a spec priority order (BW / Settling / SR / Recovery). No full circuits are provided here; only the mapping needed to pick, specify, and verify the dynamic behavior.
Use-cases (profile → priority → fast verification)
Dynamic weighing / pressure pulsation
Profile: frequent steps with occasional overload or saturation events.
Priority: Settling and Overload recovery dominate; peaking must be bounded to keep the usable sampling window.
Verify: step into the band quickly and stay within the band for Thold before Twindow.
Muxed DAQ (channel hopping)
Profile: each channel switch looks like a step; gain changes can add overload tail risk.
Priority: Settling first, then Recovery; BW is secondary if the band/window requirement is met.
Verify: switching transient settles into the band within the per-channel acquisition window.
Pulse current / fast transient sensing
Profile: large dI/dt with rapid edges; common-mode can move fast.
Priority: SR and CM-step recovery dominate; BW matters only after large-signal limits are satisfied.
Verify: full-scale edge response avoids SR-limited behavior and returns to the band quickly after CM steps.
Ultrasound / fast bio-signal
Profile: amplitude–frequency is a 2D requirement; bursts can force large-signal constraints.
Priority: BW plus Full-power behavior (SR/swing) first; settling and recovery follow for burst-to-burst fidelity.
Verify: at target Vout_pp and frequency, distortion/edge behavior stays out of SR/swing-limited regions.
General dynamic sensing (mixed events)
Profile: a mix of small-signal content, steps, and occasional overload.
Priority: Settling defines correctness; Recovery defines availability; BW refines only after band/window is met.
Verify: combine step settling, large-signal check, and overload recovery using one condition-bound record.
Use-case mapping stays within dynamics: prioritize specs that control band/window correctness and availability under overload or common-mode events.
Engineering Checklist + IC Selection Notes
A) Engineering checklist (review + acceptance)
Requirements
Max frequency / bandwidth target
Max amplitude and step ΔV
Settling band ±X (% or ppm), usable window Twindow
Common-mode dynamics: ΔVcm and dV/dt
Overload expectation: depth, dwell, repetition
Specs (condition-bound)
Small-signal BW (-3 dB) + peaking/flatness limit
tsettle at 0.01% (or ppm) under stated ΔV, RL/CL, Vcm, Vout swing
Slew rate / full-power behavior at target Vout_pp
Overload recovery back into the band
CM-step recovery back into the band
Integrated noise within the defined effective bandwidth
Risks to flag early
Output swing close to rails (headroom-driven distortion and slow tails)
Probe/cable capacitance (Cextra) reshaping peaking and settling
Protection/RC/source impedance adding poles and shrinking phase margin
MUX or gain switching pushing nodes into saturation (recovery dominates)
Minimal verification set
Step settling: enter ±X band and hold for Thold before Twindow
Full-power check: target Vout_pp and frequency stay out of SR/swing-limited behavior
Recovery: overload and CM-step return to the band within the usable window
Boundary sweep: repeat at supply and temperature edges (same conditions recorded)
B) IC selection notes (fields → risk mapping → inquiry template)
Data that must be available (or requested)
BW vs Gain (or BW at multiple gain points)
Settling vs Gain (0.01% or ppm-level, with ΔV, RL/CL, Vcm, Vout swing stated)
SR / full-power behavior (conditions: Vout_pp, frequency, load)
CM-step recovery (ΔVcm and dV/dt; Vcm operating point)
Output swing/headroom limits under stated supply and load
RL/CL stability condition notes relevant to the intended interface
Missing-field risk mapping (fast triage)
Missing field
Likely risk
Minimal verification
BW vs Gain
Hidden peaking or unexpected bandwidth collapse at the chosen gain
Small-signal sweep + step response at target gain and load
Settling vs Gain (0.01%/ppm)
Window miss: codes wander/slow tail even when -3 dB BW looks fine
Step settle into ±X band and hold for Thold
SR / full-power behavior
Large-signal collapse: SR-limited edges or full-power bandwidth shortfall
Large sine at Vout_pp + fast step at full scale
Recovery (overload / CM step)
Availability loss: long tails after saturation or CM events
Defined overload/CM-step event → return to band in time
Short inquiry template (copy/paste)
Please provide settling and recovery data at Gain = __, Vcm = __, Vout_pp = __, RL/CL = __, including 0.01% (or ppm) settling, overload recovery, and CM-step recovery under the stated stimulus and measurement bandwidth rule.
Example part numbers (for datasheet lookup and curve comparisons)
These are reference examples to speed up datasheet discovery and curve comparisons. Final selection must follow the condition-bound workflow above.
High-speed / wideband INA
TI INA849 · ADI AD8421
Programmable gain (PGA-style INA)
TI PGA855 · TI PGA849
Precision / low-power INA
TI INA828 · ADI AD8422
Zero-drift / chopper (useful as a dynamic contrast)
TI INA333
Selectable gain variants (quick tradeoff checks)
TI INA351
Selection should be driven by condition-bound curves and verified by the minimal set that directly checks band/window correctness and recovery availability.
All long-tail questions are contained here to prevent the main body from expanding sideways. Each answer is formatted as measurable checks and pass/fail criteria.
Why does bandwidth collapse faster than expected when gain is increased?
Likely cause: Closed-loop bandwidth is limited by internal loop gain/compensation, and the gain setting shifts the effective noise-gain/phase margin so BW falls nonlinearly.
Quick check: Measure BW at 2–3 gain points with identical RL/CL, Vcm, and Vout_pp; confirm the actual gain (Rg value and tolerance) matches the assumed setting.
Fix: Specify and qualify BW vs Gain and settling vs Gain (not only a single -3 dB number); avoid operating in gain regions where peaking rises or BW collapses sharply.
Pass criteria: At Gain = __ and RL/CL = __, BW ≥ __ and the step response meets ±X% (or ±X ppm) settling within T_window = __.
Why does the step response ring only at certain gain settings?
Likely cause: Phase margin varies with gain setting; some gains land near a worst-case stability/peaking point for the internal loop.
Quick check: Sweep gain in small steps and record overshoot (%) and ring-down time; repeat with a low-capacitance probe setup to rule out Cextra-driven ringing.
Fix: Avoid the “peaking hotspot” gain region (shift gain slightly); set a peaking/overshoot limit in the spec and qualify it under the intended RL/CL and measurement setup.
Pass criteria: Overshoot < X% and ring-down decays below ±X% band within T_settle = __ at Gain = __ and the defined probe/load condition.
Small-signal BW looks fine—why is large-signal sine badly distorted?
Likely cause: Large-signal behavior is limited by slew rate and/or output swing headroom, so full-power performance collapses even when small-signal BW is adequate.
Quick check: Reduce Vout_pp by 2× at the same frequency (or reduce frequency by 2× at the same amplitude); if distortion drops sharply, SR/swing-limited behavior is dominant.
Fix: Move the operating point away from rails (adjust Vcm/headroom) and spec full-power behavior at Vout_pp = __; if needed, select an INA with higher SR under the same conditions.
Pass criteria: At Vout_pp = __ and f = __, no clipping and measured distortion/linearity meets the system limit (THD or error < __).
Why does settling to 0.01% take much longer than the -3 dB BW suggests?
Likely cause: Peaking/multi-pole dynamics and recovery tails dominate deep settling; -3 dB BW does not guarantee fast 0.01% (or ppm) convergence.
Quick check: Compare 0.1% vs 0.01% settling times on the same step; if a long tail appears, the last decades are not BW-limited but tail/recovery-limited.
Fix: Drive acceptance by settling-to-band (±X%/ppm within T_window), and constrain peaking (or avoid the gain region that produces peaking) under the exact RL/CL and Vcm conditions.
Pass criteria: After a ΔV step = __, output enters ±X% (or ±X ppm) within T_settle = __ and stays within band for T_hold = __.
Why does channel switching (MUX) cause long tails even with a stable DC input?
Likely cause: Switching creates a step-like transient and can push internal nodes into overload; recovery tail, not BW, becomes the limiting factor for the acquisition window.
Quick check: Hold on a single channel (no MUX) and compare settling; then repeat switching with reduced gain or reduced step magnitude to see if the tail scales like recovery.
Fix: Specify a per-switch settling window at the intended gain and switching pattern; prevent overload during switching (keep headroom, avoid rail hits) and allocate acquisition delay based on 0.01%/ppm settling.
Pass criteria: After a channel change, output returns to ±X% band within T_window = __ at Gain = __ and the defined Vcm/Vout swing.
How to tell “slew-rate limited” vs “phase-margin limited” from scope waveforms?
Likely cause: SR limitation produces slope-capped edges/triangular distortion; phase-margin limitation produces overshoot/ringing that persists even at small amplitudes.
Quick check: Keep frequency constant and reduce amplitude 2×: SR-limited artifacts drop strongly; phase-margin ringing changes little. Also check for clear overshoot + decaying oscillation (PM) vs constant slope cap (SR).
Fix: If SR-limited: reduce Vout_pp or frequency or increase headroom; if PM-limited: avoid the gain region with high peaking and control the measurement load/probe condition to remove Cextra-induced ringing.
Pass criteria: Waveform shows no slope-capping at target Vout_pp and overshoot < X% with ring-down < X within T_settle = __.
Why does overload recovery dominate the error right after a transient?
Likely cause: The transient drives internal stages or the output into saturation/limit, and the return-to-band tail is much slower than small-signal dynamics.
Quick check: Look for rail-clipping or flat-topped segments during the event; measure “return to band” time instead of -3 dB BW. Repeat with reduced step amplitude to confirm recovery scaling.
Fix: Prevent saturation by keeping headroom (Vcm and output swing) and specifying overload recovery under a defined overdrive stimulus; allocate post-event blanking/acquisition delay based on return-to-band time.
Pass criteria: Under overdrive = __ (depth/dwell), output returns to ±X% band within T_recovery = __ with no residual baseline shift beyond ±X ppm.
Why does CM step recovery get worse at higher gain?
Likely cause: Higher gain reduces effective dynamic headroom and can slow internal common-mode correction, so CM steps trigger longer recovery tails or temporary distortion.
Quick check: Apply a CM step with near-zero differential input and measure return-to-band at two gains; watch for momentary output rail hits or a long baseline tail.
Fix: Center Vcm to maximize headroom, avoid the highest gain where CM recovery becomes tail-dominant, and specify CM-step recovery using defined ΔVcm and dV/dt conditions.
Pass criteria: For ΔVcm = __ and dV/dt = __, output returns to ±X% band within T_cm_recovery = __ at Gain = __.
Why do datasheet curves not match the bench (probe/load/source impedance)?
Likely cause: Conditions are not aligned: RL/CL, Vcm, Vout swing, source impedance, bandwidth of the measurement chain, and probe Cextra can reshape peaking/settling.
Quick check: Record the exact bench conditions (Gain, Vcm, Vout_pp, RL/CL, probe type/ground lead) and repeat with low-C probing; compare against the datasheet’s stated test conditions line-by-line.
Fix: Enforce condition-bound testing (same RL/CL and Vcm window as the datasheet curve) and document a probe/load rule; treat any extra RC/protection as a condition change that must be re-qualified.
Pass criteria: Under matched conditions, measured BW/settling falls within the expected envelope (±X%) across repeated runs; deviations trigger a condition-audit before design changes.
How much peaking is acceptable before it breaks settling/measurement stability?
Likely cause: Even modest peaking can create ringing and long tails that prevent deep settling within the sampling window, especially for 0.01%/ppm targets.
Quick check: Measure overshoot (%) and ring-down time on a representative step; correlate peaking (dB) with the time to enter and stay within the ±X band.
Fix: Set a settling-driven limit (not a generic peaking number): constrain peaking/overshoot until the step reliably meets the band/window requirement at the intended gain and load.
Pass criteria: At Gain = __, overshoot < X% (or peaking < X dB) and ±X% (or ±X ppm) settling is achieved within T_window = __.
What test stimulus best represents real dynamics: step, burst sine, or square?
Likely cause: A single stimulus rarely covers all failure modes; steps expose settling and recovery, while burst sines expose full-power behavior and distortion under amplitude–frequency constraints.
Quick check: Identify the dominant real event: step-like (MUX/impulses) vs burst-like (pulses/ultrasound). Compare which stimulus best predicts window misses and post-event tails on the bench.
Fix: Use a minimal set: (1) step for band/window settling, (2) large-signal sine or burst sine for full-power behavior, (3) defined overload/CM-step event for recovery availability.
Pass criteria: For each selected stimulus, output meets its condition-bound pass rule (settling within T_window, no SR/swing limit at Vout_pp, recovery to band within T_recovery).
How to set guardbands for BW/settling across temperature and supply?
Likely cause: Dynamic performance shifts with PVT (process, voltage, temperature); gain-dependent BW/settling and recovery can degrade at corners even when typical curves look strong.
Quick check: Repeat the same condition-bound tests (BW, 0.01% settling, recovery) at min/max supply and at low/high temperature; track worst-case deltas at the selected gain.
Fix: Guardband the system window against worst-case: require BW and settling/recovery margins (e.g., BW ≥ __× target, T_settle ≤ __× budget) based on measured corner results, not typical plots.
Pass criteria: At temperature = {min,max} and supply = {min,max}, the same Gain/Vcm/Vout_pp/RL/CL condition meets BW ≥ __ and settling/recovery within the allocated windows.
