Linear Redriver / Equalizer (CTLE/FFE for Long-Reach Links)
← Back to:Interfaces, PHY & SerDes
Linear Redriver / Equalizer restores high-speed link margin by linear CTLE/FFE shaping—it opens the eye without retiming. The core practice is to measure loss/reflects, apply the minimum effective EQ, and lock a repeatable preset from bring-up to production.
Definition & where a Linear Redriver fits (vs retimer)
Linear redrivers/equalizers extend reach by reshaping the channel response (CTLE/FFE) without retiming. No CDR means timing is not rebuilt—only the waveform is improved.
What it is / What it isn’t
What it is
- Compensates high-frequency loss and deterministic ISI via CTLE and/or FFE.
- Improves eye opening at the receiver by restoring amplitude balance across frequency/time.
- Adds low, deterministic latency (no clock recovery loop).
What it isn’t
- Does not rebuild timing; random jitter tied to the sampling clock is not “cleaned.”
- Does not provide clock recovery or a retiming boundary.
- Does not fix protocol/state-machine issues (those belong to retimers/bridges pages).
Use it when / Avoid it when
Use it when…
- Reach is limited mainly by frequency-dependent attenuation (S21 rolls off with frequency).
- Errors correlate with deterministic ISI (post-cursor patterns) rather than “lock/unlock” timing behavior.
- Low added latency and drop-in simplicity are more important than timing reconstruction.
Avoid it when…
- Behavior looks timing-driven (periodic “recoveries,” apparent lock events, or jitter margins collapsing without a clear loss change).
- The channel is dominated by strong reflections (poor S11 / clear TDR discontinuities) and EQ only amplifies the resulting multipath ISI.
- A true retiming boundary is required (CDR/retimer topic; handled on the sibling page).
Decision in ~30 seconds (engineering-first)
- Check S21 slope: does high-frequency loss grow quickly with reach?
- Check reflections: does TDR show a dominant discontinuity (connector/via) that must be fixed first?
- Pick the tool: linear EQ for loss/ISI shaping; retiming only when timing must be rebuilt.
Channel basics that matter: IL, RL, group delay, reflections
Linear equalization works best when reach is limited by insertion loss (S21 roll-off). When strong reflections dominate (poor S11 / sharp TDR events), “more EQ” can amplify multipath ISI instead of fixing it.
You must measure (minimum set, tiered)
Tier 0 (fast reality check)
- Cable/backplane length, connector types, stack-up notes, and lane mapping.
- A/B swaps: known-good cable, known-good board, known-good unit.
- Symptom pattern: deterministic (pattern-related) vs bursty (environment/PI/crosstalk).
Tier 1 (decision-grade)
- S21 insertion loss: how quickly high-frequency content collapses with reach.
- TDR reflection location: where discontinuities dominate (connector, via field, cable transition).
- Eye diagram at the right point: measurement location must match the failure location.
Tier 2 (root-cause depth)
- S11 return loss: reflection strength across frequency (mismatch severity).
- Group delay ripple: frequency-dependent delay that creates periodic ISI signatures.
- Fixture/de-embed notes: incorrect de-embedding can “improve” plots while hiding the real margin.
What each measurement tells you (mapping to EQ decisions)
S21 (Insertion loss)
Sets the required equalization range. A steep high-frequency roll-off typically needs more CTLE peaking or stronger FFE shaping. Overcompensation raises noise and crosstalk along with the signal.
TDR / S11 (Reflections)
Identifies discontinuities that create multipath ISI. Strong reflections often require fixing connectors, via transitions, or impedance control first. EQ cannot “remove” echoes; it can accidentally amplify them.
Group delay ripple
Explains “periodic” eye closure or pattern sensitivity. Ripple indicates dispersion and resonances that may not respond linearly to peaking alone. Treat it as a cue to check structures that resonate (connectors, stubs, packaging).
Typical symptoms → likely physics (fast discrimination)
Symptom: short reach stable, long reach fails
- Likely physics: insertion loss dominates; post-cursor ISI grows with distance.
- First check: compare S21 roll-off between “works” and “fails” reach.
- Next action: select a moderate CTLE/FFE preset, then validate that noise/crosstalk does not increase error rate.
Symptom: errors get worse when EQ is increased
- Likely physics: noise and near-end crosstalk are being amplified; or headroom is reached (clipping/linearity loss).
- First check: observe whether vertical eye noise increases faster than the eye opening improves.
- Next action: reduce peaking, verify input/output swing and common-mode ranges, then reassess with cleaner return paths and power integrity.
Symptom: a specific length/connector makes the link collapse suddenly
- Likely physics: a dominant reflection point or resonance (discontinuity, stub, connector transition).
- First check: TDR to locate the discontinuity distance-to-fault.
- Next action: fix impedance continuity first; treat EQ as a fine-tune step after reflections are reduced.
CTLE deep dive: peaking, corner, and noise amplification trade
CTLE restores high-frequency content by adding controlled peaking. The same peaking also lifts high-frequency noise and crosstalk, so the best setting is typically the minimum that meets margin, not the maximum that looks “sharp.”
CTLE knobs (engineering meaning)
Peaking (dB)
- What it does: boosts high-frequency components relative to low-frequency.
- What it costs: lifts HF noise and crosstalk along with the signal.
- What to watch: noise floor rise vs eye opening improvement (margin, not aesthetics).
Corner / knee frequency
- What it does: selects where the boost begins (which band gets compensated).
- Common mistake: boosting too early creates a mid-band “hump” that increases EMI with limited margin benefit.
- What to watch: whether errors improve across patterns, not just a single pattern.
Zero/Pole shape + input swing headroom
- What it does: controls the slope/flatness of the boost and how “sharp” the transition looks.
- Hidden limiter: peaking can push the waveform into clipping/linearity loss if headroom is insufficient.
- What to watch: flattened tops, excessive overshoot, or BER worsening while the eye looks taller.
Practical tuning order (to avoid “over-peaking”)
- Confirm loss-dominant behavior: if TDR/S11 suggests strong reflections, fix discontinuities before adding more peaking.
- Set corner first: place the boost where the channel begins to roll off.
- Increase peaking gradually: stop at the minimum setting that reduces errors (threshold X placeholder).
- Re-check headroom: ensure the post-CTLE waveform stays in the linear region (no clipping/flat tops).
- Validate across conditions: repeat on worst-case reach, temperature, and supply ripple conditions (ΔX placeholders).
Common failure modes (when peaking is too aggressive)
Symptom: eye looks taller, but BER gets worse
- Likely cause: HF noise/crosstalk lifted faster than the useful signal.
- Quick check: look for a higher noise floor and stronger crosstalk “texture” in the eye.
- Fix: reduce peaking one step; revisit corner placement; improve return paths and PI before re-increasing.
Symptom: stronger peaking increases overshoot and EMI risk
- Likely cause: sharper edges widen spectrum; mid-band hump can excite resonances.
- Quick check: reduce peaking and verify whether the EMI hotspot drops noticeably (ΔX placeholder).
- Fix: use the minimum effective peaking and ensure impedance continuity to avoid resonant excitation.
Symptom: errors spike at high peaking despite “good-looking” plots
- Likely cause: headroom exceeded (clipping/linearity loss) or fixture/de-embed artifact.
- Quick check: look for flattened tops/plateaus or inconsistent results across measurement points.
- Fix: reduce peaking; validate at the failure-relevant point; then re-run error counting with the same setup.
FFE/Pre-emphasis: taps, cursor vs post-cursor ISI, and stability boundaries
FFE is time-domain shaping: it redistributes energy between the main cursor and adjacent symbols to reduce deterministic ISI. Strong taps can increase peak amplitude and overshoot, raising EMI risk and potentially exceeding linear headroom.
Tap intuition (3-tap mental model)
Main tap (cursor)
Sets the primary symbol amplitude at the sampling instant. If eye height is uniformly low (without strong reflections), increase main first before adding strong adjacent taps.
Post tap (post-cursor)
Cancels trailing energy that bleeds into the next symbol. Use it when “right-side closure” or tailing indicates post-cursor ISI. Excessive post-tap can create overshoot and ringing.
Pre tap (pre-cursor)
Addresses energy that arrives “early,” often seen as left-side smear or precursor distortion. Treat it as a precision tool: if reflections dominate, fix impedance discontinuities before relying on pre-tap.
Quick decision tree (eye shape → first tap to try)
- Uniform low eye height: increase main tap first, then fine-tune post.
- Right-side closure / long tail: prioritize post tap to reduce post-cursor ISI.
- Left-side smear / precursor hint: adjust pre tap cautiously; confirm reflections are not dominant.
- Overshoot/ringing increases: reduce adjacent tap strength and verify headroom (avoid clipping).
- Errors worsen while eye looks “wider”: suspect noise/crosstalk amplification or nonlinearity; back off and re-check measurement point.
Stability boundaries (what “too much tap” looks like)
- Peak amplitude grows: stronger taps increase peaks and overshoot → EMI risk and headroom stress.
- Ringing appears: taps can excite resonant structures (connectors/stubs) rather than cancel them.
- Margin becomes fragile: settings that work on one cable/board may fail on another if the channel variation is large.
Practical rule: establish a small set of presets that cover channel classes (short/medium/long reach), and avoid “max tap” as a default. Acceptance criteria should be tied to error counting thresholds (X placeholders).
Adaptation in linear equalizers: AGC, slicer-based hints, presets vs true training
“Adaptive” in a linear redriver typically means gain control and preset selection based on signal statistics. It is not protocol-layer training and does not create a retiming boundary.
Adaptive modes (what they observe → what they change)
AGC (Automatic Gain Control)
- Observes: amplitude/energy statistics (envelope, distribution, windowed levels).
- Changes: gain (and sometimes output swing target) to keep the signal in a desired window (X placeholder).
- Boundary: raises noise/crosstalk together with the signal; does not “train” protocol behavior.
Auto CTLE selection (preset peaking/corner)
- Observes: HF/LF energy ratio or simplified “tilt” metrics; sometimes decision statistics (“slicer hints”).
- Changes: CTLE preset (peaking/corner) from a small discrete set.
- Boundary: discrete choices are fast but can mis-pick under reflections or measurement artifacts.
Cable / loss detect (short/medium/long classes)
- Observes: presence/attenuation class and coarse loss signature.
- Changes: chooses a preset group (often also sets AGC target).
- Boundary: reflections/discontinuities can look like “extra loss” and push the device into overly aggressive gain.
Presets vs true training (scope boundary for this page)
- Preset selection: pick from discrete CTLE/FFE/AGC settings, then hold. Good for repeatability.
- “True training” (not covered here): protocol-driven closed loops and retiming behaviors belong to retimer/CDR topics.
- Practical implication: a linear redriver can improve the waveform, but cannot replace protocol-layer training requirements.
Bring-up workflow (stable “detect → choose → hold”)
- Start with a known-good manual preset (baseline for short/medium/long reach).
- Enable detection with switching limits (avoid frequent toggling; prefer hysteresis and a hold window).
- Validate across reach classes (short/medium/long) using the same measurement point.
- Check for mis-picks: if short reach selects a “long” preset, reduce maximum allowed peaking/gain.
- Freeze after selection for production stability; re-detect only on reset or major events (X placeholder).
Pitfalls (why “auto EQ” can make a short channel worse)
Symptom: short reach selects high gain / strong peaking
- Likely cause: reflections or fixture artifacts are interpreted as “loss.”
- Quick check: force a low-gain preset and compare error count (ΔX placeholder).
- Fix: add hysteresis, cap max peaking, and enforce a “short channel” ceiling.
Symptom: settings “pump” (gain/preset toggles)
- Likely cause: no hysteresis or observation window too short.
- Quick check: extend the observation window and enable hold to stabilize.
- Fix: restrict switching to “detect phase” only; hold during normal operation.
Symptom: eye looks improved but errors increase
- Likely cause: noise/crosstalk lifted or headroom exceeded (nonlinearity).
- Quick check: reduce gain/peaking one step and confirm whether errors drop (ΔX placeholder).
- Fix: prefer minimum effective gain and confirm the SI budget (next section).
Signal integrity budget: swing/CM, headroom, linearity, and clipping mechanisms
Long reach failures often come from amplitude and linearity limits: insufficient input eye height, common-mode out of range, or gain/peaking that pushes internal or output stages into clipping. A larger-looking eye is not a guarantee of lower error rate.
Budget snapshot (minimum windows, placeholders)
- Input window: Vdiff_in ≥ X_min and Vcm_in within [X_low, X_high].
- Shaping impact: CTLE/FFE can increase peak voltage beyond “average” swing.
- Output window: Vdiff_out ≤ X_max (linearity limit) and load/termination stays within X Ω class.
Engineering takeaway: verify windows at the device pins (input and output), then validate that EQ settings do not exceed headroom during worst-case patterns and conditions (ΔX placeholders).
Headroom checklist (input side / output side)
Input side (at redriver pins)
- Minimum eye height: confirm Vdiff_in stays above X_min at worst reach.
- Common-mode window: verify Vcm_in stays inside [X_low, X_high] across temperature and bias conditions.
- Termination/return: poor return paths can translate into common-mode noise that reduces decision margin.
Output side (from redriver to the load)
- Max linear swing: confirm Vdiff_out peak stays below X_max under the chosen EQ preset.
- Drive vs load: heavy loading or mismatch can distort edges and trigger reflections that defeat EQ.
- Peak growth: CTLE/FFE can increase peaks even if average swing seems reasonable.
Clipping mechanisms (how nonlinearity shows up)
- Internal peak overload: peaking/taps increase peak voltage and hit an internal linearity boundary.
- Output swing limit: the driver saturates → flat tops/plateaus and pattern-dependent distortion.
- Protection clamp events: extreme overshoot/common-mode excursions can be clipped by protection structures.
Visual cues: flattened peaks, asymmetric distortion, overshoot that appears “cut off,” and an error rate that worsens when EQ is increased.
Symptoms (bigger-looking eye but worse errors)
Symptom: eye height increases, CRC/errors increase
- Likely cause: noise/crosstalk amplified or clipping begins under peaks.
- Quick check: reduce peaking/taps one step; if errors drop by ΔX, the previous setting was over-aggressive.
- Fix: cap EQ to minimum effective; re-validate headroom windows at pins.
Symptom: waveform shows flat tops or “plateaus”
- Likely cause: output swing limit or internal peak overload.
- Quick check: compare peak shape across presets; clipping becomes more visible at higher peaking.
- Fix: reduce peak growth (lower peaking/taps) and ensure load/termination does not force extra overshoot.
Symptom: long reach is unstable, short reach is stable
- Likely cause: Vdiff_in approaches X_min and the system compensates by raising gain/peaking into nonlinearity.
- Quick check: verify input window and common-mode range at the redriver pins at worst reach.
- Fix: establish reach-class presets and enforce peak/linearity limits before enabling auto modes.
Layout & implementation: return paths, crosstalk, power integrity, and connector reality
Linear equalization cannot compensate for broken return paths, impedance discontinuities, or injected noise. Aggressive peaking often makes board-level issues more visible by lifting crosstalk and power-induced jitter.
Do / Don’t (return path + impedance continuity)
DO
- Keep a continuous reference plane along the entire differential route.
- Add return stitching vias near every layer transition (via-to-via proximity matters).
- Maintain symmetry: both lines see the same via count, reference, and environment.
- Minimize via stubs and connector discontinuities (backdrill where required).
- Reserve measurement access near the connector and near the EQ pins.
DON’T
- Do not cross plane splits or gaps that break the return path.
- Do not change width/spacing abruptly at connectors or via fields.
- Do not rely on stronger EQ to “fix” reflections or return-path problems.
- Do not place unmatched passives on only one side of the differential pair.
- Do not allow long parallel runs next to aggressors (crosstalk grows with parallel length).
Do / Don’t (crosstalk reality under peaking)
DO
- Treat connector/via-dense regions as primary coupling hotspots.
- Keep lane-to-lane topology consistent to reduce mismatch and skew sensitivity.
- Minimize long parallel segments; shorten adjacency wherever possible.
DON’T
- Do not route next to high-edge-rate clocks or switching nodes near the EQ.
- Do not assume “eye looks fine” means coupling is harmless; error rate is the truth.
- Do not enable maximum peaking on a short channel without a crosstalk sanity check.
Practical discriminator: if stronger peaking improves the eye height but worsens errors, prioritize checking crosstalk injection and power/ground noise before adding more equalization.
Power noise first probes (what to measure, where, how)
Which rails to probe (placeholders)
- Analog / EQ front-end rail (AVDD class).
- Output driver rail (OVDD class).
- Digital core rail (DVDD class).
- Bias / reference-related nodes (if exposed).
Where to probe (high-value points)
- Across the closest decoupling capacitor at the device pins (most truthful).
- After ferrite/LC filters (to spot resonance and insufficient damping).
- At key ground return points near connectors (to detect ground bounce / CM injection).
How to probe (avoid measurement lies)
- Use a short ground spring or coax pickup; avoid long ground leads.
- Capture both time-domain ripple (RMS/Vpp placeholder) and frequency-domain spurs (peak@f placeholder).
- Compare noise with EQ presets: observe ΔRipple and ΔError (both placeholders).
Pass criteria (placeholders): Ripple_RMS ≤ X, Ripple_pp ≤ X, Spur@f ≤ X, and error rate must not degrade by ΔX when switching presets.
Scope note: this section covers board effects that directly change linear EQ behavior; protocol training and retiming are out of scope.
Protection & passives around EQ: ESD arrays, CM chokes, AC caps, and matching
Protection and passives must be treated as part of the channel. Their parasitics change insertion loss, return loss, and mode conversion—sometimes enough to remove the margin that EQ was meant to recover.
Component impact (card list; placeholders)
ESD arrays (low-C TVS)
- Impact driver: effective capacitance + mismatch (ΔC placeholder).
- SI effect: HF loss ↑, return loss worse, asymmetry → mode conversion.
- Quick check: A/B with bypass footprint and compare IL/eye/errors (ΔX placeholder).
- Selection rule: minimize C and mismatch; enforce symmetric placement and shortest stub.
Common-mode choke (CM choke)
- Impact driver: differential insertion loss + mode conversion risk.
- SI effect: may help EMI, but can consume eye margin near Nyquist and add group-delay ripple.
- Quick check: watch IL/phase ripple changes and correlate with errors (ΔX placeholder).
- Selection rule: use only when needed; prefer low differential loss and consistent pair matching.
AC coupling capacitors (AC caps)
- Impact driver: LF corner + pattern-dependent baseline movement risk.
- SI effect: long run-length or encoding can create baseline wander and reduce decision margin.
- Quick check: compare error behavior across patterns and capacitor options (ΔX placeholder).
- Selection rule: ensure corner is low enough (X placeholder) and keep routing fully symmetric.
Matching / small series elements (micro-tuning)
- Impact driver: damping and reflection shaping, at the cost of insertion loss.
- Use boundary: treat as fine adjustment after fixing major discontinuities and return-path breaks.
Placement & symmetry rules (board-safe defaults)
DO
- Place ESD and AC caps symmetrically; ensure both lines share the same topology.
- Keep protection stubs short; place close to the point being protected (often the connector).
- Maintain reference continuity through the passive cluster; avoid creating a new return break.
- Add bypass/option footprints for A/B validation and production tuning.
DON’T
- Do not place ESD far from the connector if it creates a long stub.
- Do not combine CM chokes with abrupt impedance changes in the same small region.
- Do not allow line-to-line asymmetry around the passive chain (mode conversion risk).
Decision order (fast engineering path)
- Confirm whether ESD is required by the system environment (requirement-driven).
- If required: choose low-C, low-mismatch devices and enforce symmetric placement.
- Use CM chokes only with a verified EMI/common-mode problem and a measurement plan.
- Size AC caps to keep the LF corner safely low (X placeholder) and validate pattern sensitivity.
- Apply matching/damping as final micro-tuning after discontinuities and return issues are resolved.
Scope note: this section covers SI trade-offs of protection/passives, not a product catalog.
Verification workflow: from S-parameters to eye/BER, and how to avoid measurement traps
Verification must be a closed loop: measure the channel, choose the minimum-effective preset, validate with eye and error metrics, then lock the configuration and regression-test across corners. Waveform “improvement” is not sufficient unless errors improve.
Bring-up loop (1 → 2 → 3 → 4)
1) Measure (channel truth)
- Measure: S21/S11, TDR, baseline eye at a consistent reference plane.
- Classify: loss-dominant vs reflection/ISI-dominant vs noise-injection-dominant.
- If unclear: treat the measurement chain as suspect and check traps first.
2) Decide preset (minimum-effective EQ)
- Goal: select a repeatable baseline preset (avoid max peaking by default).
- Inputs: channel classification + reach class (short/medium/long).
- Outputs: Preset ID (X), AGC mode (X), peaking limit (X).
3) Validate (eye + BER / error counters)
- Keep constant: probe method, bandwidth template, reference plane, time window.
- Decision rule: errors win; an eye that looks larger but increases errors is a fail.
- Record: error monotonicity versus presets (improves steadily vs non-monotonic).
4) Lock config + regression
- Lock: strap / EEPROM / register lock (choose one; document it).
- Regression: re-test across temperature, supply range, and reach classes (placeholders).
- If station-to-station mismatch appears: treat it as a production control problem (see H2-10).
Fast decision cues (symptom → first move)
- S21 rolls off smoothly and TDR is clean → increase CTLE/AGC gradually and verify error monotonicity.
- TDR shows distinct reflection points → fix discontinuities first; stronger EQ rarely stabilizes structural reflections.
- More peaking makes the eye taller but errors worse → prioritize crosstalk injection and power/ground noise checks.
- Different fixtures/instruments disagree → align reference planes and de-embedding models before tuning presets.
Measurement traps (trap → quick check → fix)
Fixture de-embedding errors
- Quick check: de-embedded S21 becomes “too good” or phase/group-delay looks non-physical.
- Fix: standardize reference planes and model versions; save raw + de-embedded results.
Bandwidth settings creating “fake improvement”
- Quick check: changing bandwidth/RBW/VBW dramatically improves plots without improving errors.
- Fix: freeze a measurement template; treat error counters as the final judge.
Trigger and clocking misinterpretation
- Quick check: eye width changes sharply when switching trigger sources.
- Fix: lock trigger strategy and log it with the dataset; compare only like-for-like.
Window length / pattern length too short
- Quick check: short tests look clean, long tests show rare bursts or slow drift.
- Fix: set minimum bits/time windows (X placeholders) and keep them consistent across runs.
Evidence package to save (enables production + field correlation)
- S-parameters: raw + de-embedded (model version recorded).
- TDR snapshot with reference plane annotated.
- Eye captures using the fixed template (bandwidth/trigger logged).
- BER / error-counter logs (pattern + window placeholders).
- Preset/register snapshot (Golden config input).
Production & field diagnostics: knobs that must be locked, logs to capture, and acceptance thresholds
Production stability depends on locking controllable variables and capturing enough context to reproduce failures. A “golden configuration” is only meaningful when fixtures, templates, and environment ranges are controlled and logged.
What to lock (controllable variables)
Config locks
- Preset ID (X), CTLE peaking/corner (X), FFE taps (X).
- AGC enable/target (X) and any auto-selection hysteresis/hold window (X).
- Preset settle time before counting errors (X).
- Measurement template ID (bandwidth/trigger/probe method) must be fixed.
Environment locks
- Temperature range: X_low to X_high.
- Supply range: Vmin to Vmax (placeholders), ripple limits: Ripple_RMS ≤ X.
- Warm-up / stabilization time in the test sequence (X placeholder).
Channel locks
- Cable type/model (X) and reach class or length (X m placeholder).
- Connector vendor/revision (X) and fixture version (X).
- De-embedding model version (X) and reference-plane definition must be frozen.
What to log (must-have vs nice-to-have)
Must-have logs
- Temperature (T) and timestamp.
- Supply voltage + ripple snapshot (V, Ripple_RMS/Vpp placeholders).
- Cable model + length class (or X m placeholder).
- Preset/register snapshot (Golden config hash / ID placeholder).
- Error counters: errors / bits / time window (X/Y placeholders).
- Failure tag: loss vs reflection vs noise-injection (for triage consistency).
Nice-to-have logs
- Station / tester ID for station-to-station correlation.
- Connector insertion cycles (if tracked).
- Captured eye image ID (template ID must match production standard).
- Event marker for field shocks/ESD/surge (if available).
Pass criteria (threshold placeholders X / Y / Z)
Waveform margin (placeholders)
- Eye height ≥ X; eye width ≥ X (measured with the fixed template).
- Overshoot/undershoot ≤ X (if applicable).
Error performance (placeholders)
- BER ≤ X over Y bits (or errors ≤ X over Y seconds).
- Switching presets must not degrade error rate by ΔX after settle time X.
Stability across corners (placeholders)
- Temperature: X_low to X_high; supply: Vmin to Vmax.
- Reach classes: short / medium / long (or X m classes).
Power integrity guardrails (placeholders)
- Ripple_RMS ≤ X; Ripple_pp ≤ X; Spur@f ≤ X.
Selection logic: choose a linear redriver/equalizer without overbuying
Goal: recover eye opening via linear amplitude/frequency shaping (CTLE/FFE)—not retiming. Selection should start from channel loss & variability, then converge on headroom, programmability, and production lock.
A. One-rule principle (avoid the #1 mistake)
- Decide Need retime? first. If the system requires a retiming boundary, a linear redriver is the wrong tool.
- If the dominant problem is channel loss / reflections / ISI and timing recovery is handled elsewhere, proceed with linear EQ.
Practical input for this decision: S-parameters/TDR + “what breaks” symptom (loss/ISI vs timing-domain failure). Thresholds: X (loss), Y (eye height), Z (BER/CRC).
B. Decision tree (3 levels, executable)
-
Classify channel difficulty (reach/loss variability)
- Measure: S21 @ Nyquist (≈ X dB), S11, TDR discontinuities, connector + passive loss.
- Output: Short / Medium / Long reach class + “fixed vs variable” channel.
-
Need retime? (hard stop)
- If failures correlate with timing-domain requirements (a retiming boundary is required) → choose a retimer/CDR class instead.
- If failures correlate with loss / ISI / reflections and linear EQ opens the eye → continue with linear EQ.
-
Need auto? (control vs robustness)
- Channel varies (cable length/vendor/temperature/connector wear) → prefer AGC / auto-CTLE selection.
- Channel fixed (stable BOM & routing) → prefer preset / strap / EEPROM lock for repeatability.
Output of the tree: a device “class” plus a locked configuration plan (preset/gain/EQ steps) with acceptance thresholds X/Y/Z.
C. Key specs (grouped by what they decide)
- CTLE peaking range (dB) and where it peaks (Nyquist neighborhood).
- FFE / de-emphasis options (if provided): post-cursor control without forcing nonlinearity.
- Usable bandwidth (not just “max data rate” marketing).
- Input sensitivity / minimum eye height (what “still works” on worst-case long channels).
- Output swing & linear region (avoid “bigger eye but worse BER” due to clipping).
- Common-mode tolerance & termination expectations (avoid mismatch-induced reflections).
- Power per lane + thermal path (density platforms need predictable dissipation).
- Lane count and routing escape (2/4/8 lanes vs PCB return-path reality).
- Control interface: pins only vs I²C, and whether settings can be locked.
- Preset/EEPROM/strap support to freeze a “golden config”.
- Basic diagnostics (readback of EQ state, gain, alarms).
- Consistency across volume (gain variation, repeatability).
D. Example material numbers (map to classes)
The list below is for “class mapping” and design exploration. Always re-check package/suffix/temperature grade and confirm the device is linear (no CDR) for the intended interface.
- TI DS80PCI402 — 4-lane PCIe redriver with equalization & de-emphasis (2.5/5/8 Gbps class). Replaceable “lane conditioner” class.
- TI SN75LVPE3410 — 4-channel PCIe 3.0 linear redriver (8 Gbps class). Good for pin-strap style deployment.
- TI DS80PCI810 — 8-channel linear redriver with CTLE (8 Gbps class). Useful when lane density is needed.
- Diodes / Pericom PI3EQX8904 — 4 differential channel PCIe ReDriver with programmable linear equalization, swing & gain (pin/I²C control).
- TI DS125BR401A — 4-lane linear redriver up to 12 Gbps class with CTLE; common for backplane/cable ISI recovery.
- TI DS160PR810 — 8-channel linear redriver (16 Gbps class) and explicitly described as protocol-agnostic linear redriver.
- TI DS320PR810 — 8-channel linear redriver (32 Gbps class) for very high-speed backplane/short-cable domains.
- Diodes PI3EQX32908E — 32 Gbps, 8-channel PCIe 5.0 linear ReDriver with external EEPROM support (lock-and-ship workflows).
- TI TUSB522P — USB 3.1 Gen1 5 Gbps dual-channel redriver (signal conditioner).
- TI TUSB1046A-DCI — USB Type-C DP Alt Mode 10 Gbps linear redriver crosspoint switch (source-side oriented).
- NXP PTN36502 / PTN36502A — USB 3.1 Gen1 + DisplayPort 1.2 combo redriver for Type-C/DP muxing scenarios.
Overbuy traps (quick checks): “Max peaking” often amplifies noise/crosstalk; “auto EQ everywhere” can hurt factory repeatability; “dB-only selection” ignores headroom and clipping. Pass criteria placeholders: Eye ≥ X, BER/CRC ≤ Y, margin ≥ Z.
Recommended topics you might also need
Request a Quote
FAQs: linear redriver/equalizer bring-up & troubleshooting
Each answer is fixed-format and executable: Likely cause → Quick check → Fix → Pass criteria. Replace placeholders X/Y/Z with interface-specific thresholds.
Long cable: eye looks “bigger” after EQ but BER worsens — noise/crosstalk amplified? first discrimination step?
Likely cause: CTLE peaking increases high-frequency noise and/or crosstalk more than signal; measurement template changed (artifact).
Quick check: Step peaking down by 1–2 levels while keeping the same test window (Y_bits / Y_sec) and compare BER/CRC; if errors improve while eye shrinks, noise/crosstalk amplification is dominant.
Fix: Use the minimum-effective peaking; reduce gain range or disable AGC hunting; improve return path / spacing / victim lane isolation before increasing peaking further.
Pass criteria: BER ≤ X_BER (or CRC ≤ X_per_min) over Y_bits (or Y_sec) with peaking ≤ X_dB and no new spurs/noise rise beyond X_dBc.
Short cable OK, long cable fails — reflection point vs insufficient peaking: what to check first (TDR vs S21)?
Likely cause: Either (A) a discrete impedance discontinuity dominates (reflection/echo), or (B) smooth loss dominates (needs more HF boost).
Quick check: Start with TDR: a clear bump/dip at a distance indicates reflection dominance; if TDR is smooth, check S21 roll-off near Nyquist and classify loss (X_dB_Nyq).
Fix: Reflection-dominant → correct connector/via/termination mismatch first; Loss-dominant → increase CTLE peaking/corner gradually and re-validate errors with a fixed template.
Pass criteria: TDR discontinuity ≤ X_ohm (or ≤ X_%), and BER ≤ X_BER over Y_bits at peaking ≤ X_dB with stable preset selection.
Adding more peaking makes errors more frequent — are you in clipping/headroom limit? first probe?
Likely cause: EQ gain pushes the redriver into nonlinear/clipping region; output swing or common-mode range is exceeded under worst-case pattern/loading.
Quick check: Probe the redriver output (same reference plane) and look for flat-topping/rail hits/overshoot increase when peaking steps up; correlate error spikes with high-amplitude segments or load changes.
Fix: Reduce peaking or output swing; verify termination and load; ensure supply headroom and output common-mode are within spec; prefer moderate EQ + cleaner layout over max gain.
Pass criteria: No clipping signatures at output; overshoot ≤ X_% (or ≤ X_mV), and BER ≤ X_BER over Y_bits across the intended supply/temperature range.
Link only fails at hot/cold — which EQ parameter drifts first (gain vs corner)? what to log?
Likely cause: Channel loss and device analog behavior drift with temperature, causing a different “best” peaking/corner; auto-selection may hop presets at corners.
Quick check: Log temperature, supply ripple, and EQ state (preset ID + gain/peaking) at room and at corners; if the chosen preset changes first, adaptation is the trigger; if preset fixed but errors rise, analog margin is shrinking.
Fix: Add hysteresis/hold time for auto-selection or lock a conservative preset for corners; re-check headroom/clipping at corners; tighten PDN ripple and connector variability.
Pass criteria: No preset hopping during Y_sec soak; BER ≤ X_BER over Y_bits across T = X_low…X_high and V = Vmin…Vmax (placeholders).
Works on bench, fails in system — return path/connector mode conversion: first layout check?
Likely cause: Return-path discontinuity or connector/pinfield creates mode conversion; system current paths inject common-mode noise into the differential pair.
Quick check: Inspect for gaps under the pair, split planes, asymmetrical via transitions, and connector ground pin usage; compare near-end behavior with chassis/PSU connected vs isolated.
Fix: Restore a continuous return reference; add ground stitching near layer transitions; enforce symmetric via/escape; relocate/redesign connectors that force imbalance.
Pass criteria: Mode-conversion proxy (e.g., common-mode content) reduced by ≥ X_dB, and BER/CRC meets X over Y_bits in full system configuration.
Errors appear only under load/current step — power ripple coupling: where to probe and what delta is suspicious (X mV)?
Likely cause: Supply ripple or ground bounce modulates the redriver analog front-end; EQ increases sensitivity to rail noise (especially at high peaking).
Quick check: Probe the redriver analog rail at the device pins (short ground spring) during load steps; correlate error bursts with ripple increase ΔVpp ≥ X_mV.
Fix: Improve local decoupling/PDN impedance; add filtering on sensitive rails; reduce peaking/gain range; ensure return currents do not share noisy paths with the high-speed reference.
Pass criteria: Ripple at pins ≤ X_mVpp (and/or ≤ X_mVrms) during worst-case load; BER ≤ X_BER over Y_bits with the same preset.
Two units behave differently on the same cable — adaptation mis-detect or tolerance? quick A/B procedure?
Likely cause: Auto EQ selects different presets due to detection noise; or device/channel tolerances shift the optimum EQ point.
Quick check: Lock both units to the same preset (disable auto if possible) and repeat BER/CRC over Y_bits; then swap units in the same socket/fixture to see if the “bad” behavior follows the unit or the channel.
Fix: If auto mis-detect: add hysteresis/hold, tighten detection conditions, or lock a conservative preset; if tolerance: widen margin (reduce peaking, improve layout, tighten passives/connector BOM).
Pass criteria: Under locked preset, both units meet BER ≤ X_BER over Y_bits; under auto, preset state does not oscillate within Y_sec.
CM choke added “for EMI” and now link margin collapses — how to confirm insertion loss vs mismatch?
Likely cause: The choke adds differential insertion loss near Nyquist and/or introduces impedance discontinuity and mode conversion (asymmetry).
Quick check: Compare S21/Sdd21 with and without the choke; use TDR to detect a localized impedance bump at the choke footprint; check if errors correlate with higher peaking (loss compensation fighting the choke).
Fix: Select a lower-loss, better-matched choke; ensure symmetric routing/placement; move the choke location to reduce discontinuity impact; re-tune EQ for the new channel.
Pass criteria: Added loss at Nyquist ≤ X_dB and reflection bump ≤ X_%; BER ≤ X_BER over Y_bits with peaking ≤ X_dB.
ESD array swap changes reach — how to estimate capacitance impact quickly?
Likely cause: Higher line-to-line or line-to-ground capacitance increases high-frequency loss and differential mismatch, reducing eye margin and increasing ISI.
Quick check: Compare the ESD array capacitance spec (C_diff/C_line) and measure S21 delta (with/without) around Nyquist; if reach drops while peaking must increase, capacitance loss is likely.
Fix: Use a lower-capacitance, tighter-matched ESD array; place it to minimize discontinuity; re-check return path and symmetry around the protection footprint.
Pass criteria: Protection network adds ≤ X_dB loss at Nyquist and maintains impedance bump ≤ X_%; BER ≤ X_BER over Y_bits at the target reach.
Eye mask passes but CRC still spikes — measuring at wrong point / fixture de-embed artifact?
Likely cause: The eye is captured at a non-representative plane (too early/too ideal), or de-embedding/template choices hide real noise/ISI that still triggers CRC errors.
Quick check: Correlate CRC bursts with a long-run test window (Y_sec) and repeat the eye capture using the exact same fixture plane and a frozen template; compare raw (no de-embed) vs de-embedded results for consistency.
Fix: Lock the measurement template and reference plane; validate with error counters as the primary metric; correct the de-embedding model/version and record it with the dataset.
Pass criteria: CRC ≤ X_per_min over Y_sec and BER ≤ X_BER over Y_bits using the locked template and the intended reference plane.
Rare burst errors every N seconds — is it AGC hunting? how to detect with logs?
Likely cause: Auto-gain or auto-CTLE selection oscillates between states (hunting), creating periodic margin collapses or burst errors.
Quick check: Log EQ state (preset ID / gain step) with timestamp and compare to burst periodicity; then freeze AGC/auto-selection and check whether bursts disappear over Y_sec.
Fix: Add hysteresis/hold time; narrow gain/peaking search range; lock a stable preset for production; address the underlying variability source (power/return path/crosstalk) that triggers hunting.
Pass criteria: No EQ state changes over Y_sec and burst rate ≤ X_bursts_per_hour; BER ≤ X_BER over Y_bits with the chosen lock policy.
Multi-lane: one lane always worse — skew/escape/crosstalk: fastest isolation method?
Likely cause: Lane-to-lane routing asymmetry (skew/escape), localized aggressor coupling, or a marginal channel element on that lane.
Quick check: Perform a lane-swap A/B test (logical remap or connector swap if available) and see whether errors follow the physical lane; measure per-lane S21 and near-end crosstalk to identify the outlier.
Fix: Improve routing symmetry and spacing; remove/mitigate aggressors near the weak lane; apply lane-specific EQ (if supported) and then re-lock the configuration for production.
Pass criteria: Worst lane meets BER ≤ X_BER over Y_bits with lane-to-lane margin difference ≤ X_dB (or ≤ X_%), under the locked preset policy.
