UART Multiplexer / Selector for Multi-Device Sharing
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Share one UART across many devices by enforcing one active talker at a time: use selector/gating to prevent electrical contention, then apply a deterministic switching + arbitration + fault-isolation workflow so a bad or unpowered device cannot stall the system.
H2-1 · Definition & Scope Boundary
Scope statement (hard boundary)
- This page covers: sharing a single UART (TX/RX) across many UART devices using a MUX/selector/switch + collision-safe switching and arbitration.
- Primary risks handled: TX push-pull contention, RX aggregation side effects, switching glitches, protocol-level collisions, and fault isolation.
- Deliverables: architecture options, electrical failure modes, switching sequence rules, arbitration strategies, robustness hooks, and a debug checklist.
- This page does NOT cover: USB/Ethernet↔UART bridges, UART↔SPI/I²C protocol bridges, RS-232/RS-485 and isolation PHY details (links only).
- Exit links: Multi-UART Bridges, UART ↔ SPI/I²C Bridge, Voltage Levels & PHY, RS-485
Definition: A UART multiplexer/selector is a board-level routing block that connects one UART port to many UART devices while enforcing that only the selected device can drive the shared path. The goal is not only functional routing, but also preventing electrical contention, ghost-powering, and switching-time glitches that create framing/parity errors.
What “success” looks like (engineering-facing)
- No collision current: non-selected device TX must be Hi-Z (or physically disconnected).
- Clean switching: channel changes do not inject false start bits or break/auto-baud triggers.
- Fault containment: a “bad actor” device can be isolated without taking down other channels.
- Serviceability: debug, production test, and field maintenance remain deterministic and traceable.
The routing element must enforce break-before-make and ensure every non-selected TX path is Hi-Z (or physically disconnected). Otherwise, contention current, ghost-powering, and switching glitches will dominate field failures.
H2-2 · Use Cases & Why Collisions Happen
UART is inherently point-to-point. Reusing one UART across many devices is practical, but only when collisions are treated as a first-class design constraint: electrical contention, protocol overlap, and switching-time state-machine hazards.
Typical use cases (with the first engineering check)
- Shared debug console: one UART services multiple modules. Risk: boot logs talk at the same time. First check: non-selected device TX default is Hi-Z (OE gating or physical disconnect).
- Production test fixture: ATE sequences across many DUT channels. Risk: switching glitches + long harness noise create framing errors. First check: break-before-make timing + RX FIFO flush during channel change.
- Field maintenance access: one service UART reaches many peripherals. Risk: a faulty device continuously drives TX and blocks all others. First check: channel-level isolation hooks (OE/reset/power-cut) exist and default safe.
- Low-power wake paths: UART activity used to wake a sleeping host. Risk: sleep-state leakage / ghost-powering via ESD diodes and IO rails. First check: unpowered devices do not back-power through TX/RX (measure rail rise / clamp current).
Collision map (what fails, what it looks like, what it breaks)
-
TX driver contention (push-pull clash):
two devices drive opposite levels on the shared path.
Symptom: line stuck high/low, heating, “all garbage” bytes.
Consequence: IO overstress, intermittent resets, long-term degradation. -
RX aggregation side effects:
parallel inputs add leakage/ESD paths and increase effective capacitance.
Symptom: false start bits, sporadic framing/parity errors.
Consequence: spurious wake-ups, state-machine desync, retry storms. -
Protocol-level collision (multiple talkers):
no addressing/arbitration, multiple devices respond simultaneously.
Symptom: responses overlap on the analyzer; CRC/parse failures spike.
Consequence: non-deterministic control, throughput collapse under load. -
State-machine collision (reset/boot/break/auto-baud):
switching or reset creates spurious edges and mis-detect events.
Symptom: first frame after switching is wrong; auto-baud drifts; break misfires.
Consequence: wrong configuration, stuck init flows, intermittent field failures.
The practical goal is to make collision behavior impossible by hardware (only one active talker), and recoverable by software (timeouts, blacklisting, deterministic switching).
Next sections will map each collision class to concrete countermeasures: architecture choices, electrical constraints, switching sequence, arbitration, and fault isolation—without expanding into bridge/PHY topics outside this page boundary.
H2-3 · Architecture Options (5 Practical Patterns)
A shared UART becomes reliable when the design makes non-selected talkers impossible (electrically) and misbehavior recoverable (system-level isolation). The five patterns below are ordered by control strength and practical deployability.
A · Physical 1-of-N, bidirectional select (cleanest)
- Best when: deterministic service port / production test; devices may differ in baud/parity; “bad actor” devices must be contained.
- Costs: switch channel count; insertion loss/Ron; channel-to-channel isolation; switching transient control.
- Fails if: switching is not break-before-make (momentary parallel connection can still cause contention).
B · RX select only, TX broadcast (use with strict behavior rules)
- Best when: devices never speak unless addressed; downlink commands are safe to broadcast; uplink is strictly one responder at a time.
- Costs: higher protocol discipline; risk of unintended actions if devices interpret broadcast similarly.
- Fails if: any device can emit unsolicited output (boot spam / fault logs) → shared RX becomes polluted.
C · TX gating (Hi-Z control) + RX aggregation (common in practice)
- Best when: each device TX can be forced to Hi-Z via OE/EN (or external gate); channel-level enable lines are available.
- Costs: extra control lines; careful power-up defaults; switching needs a “quiet window” to avoid false start bits.
- Fails if: default reset state is not safe (TX drives during boot before OE takes effect).
D · Wired-OR / diode aggregation (only for specific electrical styles)
- Best when: talkers are open-drain/open-collector (or intentionally converted) and speed margins tolerate slower edges.
- Costs: altered thresholds/edges; higher susceptibility to noise and false start bits.
- Fails if: any talker is push-pull → contention returns as a hard short.
E · Addressed upper-layer protocol (software arbitration dominant)
- Best when: firmware is controllable across devices; strict “speak only when granted” rules can be enforced and validated.
- Costs: protocol complexity; validation effort; field risk if any device deviates from rules.
- Hard rule: software arbitration still needs hardware fault isolation (otherwise a stuck talker can block the entire system).
Selection shortcut: prefer A for deterministic service/production flows; prefer C when device TX can be forced Hi-Z; use B/E only when device behavior is enforceable; treat D as an electrical special case.
The strongest designs make “only one talker exists” true at the electrical level (A/C), and use protocol rules (E) as a secondary layer—not a single point of failure.
H2-4 · Electrical Reality: UART Isn’t a Multi-drop Bus
UART sharing fails first on electrical issues—not software. A typical UART TX pin is push-pull. If two talkers drive opposite levels, the result is a hard short through output devices. In addition, IO protection structures can create ghost-powering when an unpowered device is back-fed via TX/RX.
Why “parallel TX” is unsafe (mechanisms → symptoms → consequences)
- Push-pull contention: opposite drive levels force high current through output transistors. Symptoms: stuck level, heating, unreadable bytes. Consequence: IO overstress and latent failures.
- ESD/IO structures → ghost-powering: an unpowered device can be back-fed via clamp paths. Symptoms: “half-alive” rails, unpredictable state, leakage. Consequence: bus poisoning and hard-to-reproduce field bugs.
- Added capacitance: parallel stubs raise effective C, slow edges, and reduce start-bit margin. Symptoms: false start bits, framing/parity errors. Consequence: retries and state-machine desync.
- Multi-branch noise sensitivity: stubs and imperfect return paths shift thresholds and add ringing. Symptoms: channel-specific errors, errors clustered around switching. Consequence: fragile links that “pass on bench” but fail in system.
Must-check electrical checklist (before committing to any topology)
- Non-selected TX = Hi-Z? verify default state at reset/boot and during brownout.
- Boot behavior: confirm whether the device prints boot logs or emits pulses before firmware control.
- Port tolerance & idle bias: verify 5-V tolerance (if applicable) and internal pull-ups/downs that shift idle level.
- Ghost-power risk: verify unpowered devices are not back-fed via TX/RX clamp paths (rail rise / clamp current).
The safe baseline is: only one enabled push-pull driver exists on the shared TX path, and unpowered devices must not be back-fed through clamp structures. If these are not guaranteed, a “working prototype” can turn into a fragile field failure.
H2-5 · Hardware Implementation Patterns (from safest to cheapest)
Reliable UART sharing requires two guarantees: only one enabled TX driver exists, and switching never injects a false start. The patterns below are ranked by how strongly they enforce these guarantees in hardware (recommended first).
Pattern 1 · Bidirectional analog switch / crosspoint (recommended)
- Best when: service/production UART must behave as true point-to-point; device behavior cannot be fully trusted.
- Strength: non-selected devices are physically disconnected → contention becomes structurally impossible.
- Design focus: Ron, off-isolation, channel crosstalk, leakage, and control pin defaults.
- Hard rule: switching must be break-before-make (BBM), by device feature or by timing.
Pattern 2 · Digital MUX + direction/enable control (use cautiously)
- Best when: CMOS UART levels, short routing, and a stable control state-machine are guaranteed.
- Risk: SEL/DIR/EN glitches can couple into RX and create false start bits.
- Hard rule: enforce EN low → change SEL/DIR → EN high (BBM window required).
Pattern 3 · Per-device TX tri-state gating (highly practical)
- Best when: each device TX can be forced to Hi-Z (device OE or external gate/buffer).
- Key requirement: hardware must guarantee default disabled at power-up (do not rely on firmware timing).
- Benefit: a misbehaving talker can be isolated by de-asserting OE.
Pattern 4 · Series-R isolation (firefighting tolerance, not a root fix)
- Best when: a legacy design cannot be rerouted; goal is to limit contention current and reduce damage risk.
- Reality: it cannot prevent protocol collisions; it only makes collisions less destructive.
- Tradeoff: added RC slows edges and can increase framing errors at higher baud.
Recommended baseline: use a bidirectional 1-of-N path (Pattern 1) or enforce per-device TX Hi-Z (Pattern 3), and always implement a deterministic switching sequence (H2-6).
The topology stays safe across reset and brownout only if defaults are enforced in hardware: keep EN/OE disabled until selection is stable and UART settings are configured.
H2-6 · Channel Switching Timing & State Machine
The most failure-prone moment is the switch itself. A safe switch sequence enforces three invariants: (1) the old channel returns to idle, (2) only one TX driver is enabled at any time, and (3) the new channel starts with a short sync/handshake to realign framing.
Switching invariants (non-negotiable)
- Idle first: do not switch while a character is in-flight; enforce a quiet window before/after switching.
- Single talker: only one push-pull TX driver can be enabled at any time (hardware + state machine).
- Re-sync: after switching, flush stale RX state and start with a short sync/handshake frame.
Safe switch sequence (engineering steps)
- Disable current channel TX (OE=0 or disconnect path) to eliminate contention risk.
- Wait ≥ 1–2 character times so the line settles to idle (e.g., 8N1 ≈ 10/baud seconds per char).
- Freeze/flush RX state (clear FIFO or ignore window) to prevent glitch-as-data.
- Switch SEL while EN is low (BBM) so no two channels are ever connected concurrently.
- Reconfigure UART settings (baud/parity/invert) if the target device differs.
- Clear RX FIFO again and re-align framing boundary.
- Send a short sync/handshake frame and validate the expected response/quiet behavior.
- Enable logging/counters for post-switch diagnostics (errors, retries, timeouts).
Pitfall · Break / auto-baud false trigger
A switching glitch can look like a long-low “break” or distort early edges used by auto-baud. Mitigation: enforce a quiet window, ignore RX during switching, and use a dedicated sync frame.
Pitfall · Idle level mismatch (invert / bias / domain)
If channels do not share the same idle polarity or bias, the receiver may see constant start bits or framing errors. Mitigation: standardize idle definition per channel and re-sync after switching.
Pitfall · Glitch → false start bit (first byte corrupted)
SEL/EN edges can couple into RX and create a false start bit. Typical symptom: the first byte after switching is wrong. Mitigation: BBM sequencing, RX ignore window, FIFO flush, and a sync/handshake frame.
The safest implementation disables talkers first, switches selection only during the disabled window (BBM), and treats the first post-switch exchange as a re-synchronization step—not as normal payload traffic.
H2-7 · Arbitration & Collision Avoidance
UART provides no built-in multi-drop arbitration. A reliable multi-device design combines hardware enforcement (only one electrically valid talker) with a software contract (when a device is allowed to transmit), plus a fail-safe action when the contract is violated.
Arbitration layers (strong → weak)
- Hard arbitration: only the selected channel is physically connected (strongest).
- Soft arbitration: multiple devices are physically capable, but protocol rules decide who may talk.
- Weak discipline: “best effort” silence without enforcement (debug-only; fragile in field).
Strategy · Polling (master asks; slaves respond only when addressed)
- Rule: slaves must not transmit unless a request was received within the current authorization window.
- Control: per-channel select (SEL) and TX enable (OE/EN) bound the talker physically.
- Pass criteria: unexpected bytes outside the window → immediate isolation action (threshold X).
Strategy · Token / TDMA time slots (authorized transmit windows)
- Rule: a device may transmit only while holding the token or within its assigned slot.
- Key design point: enforce a strict slot length cap to prevent “log floods”.
- Pass criteria: slot overrun beyond X ms or X bytes → blacklist & isolate.
Strategy · Grant line (out-of-band “permission to speak”)
- Rule: grant=1 enables TX; grant=0 forces TX Hi-Z or TX disable.
- Benefit: turns soft arbitration into near-hard behavior even if firmware misbehaves.
- Pass criteria: any TX activity while grant=0 → immediate disable/reset action.
Fail-safe · Timeout & fuse actions (blacklist → disable → reset → probe)
- Detect: no response in X ms, continuous non-idle RX, or CRC/error bursts in a rolling window.
- Contain: disable the channel (EN/OE=0) first; optionally assert reset or power-cycle.
- Recover: periodic “probe” frames reopen the channel only after quiet + valid response.
Minimal frame guidance (engineering-ready)
- Frame: SOF + addr + len + payload + CRC (CRC used for detection and statistics).
- Rule: no unsolicited long output; transmit only inside an authorization window.
- Recovery: if framing is lost, scan for SOF and re-enter a quiet state on timeout.
The loop stays stable only if policy violations trigger a deterministic containment action (disable/isolate) before retries amplify the failure.
H2-8 · Robustness: Fault Isolation, Brownout & Hot-plug
Field failures are dominated by one rule: a single bad device must not stall the shared UART. Robust designs pair per-channel control hooks with health monitoring and deterministic containment.
Failure · Stuck talker (firmware crash, continuous TX)
- Detect: RX never returns to idle, or unexpected bytes outside the authorization window.
- Contain: disable channel TX immediately (OE/EN=0).
- Recover: reset or power-cycle the channel, then probe with a short handshake frame.
Failure · Brownout (partial power, clamp / back-feed)
- Detect: channel becomes “sticky” after a dip; idle level shifts; errors spike after reset.
- Contain: isolate the channel first (disconnect/disable), then reset or power-cycle.
- Pass criteria: VDD back-feed or clamp behavior below threshold X before re-enable.
Failure · Hot-plug glitch (false start, first-frame corruption)
- Detect: first byte after plug/switch is wrong; framing/parity errors cluster around events.
- Contain: enforce quiet windows and RX ignore windows around switch/hot-plug events.
- Recover: clear FIFO and re-sync with a short handshake frame.
Failure · Post-ESD fragility (degraded margin)
- Detect: error rate jumps relative to baseline; retries/NAKs/CRC failures increase.
- Contain: trigger a downgrade policy (shorter frames, slower baud, stricter timeouts) before isolation.
- Pass criteria: rolling error rate < X% for N frames before returning to normal.
Recommended per-channel hooks (for isolation & recovery)
- EN/OE: channel-level transmit permission (fastest containment).
- RESET: deterministic state recovery after policy violation or brownout.
- PWR SW (optional): full clear of latched faults; isolate signal path first to avoid back-feed.
- Port protection (pointer): add series-R/TVS as needed (details belong to the protection page).
Isolation must be fast (EN/OE), deterministic (RESET), and complete when required (PWR), with health counters defining when to downgrade, isolate, and probe for recovery.
H2-9 · Signal Integrity & Layout for Multi-drop UART
Multi-branch UART failures on boards usually come from two sources: edge damage (ringing/threshold crossings) and switch-injected glitches (SEL/EN coupling into RX). This section stays board-level and does not expand into long-cable or RS-485 topics.
Board-level layout rules (UART share / selector relevant)
- Place the selector near the host UART: keep the trunk short; branches start at the selector.
- Avoid long star stubs: if a star is unavoidable, cap stub length (threshold X) and add observability (test points).
- Put series-R close to the driver: host TX and any enabled device TX are “drivers”.
- Keep SEL/EN/OE lines away from RX: control edges can create false start bits.
- Preserve return paths across splits: avoid routing across ground gaps; keep reference continuous.
- Plan for partial-power behavior: avoid unintended clamp/back-feed paths affecting idle level.
- Make branches measurable: add per-branch test points or “cut points” for fast isolation.
Verification methods (no formulas, actionable checks)
- Idle noise: scope RX at idle; confirm stable level and no repeated threshold crossings.
- Start-bit overshoot: probe the first edge; check for ringing that can be interpreted as multiple starts.
- Switch-window glitch: trigger on SEL/EN/OE transitions and observe RX for spikes.
- Sampling margin: compare the bit center against jitter/noise; look for intermittent edge re-crossing.
- Error correlation: correlate framing/parity errors with switching/hot-plug events.
- Branch comparison: same baud/frame, different branch → identify stub/return-path sensitivity.
If the UART route must leave the PCB via long cabling or harsh common-mode environments, treat it as a different physical problem domain and use the dedicated long-reach / differential PHY pages.
Use the selector to control where branches begin, keep stubs short, and preserve a continuous reference return path to reduce false starts and framing errors.
H2-10 · Measurement & Debug Playbook
A fast diagnosis depends on separating four layers: electrical contention, switch timing, protocol collisions, and system latency. The checks below prioritize the most destructive failures first.
60-second triage (start here)
- Heat / current jump: sudden Icc increase or local heating suggests push-pull contention.
- RX idle sanity: idle stuck low/high points to a line being driven or clamped.
- Switch-window scope: trigger on SEL/EN and watch RX for spikes.
- Error correlation: framing/parity clustered at switching implies timing/glitch.
- Branch isolation: disable one channel (EN/OE=0) to identify a misbehaving talker.
- Load sensitivity: failures only under load suggest buffering/latency/timeout interactions.
One-glance · Electrical conflict
- TX forced + heat: multiple drivers → isolate immediately (EN/OE=0).
- Sticky after brownout: clamp/back-feed likely → isolate first, then reset/power-cycle.
One-glance · Timing / switching
- Framing errors at switch: BBM/quiet/RX ignore window missing.
- First byte wrong: false start or FIFO not flushed → re-sync handshake.
One-glance · SI / thresholds
- Frame boundary OK, content wrong: suspect ringing/threshold margin or sampling jitter.
- Branch-specific errors: stub length, return path, or local coupling issue.
One-glance · Protocol / system
- Multiple responses: missing authorization window → enforce polling/token/grant + fuse rules.
- Only under load: buffering/latency causes timeout snowball → tune timeouts and backpressure.
The fastest path to closure is always: eliminate push-pull contention, verify switch-window behavior, then quantify SI margin and protocol discipline.
H2-11 · Engineering Checklist (design → bring-up → production)
This checklist turns the shared-UART selector design into three measurable gates. Each line is intended to be checkable, with a Pass criteria placeholder (X/N/ms/%).
Design gate (pre-board / schematic review)
Architecture & defaults
- □ Choose the primary topology: true 1-of-N (TX+RX) or TX gate + selected RX.
- Pass: at any time, electrically valid talkers ≤ X (default X=1).
- □ Define safe power-up defaults: all channels disabled / Hi-Z.
- Pass: during boot, no unexpected bytes outside authorization window ≤ X bytes.
Per-channel containment hooks (must-have)
- □ Provide per-channel EN/OE (fast isolation).
- Pass: after EN/OE=0, RX returns to idle within X ms.
- □ Provide per-channel RESET (recommended) and optional PWR cut (for brownout/partial-power latch).
- Pass: isolate → reset/power-cycle → handshake recovers within N tries.
SI + testability reservations (board-level only)
- □ Reserve series-R footprints near every active driver (host TX, enabled device TX).
- Pass: overshoot/ringing reduced below threshold X (measurement-defined).
- □ Add per-branch test points (TP) and/or cut points.
- Pass: a failing branch can be identified by channel ID in ≤ X minutes.
Reference parts (examples; verify voltage, package, and availability)
UART line selection (analog switch / mux)
- TI TS5A23157 (dual SPDT analog switch, break-before-make behavior depends on variant).
- TI TS5A3159 (SPDT analog switch, low Ron family; verify V/logic constraints).
- Analog Devices ADG772 / ADG774 (SPDT/quad switch families; check Ron/leakage).
- Nexperia 74LVC1G3157 (single 2:1 analog switch, compact; verify signal swing vs VCC).
TX gating (tri-state buffer / OE control)
- TI SN74LVC1G125 (single tri-state buffer, OE control for per-device TX).
- Nexperia 74LVC1G126 (single tri-state buffer variant; choose OE polarity as needed).
- TI SN74LVC2G125 (dual tri-state buffer for denser channel packing).
Per-channel power cut / reset helpers (robustness hooks)
- TI TPS22918 (load switch; per-channel rail isolation; verify current/Ron).
- TI TPS22910A (small load switch family; verify inrush/enable default).
- TI TPS3808 (supervisor; clean reset timing where needed).
- Analog Devices / Maxim MAX809 (reset supervisor family; check threshold options).
Series resistors (example part numbers)
- Yageo RC0402FR-0722RL (22 Ω, 0402, 1%).
- Panasonic ERJ-2RKF33R0X (33 Ω, 0402, 1%).
- Vishay CRCW040247R0FKED (47 Ω, 0402, 1%).
Place near the driver; final value depends on edge rate and routing (tune during bring-up).
Optional port ESD (pointer only; details belong to protection page)
- TI TPD2E007 (low-cap ESD protection family; choose line count/package as needed).
- Nexperia PESD5V0S1BA (single-line ESD diode family; verify capacitance vs edge rate).
Note: a shared UART design usually needs two paths (TX + RX). Verify that the selected switch/buffer supports the intended signal swing and that the enable default state is safe (Hi-Z).
Bring-up gate (bench validation)
Single-channel baseline
- □ Validate baud/parity/stop for each channel.
- Pass: framing+parity error rate < X% (rolling window N).
- □ Validate “select → handshake” for each channel.
- Pass: handshake completes within X ms without retries > X.
Switching sequence verification
- □ Enforce break-before-make (BBM) and a quiet window between channels.
- Pass: RX has no false start during switching; switch failures ≤ X per N switches.
- □ Flush RX FIFO and re-sync frame boundary after switching.
- Pass: first-frame error rate ≤ X%.
Fault injection (prove containment)
- □ Inject “stuck talker” (continuous TX) on one device.
- Pass: isolate action (EN/OE=0) completes within X ms and other channels continue.
- □ Inject partial-power/brownout behavior (device rail dip / half-on IO).
- Pass: isolate → reset/power-cycle restores channel within N probes.
Counters & logging
- □ Log: framing, parity, timeout, switch-fail, unexpected-byte events per channel.
- Pass: events can be correlated to channel ID + timestamp; missing fields = 0.
Production gate (factory test & traceability)
Per-channel test script
- □ Sequence: select → loopback/response → latency record → next channel.
- Pass: max response latency ≤ X ms; timeouts ≤ X.
- □ Switch stress: run N switches and record failures.
- Pass: switch failures ≤ X; first-frame errors ≤ X%.
Pass/fail thresholds (placeholders)
- □ Error rate: framing/parity/timeout < X% (rolling window N).
- □ Latency: max latency < X ms.
- □ Switching: fail count < X per N cycles.
Traceability fields (must record)
- □ Channel ID map (SEL value → physical port).
- □ Firmware version (host + device), baud/parity config, arbitration policy version.
- □ Test station ID + timestamp + result summary.
- Pass: missing fields = 0.
Gate failures must have deterministic containment: disable the channel first, then attempt recovery, and reopen only after quiet + valid handshake.
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H2-12 · FAQs
These FAQs close out common field issues for shared-UART selectors without expanding new topics. Each answer uses a fixed four-line, measurable structure.
Switching channels: the first frame is always garbled
Likely cause: Switch-window glitch or missing quiet time; RX FIFO not flushed after select.
Quick check: Trigger scope on SEL/EN/OE; confirm no RX spike and that line is idle for ≥ X bit-times before the first byte.
Fix: Enforce break-before-make + quiet window; flush RX FIFO; send a short sync/handshake frame, then start payload.
Pass criteria: First-frame error rate < X% over N consecutive switches.
A device can affect the bus even when not selected (sporadic “stuck”)
Likely cause: The device TX is not truly Hi-Z when “disabled”, or partial-power clamp/backfeed holds the line.
Quick check: Force EN/OE=0 for that channel and measure RX idle level; compare idle bias with device rail ON vs OFF (ΔV idle > X mV indicates leakage/clamp).
Fix: Add/enable per-channel containment: hard-disable TX path (tri-state buffer OE), and if needed isolate rail (load switch) + reset before re-opening.
Pass criteria: With channel disabled, RX idle stays within X% of nominal level and no timeouts occur over N polling cycles.
On power-up, multiple devices print bootlogs and fight for the line
Likely cause: Devices drive TX during boot before selection/authorization; default state is not “all-disabled”.
Quick check: Capture the shared RX line during the first X ms after reset; count unexpected bytes before host enables any channel.
Fix: Make power-up default “all channels disabled/Hi-Z”; gate each device TX with OE and only enable after a host handshake window.
Pass criteria: Pre-authorized output ≤ X bytes across N cold boots; no contention current spikes > X mA.
A device is unpowered but the UART idle level is shifted (suspected back-powering)
Likely cause: IO clamp/ESD diode path backfeeds the unpowered device or clamps the shared line.
Quick check: With device rail OFF, measure device VDD rise via IO (VDD > X V indicates backfeed) and observe idle shift on RX (ΔV > X mV).
Fix: Ensure the channel is physically disconnected when unpowered (switch off path / OE disable); add per-channel power cut and enforce “do not open channel unless rail-good”.
Pass criteria: With rail OFF and channel disabled, device VDD < X V and RX idle remains within X% of nominal.
Framing errors happen only on one channel
Likely cause: Channel-specific SI/layout issue (long stub, poor return path) or a threshold/level mismatch on that branch.
Quick check: Scope the problematic branch at the receiver pin: measure start-bit edge ringing/overshoot and compare to a good channel (Δovershoot > X V or extra crossings > X times).
Fix: Shorten the stub or move the selector closer to the host; add/tune series-R near the driver; verify SEL/EN coupling is not near RX routing.
Pass criteria: Framing error rate on that channel < X% over N frames at max baud.
Same baud rate, but one device occasionally drops bytes
Likely cause: Host buffering/latency overruns, or marginal edge/threshold causes sporadic sampling failures without obvious framing bursts.
Quick check: Compare drops vs CPU load / IRQ latency (p99 latency > X µs) and check if drops correlate with switching or bursts.
Fix: Increase RX buffering or DMA where applicable; tighten polling windows; add a short per-frame ACK/sequence number at the application layer for detection and retry.
Pass criteria: Byte loss rate < X per 10^6 bytes over T hours at worst-case load.
After long runtime, one channel becomes slow or times out
Likely cause: A “slow talker” state, retry snowball, or a device stuck in partial failure; timeouts not tuned to real latency distribution.
Quick check: Log per-channel latency histogram and timeout counts; detect drift (p95 latency increase > X% vs baseline).
Fix: Add a fuse rule: after N consecutive timeouts, isolate the channel, reset/power-cycle the device, then reopen after handshake.
Pass criteria: Timeouts < X per hour and max response latency < X ms over T hours.
After ESD, a channel becomes “fragile” and error rate increases
Likely cause: Margin loss (leakage, clamp shift, edge distortion) on that branch after a transient event.
Quick check: Compare idle bias and edge shape to a golden channel (idle drift ΔV > X mV or rise/fall time change > X%).
Fix: Quarantine the channel (isolate), run a validation script (N frames), and if persistent, downgrade baud or keep channel disabled pending service; ensure per-channel protection/series-R footprints are populated as designed.
Pass criteria: Post-event error rate returns to baseline ± X% and no new timeouts across N validation frames.
After low-power wake, UART becomes unstable
Likely cause: Wake sequence violates default Hi-Z/authorization; IO rails are not ready when the channel is reopened.
Quick check: Time-align wake signals vs channel enable; verify rail-good occurs < X ms before EN/OE=1 and no bytes appear during the first X ms.
Fix: Keep all channels disabled through wake; wait for rail-good; then select → quiet window → handshake; apply fuse rules if unexpected talk occurs.
Pass criteria: Wake-to-handshake success ≥ X% over N cycles; no framing bursts within X ms of enable.
A larger series resistor prevents burn, but communication gets worse
Likely cause: Edge becomes too slow; receiver sees reduced noise margin and increased susceptibility to jitter/threshold noise.
Quick check: Measure 10–90% edge time on RX after R increase; compare to bit-time (trise > X% of bit-time indicates risk).
Fix: Use Rseries as a tuned damper near the driver (not a “current limiter”); restore safe isolation via OE/selector, then retune R to meet edge+ringing goals.
Pass criteria: Framing/parity error rate < X% and trise ≤ X ns at max baud.
RX aggregation increases noise and causes false start bits
Likely cause: Multiple branches inject coupled noise into RX, or control-line edges couple into RX near the selector.
Quick check: Observe RX at idle with a high-timebase; count threshold crossings > X per second and correlate with SEL/EN toggles.
Fix: Add an RX ignore window around switching; improve control-line routing separation; shorten stubs and validate return path continuity near the selector.
Pass criteria: False-start events = 0 over T hours; framing error bursts within ±X ms of switching = 0.
EN/SEL control line jitter causes random switching / random failures
Likely cause: Control signals glitch, are not synchronized, or violate break-before-make timing at the selector/gate.
Quick check: Log SEL/EN transitions with timestamps and compare to failures; scope SEL/EN for runt pulses < X ns or bounce events > X times.
Fix: Synchronize SEL/EN updates in firmware, apply a single “commit” edge, and enforce BBM + quiet window; add pull resistors so the default state is stable.
Pass criteria: Random switch events = 0 over N hours; switch failures ≤ X per 10^6 selects.
